head	1.1;
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	xf86-video-intel-2-99-917-20210115-31486f40f8e8f8923ca0799aea84b58799754564:1.1.1.1
	netbsd-10-2-RELEASE:1.1.1.1
	netbsd-9-5-RELEASE:1.1.1.1
	netbsd-11-0-RELEASE:1.1.1.1
	netbsd-11-0-RC7:1.1.1.1
	netbsd-11-0-RC6:1.1.1.1
	netbsd-11-0-RC5:1.1.1.1
	netbsd-11-0-RC4:1.1.1.1
	netbsd-11-0-RC3:1.1.1.1
	netbsd-11-0-RC2:1.1.1.1
	netbsd-11-0-RC1:1.1.1.1
	netbsd-11:1.1.1.1.0.14
	netbsd-11-base:1.1.1.1
	netbsd-10-1-RELEASE:1.1.1.1
	netbsd-8-3-RELEASE:1.1.1.1
	netbsd-9-4-RELEASE:1.1.1.1
	netbsd-10-0-RELEASE:1.1.1.1
	netbsd-10-0-RC6:1.1.1.1
	netbsd-10-0-RC5:1.1.1.1
	netbsd-10-0-RC4:1.1.1.1
	netbsd-10-0-RC3:1.1.1.1
	netbsd-10-0-RC2:1.1.1.1
	netbsd-10-0-RC1:1.1.1.1
	netbsd-10:1.1.1.1.0.12
	netbsd-10-base:1.1.1.1
	netbsd-9-3-RELEASE:1.1.1.1
	netbsd-9-2-RELEASE:1.1.1.1
	netbsd-9-1-RELEASE:1.1.1.1
	netbsd-8-2-RELEASE:1.1.1.1
	netbsd-9-0-RELEASE:1.1.1.1
	netbsd-9-0-RC2:1.1.1.1
	netbsd-9-0-RC1:1.1.1.1
	netbsd-9:1.1.1.1.0.10
	netbsd-9-base:1.1.1.1
	netbsd-8-1-RELEASE:1.1.1.1
	netbsd-8-1-RC1:1.1.1.1
	xf86-video-intel-6afed33b2d673d88674f0c76efe500ae414e8e1b:1.1.1.1
	netbsd-7-2-RELEASE:1.1.1.1
	netbsd-8-0-RELEASE:1.1.1.1
	netbsd-8-0-RC2:1.1.1.1
	netbsd-8-0-RC1:1.1.1.1
	netbsd-7-1-2-RELEASE:1.1.1.1
	netbsd-7-1-1-RELEASE:1.1.1.1
	netbsd-8:1.1.1.1.0.8
	netbsd-8-base:1.1.1.1
	netbsd-7-1:1.1.1.1.0.6
	netbsd-7-1-RELEASE:1.1.1.1
	netbsd-7-1-RC2:1.1.1.1
	netbsd-7-1-RC1:1.1.1.1
	netbsd-7-0-2-RELEASE:1.1.1.1
	netbsd-7-0-1-RELEASE:1.1.1.1
	netbsd-7-0:1.1.1.1.0.4
	netbsd-7-0-RELEASE:1.1.1.1
	netbsd-7-0-RC3:1.1.1.1
	netbsd-7-0-RC2:1.1.1.1
	netbsd-7-0-RC1:1.1.1.1
	xf86-video-intel-2-99-917:1.1.1.1
	xf86-video-intel-2-99-916:1.1.1.1
	netbsd-7:1.1.1.1.0.2
	netbsd-7-base:1.1.1.1
	riastradh-xf86-video-intel-2-7-1-pre-2-21-15:1.1.1.1
	xf86-video-intel-2-21-15:1.1.1.1
	xorg:1.1.1;
locks; strict;
comment	@# @;


1.1
date	2014.03.21.22.42.43;	author riastradh;	state Exp;
branches
	1.1.1.1;
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commitid	gkwXFwvN4HJ5qCtx;

1.1.1.1
date	2014.03.21.22.42.43;	author riastradh;	state Exp;
branches;
next	;
commitid	gkwXFwvN4HJ5qCtx;


desc
@@


1.1
log
@Initial revision
@
text
@/*
 * Copyright © 2008 Intel Corporation
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
 * copy of this software and associated documentation files (the "Software"),
 * to deal in the Software without restriction, including without limitation
 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
 * and/or sell copies of the Software, and to permit persons to whom the
 * Software is furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice (including the next
 * paragraph) shall be included in all copies or substantial portions of the
 * Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
 * SOFTWARE.
 *
 * Author:
 *    Zou Nan hai <nanhai.zou@@intel.com>
 *
 */

and.nz (1) null g2.0<1,1,1>UD 0x1UD{align1};
(f0) jmpi direct_idct;
add (1) g2.8<1>UD g76.8<1,1,1>UD 0UD{align1};
send (16) 0 g3.0<1>UD g2<16,16,1>UD read(3, 0, 2, 0) mlen 1 rlen 1 { align1 };
add (1) g2.8<1>UD g2.8<1,1,1>UD 32UD {align1};
send (16) 0 g4.0<1>UD g2<16,16,1>UD read(3, 0, 2, 0) mlen 1 rlen 1 { align1 };
add (1) g2.8<1>UD g2.8<1,1,1>UD 32UD {align1};
send (16) 0 g5.0<1>UD g2<16,16,1>UD read(3, 0, 2, 0) mlen 1 rlen 1 { align1 };
add (1) g2.8<1>UD g2.8<1,1,1>UD 32UD {align1};
send (16) 0 g6.0<1>UD g2<16,16,1>UD read(3, 0, 2, 0) mlen 1 rlen 1 { align1 };
add (1) g2.8<1>UD g2.8<1,1,1>UD 32UD {align1};
send (16) 0 g7.0<1>UD g2<16,16,1>UD read(3, 0, 2, 0) mlen 1 rlen 1 { align1 };
add (1) g2.8<1>UD g2.8<1,1,1>UD 32UD {align1};
send (16) 0 g8.0<1>UD g2<16,16,1>UD read(3, 0, 2, 0) mlen 1 rlen 1 { align1 };
add (1) g2.8<1>UD g2.8<1,1,1>UD 32UD {align1};
send (16) 0 g9.0<1>UD g2<16,16,1>UD read(3, 0, 2, 0) mlen 1 rlen 1 { align1 };
add (1) g2.8<1>UD g2.8<1,1,1>UD 32UD {align1};
send (16) 0 g10.0<1>UD g2<16,16,1>UD read(3, 0, 2, 0) mlen 1 rlen 1 { align1 };
add (1) g2.8<1>UD g2.8<1,1,1>UD 32UD {align1};
send (16) 0 g11.0<1>UD g2<16,16,1>UD read(3, 0, 2, 0) mlen 1 rlen 1 { align1 };
add (1) g2.8<1>UD g2.8<1,1,1>UD 32UD {align1};
send (16) 0 g12.0<1>UD g2<16,16,1>UD read(3, 0, 2, 0) mlen 1 rlen 1 { align1 };
add (1) g2.8<1>UD g2.8<1,1,1>UD 32UD {align1};
send (16) 0 g13.0<1>UD g2<16,16,1>UD read(3, 0, 2, 0) mlen 1 rlen 1 { align1 };
add (1) g2.8<1>UD g2.8<1,1,1>UD 32UD {align1};
send (16) 0 g14.0<1>UD g2<16,16,1>UD read(3, 0, 2, 0) mlen 1 rlen 1 { align1 };
add (1) g2.8<1>UD g2.8<1,1,1>UD 32UD {align1};
send (16) 0 g15.0<1>UD g2<16,16,1>UD read(3, 0, 2, 0) mlen 1 rlen 1 { align1 };
add (1) g2.8<1>UD g2.8<1,1,1>UD 32UD {align1};
send (16) 0 g16.0<1>UD g2<16,16,1>UD read(3, 0, 2, 0) mlen 1 rlen 1 { align1 };
add (1) g2.8<1>UD g2.8<1,1,1>UD 32UD {align1};
send (16) 0 g17.0<1>UD g2<16,16,1>UD read(3, 0, 2, 0) mlen 1 rlen 1 { align1 };
add (1) g2.8<1>UD g2.8<1,1,1>UD 32UD {align1};
send (16) 0 g18.0<1>UD g2<16,16,1>UD read(3, 0, 2, 0) mlen 1 rlen 1 { align1 };
add (1) g2.8<1>UD g2.8<1,1,1>UD 32UD {align1};
send (16) 0 g19.0<1>UD g2<16,16,1>UD read(3, 0, 2, 0) mlen 1 rlen 1 { align1 };
add (1) g2.8<1>UD g2.8<1,1,1>UD 32UD {align1};
send (16) 0 g20.0<1>UD g2<16,16,1>UD read(3, 0, 2, 0) mlen 1 rlen 1 { align1 };
add (1) g2.8<1>UD g2.8<1,1,1>UD 32UD {align1};
send (16) 0 g21.0<1>UD g2<16,16,1>UD read(3, 0, 2, 0) mlen 1 rlen 1 { align1 };
add (1) g2.8<1>UD g2.8<1,1,1>UD 32UD {align1};
send (16) 0 g22.0<1>UD g2<16,16,1>UD read(3, 0, 2, 0) mlen 1 rlen 1 { align1 };
add (1) g2.8<1>UD g2.8<1,1,1>UD 32UD {align1};
send (16) 0 g23<1>UD g2<16,16,1>UD read(3, 0, 2, 0) mlen 1 rlen 1 { align1 };
add (1) g2.8<1>UD g2.8<1,1,1>UD 32UD {align1};
send (16) 0 g24.0<1>UD g2<16,16,1>UD read(3, 0, 2, 0) mlen 1 rlen 1 { align1 };
add (1) g2.8<1>UD g2.8<1,1,1>UD 32UD {align1};
send (16) 0 g25.0<1>UD g2<16,16,1>UD read(3, 0, 2, 0) mlen 1 rlen 1 { align1 };
add (1) g2.8<1>UD g2.8<1,1,1>UD 32UD {align1};
send (16) 0 g26.0<1>UD g2<16,16,1>UD read(3, 0, 2, 0) mlen 1 rlen 1 { align1 };
direct_idct:

and.nz (1) null g76.12<1,1,1>UW 0x20UW {align1};
(f0) jmpi next_block;
mov (8) g3.0<1>UW 0UW {align1}; 
mov (8) g4.0<1>UW 0UW {align1}; 
mov (8) g5.0<1>UW 0UW {align1}; 
mov (8) g6.0<1>UW 0UW {align1}; 
mov (8) g7.0<1>UW 0UW {align1}; 
mov (8) g8.0<1>UW 0UW {align1}; 
mov (8) g9.0<1>UW 0UW {align1}; 
mov (8) g10.0<1>UW 0UW {align1}; 
next_block:

and.nz (1) null g1.12<1,1,1>UW 0x10UW {align1};
(f0) jmpi next_field;
mov (8) g3.16<1>UW 0UW {align1}; 
mov (8) g4.16<1>UW 0UW {align1}; 
mov (8) g5.16<1>UW 0UW {align1}; 
mov (8) g6.16<1>UW 0UW {align1}; 
mov (8) g7.16<1>UW 0UW {align1}; 
mov (8) g8.16<1>UW 0UW {align1}; 
mov (8) g9.16<1>UW 0UW {align1}; 
mov (8) g10.16<1>UW 0UW {align1}; 
next_field:
and.nz (1) null g1.12<1,1,1>UW 0x8UW {align1};
(f0) jmpi next_field;
mov (8) g11.0<1>UW 0UW {align1}; 
mov (8) g12.0<1>UW 0UW {align1}; 
mov (8) g13.0<1>UW 0UW {align1}; 
mov (8) g14.0<1>UW 0UW {align1}; 
mov (8) g15.0<1>UW 0UW {align1}; 
mov (8) g16.0<1>UW 0UW {align1}; 
mov (8) g17.0<1>UW 0UW {align1}; 
mov (8) g18.0<1>UW 0UW {align1}; 
next_field:
and.nz (1) null g1.12<1,1,1>UW 0x4UW {align1};
(f0) jmpi next_field;
mov (8) g11.16<1>UW 0UW {align1}; 
mov (8) g12.16<1>UW 0UW {align1}; 
mov (8) g13.16<1>UW 0UW {align1}; 
mov (8) g14.16<1>UW 0UW {align1}; 
mov (8) g15.16<1>UW 0UW {align1}; 
mov (8) g16.16<1>UW 0UW {align1}; 
mov (8) g17.16<1>UW 0UW {align1}; 
mov (8) g18.16<1>UW 0UW {align1}; 
next_field:

and.nz (1) null g1.12<1,1,1>UW 0x2UW {align1};
(f0) jmpi next_field;
mov (16) g19.0<1>UW 0UW {align1}; 
mov (16) g20.0<1>UW 0UW {align1}; 
mov (16) g21.0<1>UW 0UW {align1}; 
mov (16) g22.0<1>UW 0UW {align1}; 
next_field:

and.nz (1) null g1.12<1,1,1>UW 0x1UW {align1};
(f0) jmpi next_field;
mov (16) g23.0<1>UW 0UW {align1}; 
mov (16) g24.0<1>UW 0UW {align1}; 
mov (16) g25.0<1>UW 0UW {align1}; 
mov (16) g26.0<1>UW 0UW {align1}; 
next_field:
@


1.1.1.1
log
@initial import of xf86-video-intel-2.21.15
@
text
@@
