head 1.8; access; symbols netbsd-11-0-RC7:1.8 netbsd-11-0-RC6:1.8 netbsd-11-0-RC5:1.8 netbsd-11-0-RC4:1.8 netbsd-11-0-RC3:1.8 netbsd-11-0-RC2:1.8 netbsd-11-0-RC1:1.8 perseant-exfatfs-base-20250801:1.8 netbsd-11:1.8.0.12 netbsd-11-base:1.8 netbsd-10-1-RELEASE:1.8 perseant-exfatfs-base-20240630:1.8 perseant-exfatfs:1.8.0.10 perseant-exfatfs-base:1.8 netbsd-8-3-RELEASE:1.7 netbsd-9-4-RELEASE:1.7 netbsd-10-0-RELEASE:1.8 netbsd-10-0-RC6:1.8 netbsd-10-0-RC5:1.8 netbsd-10-0-RC4:1.8 netbsd-10-0-RC3:1.8 netbsd-10-0-RC2:1.8 thorpej-ifq:1.8.0.8 thorpej-ifq-base:1.8 thorpej-altq-separation:1.8.0.6 thorpej-altq-separation-base:1.8 netbsd-10-0-RC1:1.8 netbsd-10:1.8.0.4 netbsd-10-base:1.8 bouyer-sunxi-drm:1.8.0.2 bouyer-sunxi-drm-base:1.8 netbsd-9-3-RELEASE:1.7 thorpej-i2c-spi-conf2:1.7.0.114 thorpej-i2c-spi-conf2-base:1.7 thorpej-futex2:1.7.0.112 thorpej-futex2-base:1.7 thorpej-cfargs2:1.7.0.110 thorpej-cfargs2-base:1.7 cjep_sun2x-base1:1.7 cjep_sun2x:1.7.0.108 cjep_sun2x-base:1.7 cjep_staticlib_x-base1:1.7 netbsd-9-2-RELEASE:1.7 cjep_staticlib_x:1.7.0.106 cjep_staticlib_x-base:1.7 thorpej-i2c-spi-conf:1.7.0.104 thorpej-i2c-spi-conf-base:1.7 thorpej-cfargs:1.7.0.102 thorpej-cfargs-base:1.7 thorpej-futex:1.7.0.100 thorpej-futex-base:1.7 netbsd-9-1-RELEASE:1.7 bouyer-xenpvh-base2:1.7 phil-wifi-20200421:1.7 bouyer-xenpvh-base1:1.7 phil-wifi-20200411:1.7 bouyer-xenpvh:1.7.0.98 bouyer-xenpvh-base:1.7 is-mlppp:1.7.0.96 is-mlppp-base:1.7 phil-wifi-20200406:1.7 netbsd-8-2-RELEASE:1.7 ad-namecache-base3:1.7 netbsd-9-0-RELEASE:1.7 netbsd-9-0-RC2:1.7 ad-namecache-base2:1.7 ad-namecache-base1:1.7 ad-namecache:1.7.0.94 ad-namecache-base:1.7 netbsd-9-0-RC1:1.7 phil-wifi-20191119:1.7 netbsd-9:1.7.0.92 netbsd-9-base:1.7 phil-wifi-20190609:1.7 netbsd-8-1-RELEASE:1.7 netbsd-8-1-RC1:1.7 isaki-audio2:1.7.0.90 isaki-audio2-base:1.7 pgoyette-compat-merge-20190127:1.7 pgoyette-compat-20190127:1.7 pgoyette-compat-20190118:1.7 pgoyette-compat-1226:1.7 pgoyette-compat-1126:1.7 pgoyette-compat-1020:1.7 pgoyette-compat-0930:1.7 pgoyette-compat-0906:1.7 netbsd-7-2-RELEASE:1.7 pgoyette-compat-0728:1.7 netbsd-8-0-RELEASE:1.7 phil-wifi:1.7.0.88 phil-wifi-base:1.7 pgoyette-compat-0625:1.7 netbsd-8-0-RC2:1.7 pgoyette-compat-0521:1.7 pgoyette-compat-0502:1.7 pgoyette-compat-0422:1.7 netbsd-8-0-RC1:1.7 pgoyette-compat-0415:1.7 pgoyette-compat-0407:1.7 pgoyette-compat-0330:1.7 pgoyette-compat-0322:1.7 pgoyette-compat-0315:1.7 netbsd-7-1-2-RELEASE:1.7 pgoyette-compat:1.7.0.86 pgoyette-compat-base:1.7 netbsd-7-1-1-RELEASE:1.7 tls-maxphys-base-20171202:1.7 matt-nb8-mediatek:1.7.0.84 matt-nb8-mediatek-base:1.7 nick-nhusb-base-20170825:1.7 perseant-stdc-iso10646:1.7.0.82 perseant-stdc-iso10646-base:1.7 netbsd-8:1.7.0.80 netbsd-8-base:1.7 prg-localcount2-base3:1.7 prg-localcount2-base2:1.7 prg-localcount2-base1:1.7 prg-localcount2:1.7.0.78 prg-localcount2-base:1.7 pgoyette-localcount-20170426:1.7 bouyer-socketcan-base1:1.7 jdolecek-ncq:1.7.0.76 jdolecek-ncq-base:1.7 pgoyette-localcount-20170320:1.7 netbsd-7-1:1.7.0.74 netbsd-7-1-RELEASE:1.7 netbsd-7-1-RC2:1.7 nick-nhusb-base-20170204:1.7 netbsd-7-nhusb-base-20170116:1.7 bouyer-socketcan:1.7.0.72 bouyer-socketcan-base:1.7 pgoyette-localcount-20170107:1.7 netbsd-7-1-RC1:1.7 nick-nhusb-base-20161204:1.7 pgoyette-localcount-20161104:1.7 netbsd-7-0-2-RELEASE:1.7 nick-nhusb-base-20161004:1.7 localcount-20160914:1.7 netbsd-7-nhusb:1.7.0.70 netbsd-7-nhusb-base:1.7 pgoyette-localcount-20160806:1.7 pgoyette-localcount-20160726:1.7 pgoyette-localcount:1.7.0.68 pgoyette-localcount-base:1.7 nick-nhusb-base-20160907:1.7 nick-nhusb-base-20160529:1.7 netbsd-7-0-1-RELEASE:1.7 nick-nhusb-base-20160422:1.7 nick-nhusb-base-20160319:1.7 nick-nhusb-base-20151226:1.7 netbsd-7-0:1.7.0.66 netbsd-7-0-RELEASE:1.7 nick-nhusb-base-20150921:1.7 netbsd-7-0-RC3:1.7 netbsd-7-0-RC2:1.7 netbsd-7-0-RC1:1.7 nick-nhusb-base-20150606:1.7 nick-nhusb-base-20150406:1.7 nick-nhusb:1.7.0.64 nick-nhusb-base:1.7 netbsd-5-2-3-RELEASE:1.7 netbsd-5-1-5-RELEASE:1.7 netbsd-6-0-6-RELEASE:1.7 netbsd-6-1-5-RELEASE:1.7 netbsd-7:1.7.0.62 netbsd-7-base:1.7 yamt-pagecache-base9:1.7 yamt-pagecache-tag8:1.7 netbsd-6-1-4-RELEASE:1.7 netbsd-6-0-5-RELEASE:1.7 tls-earlyentropy:1.7.0.60 tls-earlyentropy-base:1.7 riastradh-xf86-video-intel-2-7-1-pre-2-21-15:1.7 riastradh-drm2-base3:1.7 netbsd-6-1-3-RELEASE:1.7 netbsd-6-0-4-RELEASE:1.7 netbsd-5-2-2-RELEASE:1.7 netbsd-5-1-4-RELEASE:1.7 netbsd-6-1-2-RELEASE:1.7 netbsd-6-0-3-RELEASE:1.7 netbsd-5-2-1-RELEASE:1.7 netbsd-5-1-3-RELEASE:1.7 rmind-smpnet-nbase:1.7 netbsd-6-1-1-RELEASE:1.7 riastradh-drm2-base2:1.7 riastradh-drm2-base1:1.7 riastradh-drm2:1.7.0.58 riastradh-drm2-base:1.7 rmind-smpnet:1.7.0.50 rmind-smpnet-base:1.7 netbsd-6-1:1.7.0.56 netbsd-6-0-2-RELEASE:1.7 netbsd-6-1-RELEASE:1.7 khorben-n900:1.7.0.54 netbsd-6-1-RC4:1.7 netbsd-6-1-RC3:1.7 agc-symver:1.7.0.52 agc-symver-base:1.7 netbsd-6-1-RC2:1.7 netbsd-6-1-RC1:1.7 yamt-pagecache-base8:1.7 netbsd-5-2:1.7.0.48 netbsd-6-0-1-RELEASE:1.7 yamt-pagecache-base7:1.7 netbsd-5-2-RELEASE:1.7 netbsd-5-2-RC1:1.7 matt-nb6-plus-nbase:1.7 yamt-pagecache-base6:1.7 netbsd-6-0:1.7.0.46 netbsd-6-0-RELEASE:1.7 netbsd-6-0-RC2:1.7 tls-maxphys:1.7.0.44 tls-maxphys-base:1.7 matt-nb6-plus:1.7.0.42 matt-nb6-plus-base:1.7 netbsd-6-0-RC1:1.7 jmcneill-usbmp-base10:1.7 yamt-pagecache-base5:1.7 jmcneill-usbmp-base9:1.7 yamt-pagecache-base4:1.7 jmcneill-usbmp-base8:1.7 jmcneill-usbmp-base7:1.7 jmcneill-usbmp-base6:1.7 jmcneill-usbmp-base5:1.7 jmcneill-usbmp-base4:1.7 jmcneill-usbmp-base3:1.7 jmcneill-usbmp-pre-base2:1.7 jmcneill-usbmp-base2:1.7 netbsd-6:1.7.0.40 netbsd-6-base:1.7 netbsd-5-1-2-RELEASE:1.7 netbsd-5-1-1-RELEASE:1.7 jmcneill-usbmp:1.7.0.38 jmcneill-usbmp-base:1.7 jmcneill-audiomp3:1.7.0.36 jmcneill-audiomp3-base:1.7 yamt-pagecache-base3:1.7 yamt-pagecache-base2:1.7 yamt-pagecache:1.7.0.34 yamt-pagecache-base:1.7 rmind-uvmplock-nbase:1.7 cherry-xenmp:1.7.0.32 cherry-xenmp-base:1.7 jym-xensuspend-nbase:1.7 uebayasi-xip-base7:1.7 bouyer-quota2-nbase:1.7 bouyer-quota2:1.7.0.30 bouyer-quota2-base:1.7 jruoho-x86intr:1.7.0.28 jruoho-x86intr-base:1.7 matt-mips64-premerge-20101231:1.7 matt-nb5-mips64-premerge-20101231:1.7 matt-nb5-pq3:1.7.0.26 matt-nb5-pq3-base:1.7 netbsd-5-1:1.7.0.24 uebayasi-xip-base6:1.7 uebayasi-xip-base5:1.7 netbsd-5-1-RELEASE:1.7 uebayasi-xip-base4:1.7 uebayasi-xip-base3:1.7 yamt-nfs-mp-base11:1.7 netbsd-5-1-RC4:1.7 matt-nb5-mips64-k15:1.7 uebayasi-xip-base2:1.7 yamt-nfs-mp-base10:1.7 netbsd-5-1-RC3:1.7 netbsd-5-1-RC2:1.7 uebayasi-xip-base1:1.7 netbsd-5-1-RC1:1.7 rmind-uvmplock:1.7.0.22 rmind-uvmplock-base:1.7 yamt-nfs-mp-base9:1.7 uebayasi-xip:1.7.0.20 uebayasi-xip-base:1.7 netbsd-5-0-2-RELEASE:1.7 matt-nb5-mips64-premerge-20091211:1.7 matt-premerge-20091211:1.7 yamt-nfs-mp-base8:1.7 matt-nb5-mips64-u2-k2-k4-k7-k8-k9:1.7 matt-nb4-mips64-k7-u2a-k9b:1.7 matt-nb5-mips64-u1-k1-k5:1.7 yamt-nfs-mp-base7:1.7 matt-nb5-mips64:1.7.0.18 netbsd-5-0-1-RELEASE:1.7 jymxensuspend-base:1.7 yamt-nfs-mp-base6:1.7 yamt-nfs-mp-base5:1.7 yamt-nfs-mp-base4:1.7 yamt-nfs-mp-base3:1.7 nick-hppapmap-base4:1.7 nick-hppapmap-base3:1.7 netbsd-5-0:1.7.0.16 netbsd-5-0-RELEASE:1.7 netbsd-5-0-RC4:1.7 netbsd-5-0-RC3:1.7 nick-hppapmap-base2:1.7 netbsd-5-0-RC2:1.7 jym-xensuspend:1.7.0.14 jym-xensuspend-base:1.7 netbsd-5-0-RC1:1.7 haad-dm-base2:1.7 haad-nbase2:1.7 ad-audiomp2:1.7.0.12 ad-audiomp2-base:1.7 netbsd-5:1.7.0.10 netbsd-5-base:1.7 nick-hppapmap:1.7.0.8 nick-hppapmap-base:1.7 matt-mips64-base2:1.7 haad-dm-base1:1.7 wrstuden-revivesa-base-4:1.7 netbsd-4-0-1-RELEASE:1.6 wrstuden-revivesa-base-3:1.7 wrstuden-revivesa-base-2:1.7 wrstuden-fixsa-newbase:1.6 nick-csl-alignment-base5:1.6 haad-dm:1.7.0.6 haad-dm-base:1.7 wrstuden-revivesa-base-1:1.7 simonb-wapbl-nbase:1.7 yamt-pf42-base4:1.7 simonb-wapbl:1.7.0.4 simonb-wapbl-base:1.7 yamt-pf42-base3:1.7 hpcarm-cleanup-nbase:1.7 yamt-pf42-baseX:1.6 yamt-pf42-base2:1.7 yamt-nfs-mp-base2:1.7 wrstuden-revivesa:1.7.0.2 wrstuden-revivesa-base:1.7 yamt-nfs-mp:1.6.0.72 yamt-nfs-mp-base:1.6 yamt-pf42:1.6.0.70 yamt-pf42-base:1.6 ad-socklock-base1:1.6 yamt-lazymbuf-base15:1.6 yamt-lazymbuf-base14:1.6 keiichi-mipv6-nbase:1.6 mjf-devfs2:1.6.0.68 mjf-devfs2-base:1.7 nick-net80211-sync:1.6.0.66 nick-net80211-sync-base:1.6 keiichi-mipv6:1.6.0.64 keiichi-mipv6-base:1.6 bouyer-xeni386-merge1:1.6 matt-armv6-prevmlocking:1.6 wrstuden-fixsa-base-1:1.6 vmlocking2-base3:1.6 netbsd-4-0:1.6.0.62 netbsd-4-0-RELEASE:1.6 bouyer-xeni386-nbase:1.6 yamt-kmem-base3:1.6 cube-autoconf:1.6.0.60 cube-autoconf-base:1.6 yamt-kmem-base2:1.6 bouyer-xeni386:1.6.0.58 bouyer-xeni386-base:1.6 yamt-kmem:1.6.0.56 yamt-kmem-base:1.6 vmlocking2-base2:1.6 reinoud-bufcleanup-nbase:1.6 vmlocking2:1.6.0.54 vmlocking2-base1:1.6 netbsd-4-0-RC5:1.6 matt-nb4-arm:1.6.0.52 matt-nb4-arm-base:1.6 matt-armv6-nbase:1.6 jmcneill-base:1.6 netbsd-4-0-RC4:1.6 mjf-devfs:1.6.0.50 mjf-devfs-base:1.6 bouyer-xenamd64-base2:1.6 vmlocking-nbase:1.6 yamt-x86pmap-base4:1.6 bouyer-xenamd64:1.6.0.48 bouyer-xenamd64-base:1.6 netbsd-4-0-RC3:1.6 yamt-x86pmap-base3:1.6 yamt-x86pmap-base2:1.6 netbsd-4-0-RC2:1.6 yamt-x86pmap:1.6.0.46 yamt-x86pmap-base:1.6 netbsd-4-0-RC1:1.6 matt-armv6:1.6.0.44 matt-armv6-base:1.6 jmcneill-pm:1.6.0.42 jmcneill-pm-base:1.6 hpcarm-cleanup:1.6.0.40 hpcarm-cleanup-base:1.6 nick-csl-alignment:1.6.0.38 nick-csl-alignment-base:1.6 matt-mips64:1.6.0.36 matt-mips64-base:1.6 netbsd-3-1-1-RELEASE:1.4 netbsd-3-0-3-RELEASE:1.4 yamt-idlelwp-base8:1.6 wrstuden-fixsa:1.6.0.34 wrstuden-fixsa-base:1.6 ppcoea-renovation:1.6.0.32 ppcoea-renovation-base:1.6 thorpej-atomic:1.6.0.30 thorpej-atomic-base:1.6 reinoud-bufcleanup:1.6.0.28 reinoud-bufcleanup-base:1.6 mjf-ufs-trans:1.6.0.26 mjf-ufs-trans-base:1.6 vmlocking:1.6.0.24 vmlocking-base:1.6 ad-audiomp:1.6.0.22 ad-audiomp-base:1.6 yamt-idlelwp:1.6.0.20 post-newlock2-merge:1.6 newlock2-nbase:1.6 yamt-splraiseipl-base5:1.6 yamt-splraiseipl-base4:1.6 yamt-splraiseipl-base3:1.6 abandoned-netbsd-4-base:1.6 abandoned-netbsd-4:1.6.0.12 netbsd-3-1:1.4.0.22 netbsd-3-1-RELEASE:1.4 netbsd-3-0-2-RELEASE:1.4 yamt-splraiseipl-base2:1.6 netbsd-3-1-RC4:1.4 yamt-splraiseipl:1.6.0.16 yamt-splraiseipl-base:1.6 netbsd-3-1-RC3:1.4 yamt-pdpolicy-base9:1.6 newlock2:1.6.0.14 newlock2-base:1.6 yamt-pdpolicy-base8:1.6 netbsd-3-1-RC2:1.4 netbsd-3-1-RC1:1.4 yamt-pdpolicy-base7:1.6 netbsd-4:1.6.0.18 netbsd-4-base:1.6 yamt-pdpolicy-base6:1.6 chap-midi-nbase:1.6 netbsd-3-0-1-RELEASE:1.4 gdamore-uart:1.6.0.10 gdamore-uart-base:1.6 simonb-timcounters-final:1.5.6.1 yamt-pdpolicy-base5:1.6 chap-midi:1.6.0.8 chap-midi-base:1.6 yamt-pdpolicy-base4:1.6 yamt-pdpolicy-base3:1.6 peter-altq-base:1.6 peter-altq:1.6.0.6 yamt-pdpolicy-base2:1.6 elad-kernelauth-base:1.6 elad-kernelauth:1.6.0.4 yamt-pdpolicy:1.6.0.2 yamt-pdpolicy-base:1.6 yamt-uio_vmspace-base5:1.5 simonb-timecounters:1.5.0.6 simonb-timecounters-base:1.6 rpaulo-netinet-merge-pcb:1.5.0.4 rpaulo-netinet-merge-pcb-base:1.6 yamt-uio_vmspace:1.5.0.2 netbsd-3-0:1.4.0.20 netbsd-3-0-RELEASE:1.4 netbsd-3-0-RC6:1.4 yamt-readahead-base3:1.4 netbsd-3-0-RC5:1.4 netbsd-3-0-RC4:1.4 netbsd-3-0-RC3:1.4 yamt-readahead-base2:1.4 netbsd-3-0-RC2:1.4 yamt-readahead-pervnode:1.4 yamt-readahead-perfile:1.4 yamt-readahead:1.4.0.18 yamt-readahead-base:1.4 netbsd-3-0-RC1:1.4 yamt-vop-base3:1.4 netbsd-2-0-3-RELEASE:1.3 netbsd-2-1:1.3.0.22 yamt-vop-base2:1.4 thorpej-vnode-attr:1.4.0.16 thorpej-vnode-attr-base:1.4 netbsd-2-1-RELEASE:1.3 yamt-vop:1.4.0.14 yamt-vop-base:1.4 netbsd-2-1-RC6:1.3 netbsd-2-1-RC5:1.3 netbsd-2-1-RC4:1.3 netbsd-2-1-RC3:1.3 netbsd-2-1-RC2:1.3 netbsd-2-1-RC1:1.3 yamt-lazymbuf:1.4.0.12 yamt-km-base4:1.4 netbsd-2-0-2-RELEASE:1.3 yamt-km-base3:1.4 netbsd-3:1.4.0.10 netbsd-3-base:1.4 yamt-km-base2:1.4 yamt-km:1.4.0.6 yamt-km-base:1.4 kent-audio2:1.4.0.4 kent-audio2-base:1.4 netbsd-2-0-1-RELEASE:1.3 kent-audio1-beforemerge:1.4 netbsd-2:1.3.0.20 netbsd-2-base:1.3 kent-audio1:1.4.0.2 kent-audio1-base:1.4 netbsd-2-0-RELEASE:1.3 netbsd-2-0-RC5:1.3 netbsd-2-0-RC4:1.3 netbsd-2-0-RC3:1.3 netbsd-2-0-RC2:1.3 netbsd-2-0-RC1:1.3 netbsd-2-0:1.3.0.18 netbsd-2-0-base:1.3 netbsd-1-6-PATCH002-RELEASE:1.3 netbsd-1-6-PATCH002:1.3 netbsd-1-6-PATCH002-RC4:1.3 netbsd-1-6-PATCH002-RC3:1.3 netbsd-1-6-PATCH002-RC2:1.3 netbsd-1-6-PATCH002-RC1:1.3 ktrace-lwp:1.3.0.16 ktrace-lwp-base:1.4 netbsd-1-6-PATCH001:1.3 netbsd-1-6-PATCH001-RELEASE:1.3 netbsd-1-6-PATCH001-RC3:1.3 netbsd-1-6-PATCH001-RC2:1.3 netbsd-1-6-PATCH001-RC1:1.3 nathanw_sa_end:1.1.10.1 nathanw_sa_before_merge:1.3 fvdl_fs64_base:1.3 gmcgarry_ctxsw:1.3.0.14 gmcgarry_ctxsw_base:1.3 gmcgarry_ucred:1.3.0.12 gmcgarry_ucred_base:1.3 nathanw_sa_base:1.3 kqueue-aftermerge:1.3 kqueue-beforemerge:1.3 netbsd-1-6-RELEASE:1.3 netbsd-1-6-RC3:1.3 netbsd-1-6-RC2:1.3 netbsd-1-6-RC1:1.3 netbsd-1-6:1.3.0.10 netbsd-1-6-base:1.3 gehenna-devsw:1.3.0.8 gehenna-devsw-base:1.3 eeh-devprop:1.3.0.6 eeh-devprop-base:1.3 newlock:1.3.0.4 newlock-base:1.3 ifpoll-base:1.3 nathanw_sa:1.1.0.10 thorpej-mips-cache:1.1.0.8 thorpej-mips-cache-base:1.1 thorpej-devvp-base3:1.1 thorpej-devvp-base2:1.1 post-chs-ubcperf:1.1 pre-chs-ubcperf:1.1 thorpej-devvp:1.1.0.4 thorpej-devvp-base:1.1 kqueue:1.1.0.6 kqueue-base:1.3 thorpej_scsipi_beforemerge:1.1 thorpej_scsipi_base:1.1 thorpej_scsipi:1.1.0.2 thorpej_scsipi_nbase:1.1; locks; strict; comment @// @; 1.8 date 2021.08.22.20.18.39; author andvar; state Exp; branches; next 1.7; commitid kw92ps04rdA6t06D; 1.7 date 2008.04.28.20.23.20; author martin; state Exp; branches; next 1.6; 1.6 date 2006.03.05.04.05.39; author uwe; state Exp; branches 1.6.2.1 1.6.68.1 1.6.70.1 1.6.72.1; next 1.5; 1.5 date 2005.12.11.12.17.28; author christos; state Exp; branches 1.5.4.1 1.5.6.1; next 1.4; 1.4 date 2004.08.06.18.33.09; author uch; state Exp; branches 1.4.12.1; next 1.3; 1.3 date 2002.02.11.17.08.57; author uch; state Exp; branches 1.3.16.1; next 1.2; 1.2 date 2002.02.04.17.38.27; author uch; state Exp; branches; next 1.1; 1.1 date 2001.02.09.18.35.19; author uch; state Exp; branches 1.1.2.1 1.1.6.1 1.1.10.1; next ; 1.6.2.1 date 2006.03.05.04.05.39; author uwe; state dead; branches; next 1.6.2.2; 1.6.2.2 date 2006.03.05.04.05.40; author uwe; state Exp; branches; next ; 1.6.68.1 date 2008.06.02.13.22.09; author mjf; state Exp; branches; next ; 1.6.70.1 date 2008.05.18.12.32.02; author yamt; state Exp; branches; next ; 1.6.72.1 date 2008.05.16.02.22.26; author yamt; state Exp; branches; next ; 1.5.4.1 date 2006.09.09.02.39.38; author rpaulo; state Exp; branches; next ; 1.5.6.1 date 2006.04.22.11.37.28; author simonb; state Exp; branches; next ; 1.4.12.1 date 2006.06.21.14.51.38; author yamt; state Exp; branches; next ; 1.3.16.1 date 2004.08.12.11.41.06; author skrll; state Exp; branches; next 1.3.16.2; 1.3.16.2 date 2004.09.18.14.34.46; author skrll; state Exp; branches; next 1.3.16.3; 1.3.16.3 date 2004.09.21.13.15.54; author skrll; state Exp; branches; next ; 1.1.2.1 date 2001.02.09.18.35.19; author bouyer; state dead; branches; next 1.1.2.2; 1.1.2.2 date 2001.02.11.19.10.13; author bouyer; state Exp; branches; next ; 1.1.6.1 date 2002.02.11.20.08.00; author jdolecek; state Exp; branches; next 1.1.6.2; 1.1.6.2 date 2002.03.16.15.57.52; author jdolecek; state Exp; branches; next ; 1.1.10.1 date 2002.02.28.04.09.46; author nathanw; state Exp; branches; next ; desc @@ 1.8 log @s/priviledge/privilege/ in comments/log messages and fix one typo in descriptor. @ text @/* $NetBSD: sh_mmu.cpp,v 1.7 2008/04/28 20:23:20 martin Exp $ */ /*- * Copyright (c) 2001, 2002 The NetBSD Foundation, Inc. * All rights reserved. * * This code is derived from software contributed to The NetBSD Foundation * by UCHIYAMA Yasushi. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. */ #include #include #include #include // // Get physical address from memory mapped TLB. // SH3 version. SH4 can't do this method. because address/data array must be // accessed from P2. // paddr_t MemoryManager_SHMMU::searchPage(vaddr_t vaddr) { uint32_t vpn, idx, s, dum, aae, dae, entry_idx, asid; paddr_t paddr = ~0; int way, kmode; vpn = vaddr & SH3_PAGE_MASK; // Windows CE uses VPN-only index-mode. idx = vaddr & SH3_MMU_VPN_MASK; kmode = SetKMode(1); // Get current ASID asid = _reg_read_4(SH3_PTEH) & SH3_PTEH_ASID_MASK; // to avoid another TLB access, disable external interrupt. s = suspendIntr(); do { // load target address page to TLB dum = _reg_read_4(vaddr); _reg_write_4(vaddr, dum); for (way = 0; way < SH3_MMU_WAY; way++) { entry_idx = idx | (way << SH3_MMU_WAY_SHIFT); // inquire MMU address array. aae = _reg_read_4(SH3_MMUAA | entry_idx); if (!(aae & SH3_MMU_D_VALID) || ((aae & SH3_MMUAA_D_ASID_MASK) != asid) || (((aae | idx) & SH3_PAGE_MASK) != vpn)) continue; // entry found. // inquire MMU data array to get its physical address. dae = _reg_read_4(SH3_MMUDA | entry_idx); paddr = (dae & SH3_PAGE_MASK) | (vaddr & ~SH3_PAGE_MASK); break; } } while (paddr == ~0); resumeIntr(s); SetKMode(kmode); return paddr; } void MemoryManager_SHMMU::CacheDump() { static const char *able[] = {"dis", "en" }; int write_through_p0_u0_p3; int write_through_p1; uint32_t r; int kmode; DPRINTF_SETUP(); kmode = SetKMode(1); switch (SHArchitecture::cpu_type()) { default: DPRINTF((TEXT("unknown architecture.\n"))); SetKMode(kmode); return; case 3: r = _reg_read_4(SH3_CCR); DPRINTF((TEXT("cache %Sabled"), able[(r & SH3_CCR_CE ? 1 : 0)])); if (r & SH3_CCR_RA) DPRINTF((TEXT(" ram-mode"))); write_through_p0_u0_p3 = r & SH3_CCR_WT; write_through_p1 = !(r & SH3_CCR_CB); break; case 4: r = _reg_read_4(SH4_CCR); DPRINTF((TEXT("I-cache %Sabled"), able[(r & SH4_CCR_ICE) ? 1 : 0])); if (r & SH4_CCR_IIX) DPRINTF((TEXT(" index-mode "))); DPRINTF((TEXT(" D-cache %Sabled"), able[(r & SH4_CCR_OCE) ? 1 : 0])); if (r & SH4_CCR_OIX) DPRINTF((TEXT(" index-mode"))); if (r & SH4_CCR_ORA) DPRINTF((TEXT(" ram-mode"))); write_through_p0_u0_p3 = r & SH4_CCR_WT; write_through_p1 = !(r & SH4_CCR_CB); break; } DPRINTF((TEXT("."))); // Write-through/back DPRINTF((TEXT(" P0, U0, P3 write-%S P1 write-%S\n"), write_through_p0_u0_p3 ? "through" : "back", write_through_p1 ? "through" : "back")); SetKMode(kmode); } void MemoryManager_SHMMU::MMUDump() { #define ON(x, c) ((x) & (c) ? '|' : '.') uint32_t r, e, a; int i, kmode; DPRINTF_SETUP(); kmode = SetKMode(1); DPRINTF((TEXT("MMU:\n"))); switch (SHArchitecture::cpu_type()) { default: DPRINTF((TEXT("unknown architecture.\n"))); SetKMode(kmode); return; case 3: r = _reg_read_4(SH3_MMUCR); if (!(r & SH3_MMUCR_AT)) goto disabled; // MMU configuration. DPRINTF((TEXT("%s index-mode, %s virtual storage mode\n"), r & SH3_MMUCR_IX ? TEXT("ASID + VPN") : TEXT("VPN only"), r & SH3_MMUCR_SV ? TEXT("single") : TEXT("multiple"))); // Dump TLB. DPRINTF((TEXT("---TLB---\n"))); DPRINTF((TEXT(" VPN ASID PFN VDCG PR SZ\n"))); for (i = 0; i < SH3_MMU_WAY; i++) { DPRINTF((TEXT(" [way %d]\n"), i)); for (e = 0; e < SH3_MMU_ENTRY; e++) { // address/data array common offset. a = (e << SH3_MMU_VPN_SHIFT) | (i << SH3_MMU_WAY_SHIFT); r = _reg_read_4(SH3_MMUAA | a); DPRINTF((TEXT("0x%08x %3d"), r & SH3_MMUAA_D_VPN_MASK, r & SH3_MMUAA_D_ASID_MASK)); r = _reg_read_4(SH3_MMUDA | a); DPRINTF((TEXT(" 0x%08x %c%c%c%c %d %dK\n"), r & SH3_MMUDA_D_PPN_MASK, ON(r, SH3_MMUDA_D_V), ON(r, SH3_MMUDA_D_D), ON(r, SH3_MMUDA_D_C), ON(r, SH3_MMUDA_D_SH), (r & SH3_MMUDA_D_PR_MASK) >> SH3_MMUDA_D_PR_SHIFT, r & SH3_MMUDA_D_SZ ? 4 : 1)); } } break; case 4: r = _reg_read_4(SH4_MMUCR); if (!(r & SH4_MMUCR_AT)) goto disabled; DPRINTF((TEXT("%s virtual storage mode,"), r & SH3_MMUCR_SV ? TEXT("single") : TEXT("multiple"))); DPRINTF((TEXT(" SQ access: (privilege%S)"), r & SH4_MMUCR_SQMD ? "" : "/user")); DPRINTF((TEXT("\n"))); #if sample_code // // Memory mapped TLB accessing program must run on P2. // This is sample code. // // Dump ITLB DPRINTF((TEXT("---ITLB---\n"))); for (i = 0; i < 4; i++) { e = i << SH4_ITLB_E_SHIFT; r = _reg_read_4(SH4_ITLB_AA | e); DPRINTF((TEXT("%08x %3d _%c"), r & SH4_ITLB_AA_VPN_MASK, r & SH4_ITLB_AA_ASID_MASK, ON(r, SH4_ITLB_AA_V))); r = _reg_read_4(SH4_ITLB_DA1 | e); DPRINTF((TEXT(" %08x %c%c_%c_ %1d"), r & SH4_ITLB_DA1_PPN_MASK, ON(r, SH4_ITLB_DA1_V), ON(r, SH4_ITLB_DA1_C), ON(r, SH4_ITLB_DA1_SH), (r & SH4_ITLB_DA1_PR) >> SH4_UTLB_DA1_PR_SHIFT )); r = _reg_read_4(SH4_ITLB_DA2 | e); DPRINTF((TEXT(" %c%d\n"), ON(r, SH4_ITLB_DA2_TC), r & SH4_ITLB_DA2_SA_MASK)); } // Dump UTLB DPRINTF((TEXT("---UTLB---\n"))); for (i = 0; i < 64; i++) { e = i << SH4_UTLB_E_SHIFT; r = _reg_read_4(SH4_UTLB_AA | e); DPRINTF((TEXT("%08x %3d %c%c"), r & SH4_UTLB_AA_VPN_MASK, ON(r, SH4_UTLB_AA_D), ON(r, SH4_UTLB_AA_V), r & SH4_UTLB_AA_ASID_MASK)); r = _reg_read_4(SH4_UTLB_DA1 | e); DPRINTF((TEXT(" %08x %c%c%c%c%c %1d"), r & SH4_UTLB_DA1_PPN_MASK, ON(r, SH4_UTLB_DA1_V), ON(r, SH4_UTLB_DA1_C), ON(r, SH4_UTLB_DA1_D), ON(r, SH4_UTLB_DA1_SH), ON(r, SH4_UTLB_DA1_WT), (r & SH4_UTLB_DA1_PR_MASK) >> SH4_UTLB_DA1_PR_SHIFT )); r = _reg_read_4(SH4_UTLB_DA2 | e); DPRINTF((TEXT(" %c%d\n"), ON(r, SH4_UTLB_DA2_TC), r & SH4_UTLB_DA2_SA_MASK)); } #endif //sample_code break; } SetKMode(kmode); return; disabled: DPRINTF((TEXT("disabled.\n"))); SetKMode(kmode); #undef ON } @ 1.7 log @Remove clause 3 and 4 from TNF licenses @ text @d1 1 a1 1 /* $NetBSD: sh_mmu.cpp,v 1.6 2006/03/05 04:05:39 uwe Exp $ */ d205 1 a205 1 DPRINTF((TEXT(" SQ access: (priviledge%S)"), @ 1.6 log @s/u_intN_t/uintN_t/ @ text @d1 1 a1 1 /* $NetBSD: sh_mmu.cpp,v 1.5 2005/12/11 12:17:28 christos Exp $ */ a17 7 * 3. All advertising materials mentioning features or use of this software * must display the following acknowledgement: * This product includes software developed by the NetBSD * Foundation, Inc. and its contributors. * 4. Neither the name of The NetBSD Foundation nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. @ 1.6.2.1 log @file sh_mmu.cpp was added on branch yamt-pdpolicy on 2006-03-05 04:05:40 +0000 @ text @d1 278 @ 1.6.2.2 log @s/u_intN_t/uintN_t/ @ text @a0 278 /* $NetBSD: sh_mmu.cpp,v 1.6 2006/03/05 04:05:39 uwe Exp $ */ /*- * Copyright (c) 2001, 2002 The NetBSD Foundation, Inc. * All rights reserved. * * This code is derived from software contributed to The NetBSD Foundation * by UCHIYAMA Yasushi. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * 3. All advertising materials mentioning features or use of this software * must display the following acknowledgement: * This product includes software developed by the NetBSD * Foundation, Inc. and its contributors. * 4. Neither the name of The NetBSD Foundation nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. */ #include #include #include #include // // Get physical address from memory mapped TLB. // SH3 version. SH4 can't do this method. because address/data array must be // accessed from P2. // paddr_t MemoryManager_SHMMU::searchPage(vaddr_t vaddr) { uint32_t vpn, idx, s, dum, aae, dae, entry_idx, asid; paddr_t paddr = ~0; int way, kmode; vpn = vaddr & SH3_PAGE_MASK; // Windows CE uses VPN-only index-mode. idx = vaddr & SH3_MMU_VPN_MASK; kmode = SetKMode(1); // Get current ASID asid = _reg_read_4(SH3_PTEH) & SH3_PTEH_ASID_MASK; // to avoid another TLB access, disable external interrupt. s = suspendIntr(); do { // load target address page to TLB dum = _reg_read_4(vaddr); _reg_write_4(vaddr, dum); for (way = 0; way < SH3_MMU_WAY; way++) { entry_idx = idx | (way << SH3_MMU_WAY_SHIFT); // inquire MMU address array. aae = _reg_read_4(SH3_MMUAA | entry_idx); if (!(aae & SH3_MMU_D_VALID) || ((aae & SH3_MMUAA_D_ASID_MASK) != asid) || (((aae | idx) & SH3_PAGE_MASK) != vpn)) continue; // entry found. // inquire MMU data array to get its physical address. dae = _reg_read_4(SH3_MMUDA | entry_idx); paddr = (dae & SH3_PAGE_MASK) | (vaddr & ~SH3_PAGE_MASK); break; } } while (paddr == ~0); resumeIntr(s); SetKMode(kmode); return paddr; } void MemoryManager_SHMMU::CacheDump() { static const char *able[] = {"dis", "en" }; int write_through_p0_u0_p3; int write_through_p1; uint32_t r; int kmode; DPRINTF_SETUP(); kmode = SetKMode(1); switch (SHArchitecture::cpu_type()) { default: DPRINTF((TEXT("unknown architecture.\n"))); SetKMode(kmode); return; case 3: r = _reg_read_4(SH3_CCR); DPRINTF((TEXT("cache %Sabled"), able[(r & SH3_CCR_CE ? 1 : 0)])); if (r & SH3_CCR_RA) DPRINTF((TEXT(" ram-mode"))); write_through_p0_u0_p3 = r & SH3_CCR_WT; write_through_p1 = !(r & SH3_CCR_CB); break; case 4: r = _reg_read_4(SH4_CCR); DPRINTF((TEXT("I-cache %Sabled"), able[(r & SH4_CCR_ICE) ? 1 : 0])); if (r & SH4_CCR_IIX) DPRINTF((TEXT(" index-mode "))); DPRINTF((TEXT(" D-cache %Sabled"), able[(r & SH4_CCR_OCE) ? 1 : 0])); if (r & SH4_CCR_OIX) DPRINTF((TEXT(" index-mode"))); if (r & SH4_CCR_ORA) DPRINTF((TEXT(" ram-mode"))); write_through_p0_u0_p3 = r & SH4_CCR_WT; write_through_p1 = !(r & SH4_CCR_CB); break; } DPRINTF((TEXT("."))); // Write-through/back DPRINTF((TEXT(" P0, U0, P3 write-%S P1 write-%S\n"), write_through_p0_u0_p3 ? "through" : "back", write_through_p1 ? "through" : "back")); SetKMode(kmode); } void MemoryManager_SHMMU::MMUDump() { #define ON(x, c) ((x) & (c) ? '|' : '.') uint32_t r, e, a; int i, kmode; DPRINTF_SETUP(); kmode = SetKMode(1); DPRINTF((TEXT("MMU:\n"))); switch (SHArchitecture::cpu_type()) { default: DPRINTF((TEXT("unknown architecture.\n"))); SetKMode(kmode); return; case 3: r = _reg_read_4(SH3_MMUCR); if (!(r & SH3_MMUCR_AT)) goto disabled; // MMU configuration. DPRINTF((TEXT("%s index-mode, %s virtual storage mode\n"), r & SH3_MMUCR_IX ? TEXT("ASID + VPN") : TEXT("VPN only"), r & SH3_MMUCR_SV ? TEXT("single") : TEXT("multiple"))); // Dump TLB. DPRINTF((TEXT("---TLB---\n"))); DPRINTF((TEXT(" VPN ASID PFN VDCG PR SZ\n"))); for (i = 0; i < SH3_MMU_WAY; i++) { DPRINTF((TEXT(" [way %d]\n"), i)); for (e = 0; e < SH3_MMU_ENTRY; e++) { // address/data array common offset. a = (e << SH3_MMU_VPN_SHIFT) | (i << SH3_MMU_WAY_SHIFT); r = _reg_read_4(SH3_MMUAA | a); DPRINTF((TEXT("0x%08x %3d"), r & SH3_MMUAA_D_VPN_MASK, r & SH3_MMUAA_D_ASID_MASK)); r = _reg_read_4(SH3_MMUDA | a); DPRINTF((TEXT(" 0x%08x %c%c%c%c %d %dK\n"), r & SH3_MMUDA_D_PPN_MASK, ON(r, SH3_MMUDA_D_V), ON(r, SH3_MMUDA_D_D), ON(r, SH3_MMUDA_D_C), ON(r, SH3_MMUDA_D_SH), (r & SH3_MMUDA_D_PR_MASK) >> SH3_MMUDA_D_PR_SHIFT, r & SH3_MMUDA_D_SZ ? 4 : 1)); } } break; case 4: r = _reg_read_4(SH4_MMUCR); if (!(r & SH4_MMUCR_AT)) goto disabled; DPRINTF((TEXT("%s virtual storage mode,"), r & SH3_MMUCR_SV ? TEXT("single") : TEXT("multiple"))); DPRINTF((TEXT(" SQ access: (priviledge%S)"), r & SH4_MMUCR_SQMD ? "" : "/user")); DPRINTF((TEXT("\n"))); #if sample_code // // Memory mapped TLB accessing program must run on P2. // This is sample code. // // Dump ITLB DPRINTF((TEXT("---ITLB---\n"))); for (i = 0; i < 4; i++) { e = i << SH4_ITLB_E_SHIFT; r = _reg_read_4(SH4_ITLB_AA | e); DPRINTF((TEXT("%08x %3d _%c"), r & SH4_ITLB_AA_VPN_MASK, r & SH4_ITLB_AA_ASID_MASK, ON(r, SH4_ITLB_AA_V))); r = _reg_read_4(SH4_ITLB_DA1 | e); DPRINTF((TEXT(" %08x %c%c_%c_ %1d"), r & SH4_ITLB_DA1_PPN_MASK, ON(r, SH4_ITLB_DA1_V), ON(r, SH4_ITLB_DA1_C), ON(r, SH4_ITLB_DA1_SH), (r & SH4_ITLB_DA1_PR) >> SH4_UTLB_DA1_PR_SHIFT )); r = _reg_read_4(SH4_ITLB_DA2 | e); DPRINTF((TEXT(" %c%d\n"), ON(r, SH4_ITLB_DA2_TC), r & SH4_ITLB_DA2_SA_MASK)); } // Dump UTLB DPRINTF((TEXT("---UTLB---\n"))); for (i = 0; i < 64; i++) { e = i << SH4_UTLB_E_SHIFT; r = _reg_read_4(SH4_UTLB_AA | e); DPRINTF((TEXT("%08x %3d %c%c"), r & SH4_UTLB_AA_VPN_MASK, ON(r, SH4_UTLB_AA_D), ON(r, SH4_UTLB_AA_V), r & SH4_UTLB_AA_ASID_MASK)); r = _reg_read_4(SH4_UTLB_DA1 | e); DPRINTF((TEXT(" %08x %c%c%c%c%c %1d"), r & SH4_UTLB_DA1_PPN_MASK, ON(r, SH4_UTLB_DA1_V), ON(r, SH4_UTLB_DA1_C), ON(r, SH4_UTLB_DA1_D), ON(r, SH4_UTLB_DA1_SH), ON(r, SH4_UTLB_DA1_WT), (r & SH4_UTLB_DA1_PR_MASK) >> SH4_UTLB_DA1_PR_SHIFT )); r = _reg_read_4(SH4_UTLB_DA2 | e); DPRINTF((TEXT(" %c%d\n"), ON(r, SH4_UTLB_DA2_TC), r & SH4_UTLB_DA2_SA_MASK)); } #endif //sample_code break; } SetKMode(kmode); return; disabled: DPRINTF((TEXT("disabled.\n"))); SetKMode(kmode); #undef ON } @ 1.6.68.1 log @Sync with HEAD. @ text @d1 1 a1 1 /* $NetBSD$ */ d18 7 @ 1.6.70.1 log @sync with head. @ text @d1 1 a1 1 /* $NetBSD: sh_mmu.cpp,v 1.6 2006/03/05 04:05:39 uwe Exp $ */ d18 7 @ 1.6.72.1 log @sync with head. @ text @d1 1 a1 1 /* $NetBSD: sh_mmu.cpp,v 1.6 2006/03/05 04:05:39 uwe Exp $ */ d18 7 @ 1.5 log @merge ktrace-lwp. @ text @d1 1 a1 1 /* $NetBSD: sh_mmu.cpp,v 1.3.16.3 2004/09/21 13:15:54 skrll Exp $ */ d53 1 a53 1 u_int32_t vpn, idx, s, dum, aae, dae, entry_idx, asid; d103 1 a103 1 u_int32_t r; d155 1 a155 1 u_int32_t r, e, a; @ 1.5.4.1 log @sync with head @ text @d1 1 a1 1 /* $NetBSD: sh_mmu.cpp,v 1.6 2006/03/05 04:05:39 uwe Exp $ */ d53 1 a53 1 uint32_t vpn, idx, s, dum, aae, dae, entry_idx, asid; d103 1 a103 1 uint32_t r; d155 1 a155 1 uint32_t r, e, a; @ 1.5.6.1 log @Sync with head. @ text @d1 1 a1 1 /* $NetBSD: sh_mmu.cpp,v 1.6 2006/03/05 04:05:39 uwe Exp $ */ d53 1 a53 1 uint32_t vpn, idx, s, dum, aae, dae, entry_idx, asid; d103 1 a103 1 uint32_t r; d155 1 a155 1 uint32_t r, e, a; @ 1.4 log @clean up whitespace. @ text @d1 1 a1 1 /* $NetBSD: sh_mmu.cpp,v 1.3 2002/02/11 17:08:57 uch Exp $ */ @ 1.4.12.1 log @sync with head. @ text @d1 1 a1 1 /* $NetBSD: sh_mmu.cpp,v 1.4 2004/08/06 18:33:09 uch Exp $ */ d53 1 a53 1 uint32_t vpn, idx, s, dum, aae, dae, entry_idx, asid; d103 1 a103 1 uint32_t r; d155 1 a155 1 uint32_t r, e, a; @ 1.3 log @totaly clean up SH3/SH4 related code @ text @d1 1 a1 1 /* $NetBSD: sh_mmu.cpp,v 1.2 2002/02/04 17:38:27 uch Exp $ */ d62 1 a62 1 // Get current ASID d77 1 a77 1 d111 1 a111 1 DPRINTF((TEXT("unknown architecture.\n"))); d143 1 a143 1 // Write-through/back d154 1 a154 1 #define ON(x, c) ((x) & (c) ? '|' : '.') d164 1 a164 1 DPRINTF((TEXT("unknown architecture.\n"))); d210 1 a210 1 DPRINTF((TEXT("%s virtual storage mode,"), d217 1 a217 1 // Memory mapped TLB accessing program must run on P2. d219 1 a219 1 // d239 1 a239 1 ON(r, SH4_ITLB_DA2_TC), @ 1.3.16.1 log @Sync with HEAD. @ text @d1 1 a1 1 /* $NetBSD: sh_mmu.cpp,v 1.3 2002/02/11 17:08:57 uch Exp $ */ d62 1 a62 1 // Get current ASID d77 1 a77 1 d111 1 a111 1 DPRINTF((TEXT("unknown architecture.\n"))); d143 1 a143 1 // Write-through/back d154 1 a154 1 #define ON(x, c) ((x) & (c) ? '|' : '.') d164 1 a164 1 DPRINTF((TEXT("unknown architecture.\n"))); d210 1 a210 1 DPRINTF((TEXT("%s virtual storage mode,"), d217 1 a217 1 // Memory mapped TLB accessing program must run on P2. d219 1 a219 1 // d239 1 a239 1 ON(r, SH4_ITLB_DA2_TC), @ 1.3.16.2 log @Sync with HEAD. @ text @d1 1 a1 1 /* $NetBSD: sh_mmu.cpp,v 1.4 2004/08/06 18:33:09 uch Exp $ */ @ 1.3.16.3 log @Fix the sync with head I botched. @ text @d1 1 a1 1 /* $NetBSD: sh_mmu.cpp,v 1.3.16.1 2004/08/12 11:41:06 skrll Exp $ */ @ 1.2 log @SH4 and HD64465(SH4 companion chip) serial console support. @ text @d1 1 a1 1 /* $NetBSD: sh_mmu.cpp,v 1.1 2001/02/09 18:35:19 uch Exp $ */ d42 2 a43 11 BOOL MemoryManager_SHMMU::init(void) { _kmode = SetKMode(1); _asid = VOLATILE_REF(MMUPTEH) & MMUPTEH_ASID_MASK; DPRINTF((TEXT("ASID = %d\n"), _asid)); return TRUE; } d45 5 a49 7 MemoryManager_SHMMU::~MemoryManager_SHMMU(void) { SetKMode(_kmode); } // get physical address from memory mapped TLB. d53 1 a53 1 u_int32_t vpn, idx, s, dum, aae, dae, entry_idx; d55 1 a55 1 int way; d59 5 a63 1 idx = vaddr & MMUAA_VPN_MASK; d70 2 a71 2 dum = VOLATILE_REF(vaddr); VOLATILE_REF(vaddr) = dum; d73 2 a74 2 for (way = 0; way < MMU_WAY; way++) { entry_idx = idx | (way << MMUAA_WAY_SHIFT); d76 1 a76 1 aae = VOLATILE_REF(MMUAA | entry_idx); d78 2 a79 2 if (!(aae & MMUAA_D_VALID) || ((aae & MMUAA_D_ASID_MASK) != _asid) || d85 1 a85 1 dae = VOLATILE_REF(MMUDA | entry_idx); d92 1 d97 182 @ 1.1 log @bootloader for SH3, SA-1100, TX39, VR41 based Windows CE(2.00 or later) @ text @d1 1 a1 1 /* $NetBSD$ */ d4 1 a4 1 * Copyright (c) 2001 The NetBSD Foundation, Inc. d45 1 d56 1 d68 1 a68 1 vpn = vaddr & PAGE_MASK; d87 1 a87 1 (((aae | idx) & PAGE_MASK) != vpn)) d93 1 a93 1 paddr = (dae & PAGE_MASK) | (vaddr & ~PAGE_MASK); @ 1.1.2.1 log @file sh_mmu.cpp was added on branch thorpej_scsipi on 2001-02-11 19:10:13 +0000 @ text @d1 100 @ 1.1.2.2 log @Sync with HEAD. @ text @a0 100 /* $NetBSD: sh_mmu.cpp,v 1.1.2.1 2001/02/11 19:10:13 bouyer Exp $ */ /*- * Copyright (c) 2001 The NetBSD Foundation, Inc. * All rights reserved. * * This code is derived from software contributed to The NetBSD Foundation * by UCHIYAMA Yasushi. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * 3. All advertising materials mentioning features or use of this software * must display the following acknowledgement: * This product includes software developed by the NetBSD * Foundation, Inc. and its contributors. * 4. Neither the name of The NetBSD Foundation nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. */ #include #include BOOL MemoryManager_SHMMU::init(void) { _kmode = SetKMode(1); _asid = VOLATILE_REF(MMUPTEH) & MMUPTEH_ASID_MASK; DPRINTF((TEXT("ASID = %d\n"), _asid)); return TRUE; } MemoryManager_SHMMU::~MemoryManager_SHMMU(void) { SetKMode(_kmode); } // get physical address from memory mapped TLB. paddr_t MemoryManager_SHMMU::searchPage(vaddr_t vaddr) { u_int32_t vpn, idx, s, dum, aae, dae, entry_idx; paddr_t paddr = ~0; int way; vpn = vaddr & PAGE_MASK; // Windows CE uses VPN-only index-mode. idx = vaddr & MMUAA_VPN_MASK; // to avoid another TLB access, disable external interrupt. s = suspendIntr(); do { // load target address page to TLB dum = VOLATILE_REF(vaddr); VOLATILE_REF(vaddr) = dum; for (way = 0; way < MMU_WAY; way++) { entry_idx = idx | (way << MMUAA_WAY_SHIFT); // inquire MMU address array. aae = VOLATILE_REF(MMUAA | entry_idx); if (!(aae & MMUAA_D_VALID) || ((aae & MMUAA_D_ASID_MASK) != _asid) || (((aae | idx) & PAGE_MASK) != vpn)) continue; // entry found. // inquire MMU data array to get its physical address. dae = VOLATILE_REF(MMUDA | entry_idx); paddr = (dae & PAGE_MASK) | (vaddr & ~PAGE_MASK); break; } } while (paddr == ~0); resumeIntr(s); return paddr; } @ 1.1.10.1 log @Catch up to -current. @ text @d1 1 a1 1 /* $NetBSD: sh_mmu.cpp,v 1.1 2001/02/09 18:35:19 uch Exp $ */ d4 1 a4 1 * Copyright (c) 2001, 2002 The NetBSD Foundation, Inc. d42 7 a48 2 #include #include d50 9 a58 5 // // Get physical address from memory mapped TLB. // SH3 version. SH4 can't do this method. because address/data array must be // accessed from P2. // d62 1 a62 1 u_int32_t vpn, idx, s, dum, aae, dae, entry_idx, asid; d64 1 a64 1 int way, kmode; d66 1 a66 1 vpn = vaddr & SH3_PAGE_MASK; d68 1 a68 5 idx = vaddr & SH3_MMU_VPN_MASK; kmode = SetKMode(1); // Get current ASID asid = _reg_read_4(SH3_PTEH) & SH3_PTEH_ASID_MASK; d75 2 a76 2 dum = _reg_read_4(vaddr); _reg_write_4(vaddr, dum); d78 2 a79 2 for (way = 0; way < SH3_MMU_WAY; way++) { entry_idx = idx | (way << SH3_MMU_WAY_SHIFT); d81 1 a81 1 aae = _reg_read_4(SH3_MMUAA | entry_idx); d83 3 a85 3 if (!(aae & SH3_MMU_D_VALID) || ((aae & SH3_MMUAA_D_ASID_MASK) != asid) || (((aae | idx) & SH3_PAGE_MASK) != vpn)) d90 2 a91 2 dae = _reg_read_4(SH3_MMUDA | entry_idx); paddr = (dae & SH3_PAGE_MASK) | (vaddr & ~SH3_PAGE_MASK); a96 1 SetKMode(kmode); a100 182 void MemoryManager_SHMMU::CacheDump() { static const char *able[] = {"dis", "en" }; int write_through_p0_u0_p3; int write_through_p1; u_int32_t r; int kmode; DPRINTF_SETUP(); kmode = SetKMode(1); switch (SHArchitecture::cpu_type()) { default: DPRINTF((TEXT("unknown architecture.\n"))); SetKMode(kmode); return; case 3: r = _reg_read_4(SH3_CCR); DPRINTF((TEXT("cache %Sabled"), able[(r & SH3_CCR_CE ? 1 : 0)])); if (r & SH3_CCR_RA) DPRINTF((TEXT(" ram-mode"))); write_through_p0_u0_p3 = r & SH3_CCR_WT; write_through_p1 = !(r & SH3_CCR_CB); break; case 4: r = _reg_read_4(SH4_CCR); DPRINTF((TEXT("I-cache %Sabled"), able[(r & SH4_CCR_ICE) ? 1 : 0])); if (r & SH4_CCR_IIX) DPRINTF((TEXT(" index-mode "))); DPRINTF((TEXT(" D-cache %Sabled"), able[(r & SH4_CCR_OCE) ? 1 : 0])); if (r & SH4_CCR_OIX) DPRINTF((TEXT(" index-mode"))); if (r & SH4_CCR_ORA) DPRINTF((TEXT(" ram-mode"))); write_through_p0_u0_p3 = r & SH4_CCR_WT; write_through_p1 = !(r & SH4_CCR_CB); break; } DPRINTF((TEXT("."))); // Write-through/back DPRINTF((TEXT(" P0, U0, P3 write-%S P1 write-%S\n"), write_through_p0_u0_p3 ? "through" : "back", write_through_p1 ? "through" : "back")); SetKMode(kmode); } void MemoryManager_SHMMU::MMUDump() { #define ON(x, c) ((x) & (c) ? '|' : '.') u_int32_t r, e, a; int i, kmode; DPRINTF_SETUP(); kmode = SetKMode(1); DPRINTF((TEXT("MMU:\n"))); switch (SHArchitecture::cpu_type()) { default: DPRINTF((TEXT("unknown architecture.\n"))); SetKMode(kmode); return; case 3: r = _reg_read_4(SH3_MMUCR); if (!(r & SH3_MMUCR_AT)) goto disabled; // MMU configuration. DPRINTF((TEXT("%s index-mode, %s virtual storage mode\n"), r & SH3_MMUCR_IX ? TEXT("ASID + VPN") : TEXT("VPN only"), r & SH3_MMUCR_SV ? TEXT("single") : TEXT("multiple"))); // Dump TLB. DPRINTF((TEXT("---TLB---\n"))); DPRINTF((TEXT(" VPN ASID PFN VDCG PR SZ\n"))); for (i = 0; i < SH3_MMU_WAY; i++) { DPRINTF((TEXT(" [way %d]\n"), i)); for (e = 0; e < SH3_MMU_ENTRY; e++) { // address/data array common offset. a = (e << SH3_MMU_VPN_SHIFT) | (i << SH3_MMU_WAY_SHIFT); r = _reg_read_4(SH3_MMUAA | a); DPRINTF((TEXT("0x%08x %3d"), r & SH3_MMUAA_D_VPN_MASK, r & SH3_MMUAA_D_ASID_MASK)); r = _reg_read_4(SH3_MMUDA | a); DPRINTF((TEXT(" 0x%08x %c%c%c%c %d %dK\n"), r & SH3_MMUDA_D_PPN_MASK, ON(r, SH3_MMUDA_D_V), ON(r, SH3_MMUDA_D_D), ON(r, SH3_MMUDA_D_C), ON(r, SH3_MMUDA_D_SH), (r & SH3_MMUDA_D_PR_MASK) >> SH3_MMUDA_D_PR_SHIFT, r & SH3_MMUDA_D_SZ ? 4 : 1)); } } break; case 4: r = _reg_read_4(SH4_MMUCR); if (!(r & SH4_MMUCR_AT)) goto disabled; DPRINTF((TEXT("%s virtual storage mode,"), r & SH3_MMUCR_SV ? TEXT("single") : TEXT("multiple"))); DPRINTF((TEXT(" SQ access: (priviledge%S)"), r & SH4_MMUCR_SQMD ? "" : "/user")); DPRINTF((TEXT("\n"))); #if sample_code // // Memory mapped TLB accessing program must run on P2. // This is sample code. // // Dump ITLB DPRINTF((TEXT("---ITLB---\n"))); for (i = 0; i < 4; i++) { e = i << SH4_ITLB_E_SHIFT; r = _reg_read_4(SH4_ITLB_AA | e); DPRINTF((TEXT("%08x %3d _%c"), r & SH4_ITLB_AA_VPN_MASK, r & SH4_ITLB_AA_ASID_MASK, ON(r, SH4_ITLB_AA_V))); r = _reg_read_4(SH4_ITLB_DA1 | e); DPRINTF((TEXT(" %08x %c%c_%c_ %1d"), r & SH4_ITLB_DA1_PPN_MASK, ON(r, SH4_ITLB_DA1_V), ON(r, SH4_ITLB_DA1_C), ON(r, SH4_ITLB_DA1_SH), (r & SH4_ITLB_DA1_PR) >> SH4_UTLB_DA1_PR_SHIFT )); r = _reg_read_4(SH4_ITLB_DA2 | e); DPRINTF((TEXT(" %c%d\n"), ON(r, SH4_ITLB_DA2_TC), r & SH4_ITLB_DA2_SA_MASK)); } // Dump UTLB DPRINTF((TEXT("---UTLB---\n"))); for (i = 0; i < 64; i++) { e = i << SH4_UTLB_E_SHIFT; r = _reg_read_4(SH4_UTLB_AA | e); DPRINTF((TEXT("%08x %3d %c%c"), r & SH4_UTLB_AA_VPN_MASK, ON(r, SH4_UTLB_AA_D), ON(r, SH4_UTLB_AA_V), r & SH4_UTLB_AA_ASID_MASK)); r = _reg_read_4(SH4_UTLB_DA1 | e); DPRINTF((TEXT(" %08x %c%c%c%c%c %1d"), r & SH4_UTLB_DA1_PPN_MASK, ON(r, SH4_UTLB_DA1_V), ON(r, SH4_UTLB_DA1_C), ON(r, SH4_UTLB_DA1_D), ON(r, SH4_UTLB_DA1_SH), ON(r, SH4_UTLB_DA1_WT), (r & SH4_UTLB_DA1_PR_MASK) >> SH4_UTLB_DA1_PR_SHIFT )); r = _reg_read_4(SH4_UTLB_DA2 | e); DPRINTF((TEXT(" %c%d\n"), ON(r, SH4_UTLB_DA2_TC), r & SH4_UTLB_DA2_SA_MASK)); } #endif //sample_code break; } SetKMode(kmode); return; disabled: DPRINTF((TEXT("disabled.\n"))); SetKMode(kmode); #undef ON } @ 1.1.6.1 log @Sync w/ -current. @ text @d1 1 a1 1 /* $NetBSD: sh_mmu.cpp,v 1.1 2001/02/09 18:35:19 uch Exp $ */ d4 1 a4 1 * Copyright (c) 2001, 2002 The NetBSD Foundation, Inc. a44 1 a54 1 d66 1 a66 1 vpn = vaddr & SH3_PAGE_MASK; d85 1 a85 1 (((aae | idx) & SH3_PAGE_MASK) != vpn)) d91 1 a91 1 paddr = (dae & SH3_PAGE_MASK) | (vaddr & ~SH3_PAGE_MASK); @ 1.1.6.2 log @Catch up with -current. @ text @d1 1 a1 1 /* $NetBSD: sh_mmu.cpp,v 1.1.6.1 2002/02/11 20:08:00 jdolecek Exp $ */ d42 11 a52 2 #include #include d54 7 a60 5 // // Get physical address from memory mapped TLB. // SH3 version. SH4 can't do this method. because address/data array must be // accessed from P2. // d64 1 a64 1 u_int32_t vpn, idx, s, dum, aae, dae, entry_idx, asid; d66 1 a66 1 int way, kmode; d70 1 a70 5 idx = vaddr & SH3_MMU_VPN_MASK; kmode = SetKMode(1); // Get current ASID asid = _reg_read_4(SH3_PTEH) & SH3_PTEH_ASID_MASK; d77 2 a78 2 dum = _reg_read_4(vaddr); _reg_write_4(vaddr, dum); d80 2 a81 2 for (way = 0; way < SH3_MMU_WAY; way++) { entry_idx = idx | (way << SH3_MMU_WAY_SHIFT); d83 1 a83 1 aae = _reg_read_4(SH3_MMUAA | entry_idx); d85 2 a86 2 if (!(aae & SH3_MMU_D_VALID) || ((aae & SH3_MMUAA_D_ASID_MASK) != asid) || d92 1 a92 1 dae = _reg_read_4(SH3_MMUDA | entry_idx); a98 1 SetKMode(kmode); a102 182 void MemoryManager_SHMMU::CacheDump() { static const char *able[] = {"dis", "en" }; int write_through_p0_u0_p3; int write_through_p1; u_int32_t r; int kmode; DPRINTF_SETUP(); kmode = SetKMode(1); switch (SHArchitecture::cpu_type()) { default: DPRINTF((TEXT("unknown architecture.\n"))); SetKMode(kmode); return; case 3: r = _reg_read_4(SH3_CCR); DPRINTF((TEXT("cache %Sabled"), able[(r & SH3_CCR_CE ? 1 : 0)])); if (r & SH3_CCR_RA) DPRINTF((TEXT(" ram-mode"))); write_through_p0_u0_p3 = r & SH3_CCR_WT; write_through_p1 = !(r & SH3_CCR_CB); break; case 4: r = _reg_read_4(SH4_CCR); DPRINTF((TEXT("I-cache %Sabled"), able[(r & SH4_CCR_ICE) ? 1 : 0])); if (r & SH4_CCR_IIX) DPRINTF((TEXT(" index-mode "))); DPRINTF((TEXT(" D-cache %Sabled"), able[(r & SH4_CCR_OCE) ? 1 : 0])); if (r & SH4_CCR_OIX) DPRINTF((TEXT(" index-mode"))); if (r & SH4_CCR_ORA) DPRINTF((TEXT(" ram-mode"))); write_through_p0_u0_p3 = r & SH4_CCR_WT; write_through_p1 = !(r & SH4_CCR_CB); break; } DPRINTF((TEXT("."))); // Write-through/back DPRINTF((TEXT(" P0, U0, P3 write-%S P1 write-%S\n"), write_through_p0_u0_p3 ? "through" : "back", write_through_p1 ? "through" : "back")); SetKMode(kmode); } void MemoryManager_SHMMU::MMUDump() { #define ON(x, c) ((x) & (c) ? '|' : '.') u_int32_t r, e, a; int i, kmode; DPRINTF_SETUP(); kmode = SetKMode(1); DPRINTF((TEXT("MMU:\n"))); switch (SHArchitecture::cpu_type()) { default: DPRINTF((TEXT("unknown architecture.\n"))); SetKMode(kmode); return; case 3: r = _reg_read_4(SH3_MMUCR); if (!(r & SH3_MMUCR_AT)) goto disabled; // MMU configuration. DPRINTF((TEXT("%s index-mode, %s virtual storage mode\n"), r & SH3_MMUCR_IX ? TEXT("ASID + VPN") : TEXT("VPN only"), r & SH3_MMUCR_SV ? TEXT("single") : TEXT("multiple"))); // Dump TLB. DPRINTF((TEXT("---TLB---\n"))); DPRINTF((TEXT(" VPN ASID PFN VDCG PR SZ\n"))); for (i = 0; i < SH3_MMU_WAY; i++) { DPRINTF((TEXT(" [way %d]\n"), i)); for (e = 0; e < SH3_MMU_ENTRY; e++) { // address/data array common offset. a = (e << SH3_MMU_VPN_SHIFT) | (i << SH3_MMU_WAY_SHIFT); r = _reg_read_4(SH3_MMUAA | a); DPRINTF((TEXT("0x%08x %3d"), r & SH3_MMUAA_D_VPN_MASK, r & SH3_MMUAA_D_ASID_MASK)); r = _reg_read_4(SH3_MMUDA | a); DPRINTF((TEXT(" 0x%08x %c%c%c%c %d %dK\n"), r & SH3_MMUDA_D_PPN_MASK, ON(r, SH3_MMUDA_D_V), ON(r, SH3_MMUDA_D_D), ON(r, SH3_MMUDA_D_C), ON(r, SH3_MMUDA_D_SH), (r & SH3_MMUDA_D_PR_MASK) >> SH3_MMUDA_D_PR_SHIFT, r & SH3_MMUDA_D_SZ ? 4 : 1)); } } break; case 4: r = _reg_read_4(SH4_MMUCR); if (!(r & SH4_MMUCR_AT)) goto disabled; DPRINTF((TEXT("%s virtual storage mode,"), r & SH3_MMUCR_SV ? TEXT("single") : TEXT("multiple"))); DPRINTF((TEXT(" SQ access: (priviledge%S)"), r & SH4_MMUCR_SQMD ? "" : "/user")); DPRINTF((TEXT("\n"))); #if sample_code // // Memory mapped TLB accessing program must run on P2. // This is sample code. // // Dump ITLB DPRINTF((TEXT("---ITLB---\n"))); for (i = 0; i < 4; i++) { e = i << SH4_ITLB_E_SHIFT; r = _reg_read_4(SH4_ITLB_AA | e); DPRINTF((TEXT("%08x %3d _%c"), r & SH4_ITLB_AA_VPN_MASK, r & SH4_ITLB_AA_ASID_MASK, ON(r, SH4_ITLB_AA_V))); r = _reg_read_4(SH4_ITLB_DA1 | e); DPRINTF((TEXT(" %08x %c%c_%c_ %1d"), r & SH4_ITLB_DA1_PPN_MASK, ON(r, SH4_ITLB_DA1_V), ON(r, SH4_ITLB_DA1_C), ON(r, SH4_ITLB_DA1_SH), (r & SH4_ITLB_DA1_PR) >> SH4_UTLB_DA1_PR_SHIFT )); r = _reg_read_4(SH4_ITLB_DA2 | e); DPRINTF((TEXT(" %c%d\n"), ON(r, SH4_ITLB_DA2_TC), r & SH4_ITLB_DA2_SA_MASK)); } // Dump UTLB DPRINTF((TEXT("---UTLB---\n"))); for (i = 0; i < 64; i++) { e = i << SH4_UTLB_E_SHIFT; r = _reg_read_4(SH4_UTLB_AA | e); DPRINTF((TEXT("%08x %3d %c%c"), r & SH4_UTLB_AA_VPN_MASK, ON(r, SH4_UTLB_AA_D), ON(r, SH4_UTLB_AA_V), r & SH4_UTLB_AA_ASID_MASK)); r = _reg_read_4(SH4_UTLB_DA1 | e); DPRINTF((TEXT(" %08x %c%c%c%c%c %1d"), r & SH4_UTLB_DA1_PPN_MASK, ON(r, SH4_UTLB_DA1_V), ON(r, SH4_UTLB_DA1_C), ON(r, SH4_UTLB_DA1_D), ON(r, SH4_UTLB_DA1_SH), ON(r, SH4_UTLB_DA1_WT), (r & SH4_UTLB_DA1_PR_MASK) >> SH4_UTLB_DA1_PR_SHIFT )); r = _reg_read_4(SH4_UTLB_DA2 | e); DPRINTF((TEXT(" %c%d\n"), ON(r, SH4_UTLB_DA2_TC), r & SH4_UTLB_DA2_SA_MASK)); } #endif //sample_code break; } SetKMode(kmode); return; disabled: DPRINTF((TEXT("disabled.\n"))); SetKMode(kmode); #undef ON } @