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locks; strict; comment @# @; 1.1 date 2011.06.20.05.54.39; author mrg; state Exp; branches 1.1.1.1; next ; 1.1.1.1 date 2011.06.20.05.54.39; author mrg; state Exp; branches; next 1.1.1.2; 1.1.1.2 date 2017.08.22.09.40.49; author mrg; state Exp; branches; next ; commitid W5kmAIk8hwVpSb4A; desc @@ 1.1 log @Initial revision @ text @Copyright 2003, 2004, 2006, 2008 Free Software Foundation, Inc. This file is part of the GNU MP Library. The GNU MP Library is free software; you can redistribute it and/or modify it under the terms of the GNU Lesser General Public License as published by the Free Software Foundation; either version 3 of the License, or (at your option) any later version. The GNU MP Library is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU Lesser General Public License for more details. You should have received a copy of the GNU Lesser General Public License along with the GNU MP Library. If not, see http://www.gnu.org/licenses/. AMD64 MPN SUBROUTINES This directory contains mpn functions for AMD64 chips. It is also useful for 64-bit Pentiums, and "Core 2". RELEVANT OPTIMIZATION ISSUES The Opteron and Athlon64 can sustain up to 3 instructions per cycle, but in practice that is only possible for integer instructions. But almost any three integer instructions can issue simultaneously, including any 3 ALU operations, including shifts. Up to two memory operations can issue each cycle. Scheduling typically requires that load-use instructions are split into separate load and use instructions. That requires more decode resources, and it is rarely a win. Opteron/Athlon64 have deep out-of-order core. Optimizing for 64-bit Pentium4 is probably a waste of time, as the most critical instructions are very poorly implemented here. Perhaps we could save a cycle or two, but the most common loops now run at between 10 and 22 cycles, so a saved cycle isn't too exciting. The new spin of the venerable P6 core, the "Core 2" is much better than the Pentium4 for the GMP loops. Its integer pipeline is somewhat similar to to the Opteron/Athlon64 pipeline, except that the GMP favourites ADC/SBB and MUL are slower. Furthermore, an INC/DEC followed by ADC/SBB incur a pipeline stall of around 10 cycles. The default mpn_add_n and mpn_sub_n code suffers badly from the stall. The code in the core2 subdirectory uses the almost forgotten instruction JRCXZ for loop control, and updates the induction variable using LEA. REFERENCES "System V Application Binary Interface AMD64 Architecture Processor Supplement", draft version 0.99, December 2007. http://www.x86-64.org/documentation/abi.pdf @ 1.1.1.1 log @initial import of GMP 5.0.2. GNU MP is a library for arbitrary precision arithmetic, operating on signed integers, rational numbers, and floating point numbers. It has a rich set of functions, and the functions have a regular interface. GMP is necessary for GCC >= 4.2. @ text @@ 1.1.1.2 log @initial import of GMP 6.1.2. main changes from 5.1.3 below. notes: - support for thumb-less ARM chips was in our port of 5.1.3, but a similar method has been provided upstream now - someone should look at the AVX failure reports, and fix them Changes between GMP version 6.1.0 and 6.1.1 FEATURES * Work around faulty cpuid on some recent Intel chips (this allows GMP to run on Skylake Pentiums). * Support thumb-less ARM chips. Changes between GMP version 6.0.* and 6.1.0 BUGS FIXED * The public function mpn_com is now correctly declared in gmp.h. * Healed possible failures of mpn_sec_sqr for non-cryptographic sizes for some obsolete CPUs. * Various problems related to precision for mpf have been fixed. * Fixed ABI incompatible stack alignment in calls from assembly code. * Fixed PIC bug in popcount affecting Intel processors using the 32-bit ABI. SPEEDUPS * Speedup for Intel Broadwell and Skylake through assembly code making use of new ADX instructions. * Square root is now faster when the remainder is not needed. Also the speed to compute the k-th root improved, for small sizes. FEATURES * New C++ functions gcd and lcm for mpz_class. * New public mpn functions mpn_divexact_1, mpn_zero_p, and mpn_cnd_swap. * New public mpq_cmp_z function, to efficiently compare rationals with integers. * Support for more 32-bit arm processors. * Support for AVX-less modern x86 CPUs. (Such support might be missing either because the CPU vendor chose to disable AVX, or because the running kernel lacks AVX context switch support.) * Support for NetBSD under Xen; we switch off AVX unconditionally under NetBSD since a bug in NetBSD makes AVX fail under Xen. MISC * Tuned values for FFT multiplications are provided for larger number on many platforms. Changes between GMP version 5.1.* and 6.0.0 BUGS FIXED * The function mpz_invert now considers any number invertible in Z/1Z. * The mpn multiply code now handles operands of more than 2^31 limbs correctly. (Note however that the mpz code is limited to 2^32 bits on 32-bit hosts and 2^37 bits on 64-bit hosts.) SPEEDUPS * Plain division of large operands is faster and more monotonous in operand size. * Major speedup for ARM, in particular ARM Cortex-A15, thanks to improved assembly. * Speedup for Intel Sandy Bridge, Ivy Bridge, Haswell, thanks to rewritten and vastly expanded assembly support. Speedup also for the older Core 2 and Nehalem. * Faster mixed arithmetic between mpq_class and double. FEATURES * Support for new Intel and AMD CPUs. * New public functions mpn_sec_mul and mpn_sec_sqr, implementing side-channel silent multiplication and squaring. * New public functions mpn_sec_div_qr and mpn_sec_div_r, implementing side-channel silent division. * New public functions mpn_cnd_add_n and mpn_cnd_sub_n. Side-channel silent conditional addition and subtraction. * New public function mpn_sec_powm, implementing side-channel silent modexp. * New public function mpn_sec_invert, implementing side-channel silent modular inversion. * Better support for applications which use the mpz_t type, but nevertheless need to call some of the lower-level mpn functions. See the documentation for mpz_limbs_read and related functions. @ text @d6 3 a8 13 it under the terms of either: * the GNU Lesser General Public License as published by the Free Software Foundation; either version 3 of the License, or (at your option) any later version. or * the GNU General Public License as published by the Free Software Foundation; either version 2 of the License, or (at your option) any later version. or both in parallel, as here. d12 2 a13 2 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details. d15 2 a16 3 You should have received copies of the GNU General Public License and the GNU Lesser General Public License along with the GNU MP Library. If not, see https://www.gnu.org/licenses/. @