head 1.1; branch 1.1.1; access; symbols netbsd-11-0-RC5:1.1.1.2 netbsd-11-0-RC4:1.1.1.2 netbsd-11-0-RC3:1.1.1.2 netbsd-11-0-RC2:1.1.1.2 netbsd-11-0-RC1:1.1.1.2 perseant-exfatfs-base-20250801:1.1.1.2 netbsd-11:1.1.1.2.0.18 netbsd-11-base:1.1.1.2 netbsd-10-1-RELEASE:1.1.1.2 perseant-exfatfs-base-20240630:1.1.1.2 perseant-exfatfs:1.1.1.2.0.16 perseant-exfatfs-base:1.1.1.2 netbsd-8-3-RELEASE:1.1.1.1 netbsd-9-4-RELEASE:1.1.1.2 netbsd-10-0-RELEASE:1.1.1.2 netbsd-10-0-RC6:1.1.1.2 netbsd-10-0-RC5:1.1.1.2 netbsd-10-0-RC4:1.1.1.2 netbsd-10-0-RC3:1.1.1.2 netbsd-10-0-RC2:1.1.1.2 netbsd-10-0-RC1:1.1.1.2 netbsd-10:1.1.1.2.0.14 netbsd-10-base:1.1.1.2 netbsd-9-3-RELEASE:1.1.1.2 gmp-6-2-1:1.1.1.2 cjep_sun2x-base1:1.1.1.2 cjep_sun2x:1.1.1.2.0.12 cjep_sun2x-base:1.1.1.2 cjep_staticlib_x-base1:1.1.1.2 netbsd-9-2-RELEASE:1.1.1.2 cjep_staticlib_x:1.1.1.2.0.10 cjep_staticlib_x-base:1.1.1.2 netbsd-9-1-RELEASE:1.1.1.2 gmp-6-2-0:1.1.1.2 phil-wifi-20200421:1.1.1.2 phil-wifi-20200411:1.1.1.2 is-mlppp:1.1.1.2.0.8 is-mlppp-base:1.1.1.2 phil-wifi-20200406:1.1.1.2 netbsd-8-2-RELEASE:1.1.1.1 netbsd-9-0-RELEASE:1.1.1.2 netbsd-9-0-RC2:1.1.1.2 netbsd-9-0-RC1:1.1.1.2 phil-wifi-20191119:1.1.1.2 netbsd-9:1.1.1.2.0.6 netbsd-9-base:1.1.1.2 phil-wifi-20190609:1.1.1.2 netbsd-8-1-RELEASE:1.1.1.1 netbsd-8-1-RC1:1.1.1.1 pgoyette-compat-merge-20190127:1.1.1.2 pgoyette-compat-20190127:1.1.1.2 pgoyette-compat-20190118:1.1.1.2 pgoyette-compat-1226:1.1.1.2 pgoyette-compat-1126:1.1.1.2 pgoyette-compat-1020:1.1.1.2 pgoyette-compat-0930:1.1.1.2 pgoyette-compat-0906:1.1.1.2 netbsd-7-2-RELEASE:1.1.1.1 pgoyette-compat-0728:1.1.1.2 netbsd-8-0-RELEASE:1.1.1.1 phil-wifi:1.1.1.2.0.4 phil-wifi-base:1.1.1.2 pgoyette-compat-0625:1.1.1.2 netbsd-8-0-RC2:1.1.1.1 pgoyette-compat-0521:1.1.1.2 pgoyette-compat-0502:1.1.1.2 pgoyette-compat-0422:1.1.1.2 netbsd-8-0-RC1:1.1.1.1 pgoyette-compat-0415:1.1.1.2 pgoyette-compat-0407:1.1.1.2 pgoyette-compat-0330:1.1.1.2 pgoyette-compat-0322:1.1.1.2 pgoyette-compat-0315:1.1.1.2 netbsd-7-1-2-RELEASE:1.1.1.1 pgoyette-compat:1.1.1.2.0.2 pgoyette-compat-base:1.1.1.2 netbsd-7-1-1-RELEASE:1.1.1.1 matt-nb8-mediatek:1.1.1.1.0.26 matt-nb8-mediatek-base:1.1.1.1 gmp-6-1-2:1.1.1.2 perseant-stdc-iso10646:1.1.1.1.0.24 perseant-stdc-iso10646-base:1.1.1.1 netbsd-8:1.1.1.1.0.22 netbsd-8-base:1.1.1.1 prg-localcount2-base3:1.1.1.1 prg-localcount2-base2:1.1.1.1 prg-localcount2-base1:1.1.1.1 prg-localcount2:1.1.1.1.0.20 prg-localcount2-base:1.1.1.1 pgoyette-localcount-20170426:1.1.1.1 bouyer-socketcan-base1:1.1.1.1 pgoyette-localcount-20170320:1.1.1.1 netbsd-7-1:1.1.1.1.0.18 netbsd-7-1-RELEASE:1.1.1.1 netbsd-7-1-RC2:1.1.1.1 netbsd-7-nhusb-base-20170116:1.1.1.1 bouyer-socketcan:1.1.1.1.0.16 bouyer-socketcan-base:1.1.1.1 pgoyette-localcount-20170107:1.1.1.1 netbsd-7-1-RC1:1.1.1.1 pgoyette-localcount-20161104:1.1.1.1 netbsd-7-0-2-RELEASE:1.1.1.1 localcount-20160914:1.1.1.1 netbsd-7-nhusb:1.1.1.1.0.14 netbsd-7-nhusb-base:1.1.1.1 pgoyette-localcount-20160806:1.1.1.1 pgoyette-localcount-20160726:1.1.1.1 pgoyette-localcount:1.1.1.1.0.12 pgoyette-localcount-base:1.1.1.1 netbsd-7-0-1-RELEASE:1.1.1.1 netbsd-7-0:1.1.1.1.0.10 netbsd-7-0-RELEASE:1.1.1.1 netbsd-7-0-RC3:1.1.1.1 netbsd-7-0-RC2:1.1.1.1 netbsd-7-0-RC1:1.1.1.1 tls-maxphys-base:1.1.1.1 tls-maxphys:1.1.1.1.0.8 netbsd-7:1.1.1.1.0.6 netbsd-7-base:1.1.1.1 yamt-pagecache:1.1.1.1.0.4 yamt-pagecache-base9:1.1.1.1 tls-earlyentropy:1.1.1.1.0.2 tls-earlyentropy-base:1.1.1.1 riastradh-xf86-video-intel-2-7-1-pre-2-21-15:1.1.1.1 riastradh-drm2-base3:1.1.1.1 gmp-5-1-3:1.1.1.1 gmp:1.1.1; locks; strict; comment @;; @; 1.1 date 2013.11.29.07.49.48; author mrg; state Exp; branches 1.1.1.1; next ; commitid L2Av4PuGmdoL39fx; 1.1.1.1 date 2013.11.29.07.49.48; author mrg; state Exp; branches 1.1.1.1.4.1 1.1.1.1.8.1; next 1.1.1.2; commitid L2Av4PuGmdoL39fx; 1.1.1.2 date 2017.08.22.09.40.49; author mrg; state Exp; branches; next ; commitid W5kmAIk8hwVpSb4A; 1.1.1.1.4.1 date 2013.11.29.07.49.48; author yamt; state dead; branches; next 1.1.1.1.4.2; commitid nx2BSsHy0NPeAxBx; 1.1.1.1.4.2 date 2014.05.22.14.09.01; author yamt; state Exp; branches; next ; commitid nx2BSsHy0NPeAxBx; 1.1.1.1.8.1 date 2013.11.29.07.49.48; author tls; state dead; branches; next 1.1.1.1.8.2; commitid jTnpym9Qu0o4R1Nx; 1.1.1.1.8.2 date 2014.08.19.23.59.51; author tls; state Exp; branches; next ; commitid jTnpym9Qu0o4R1Nx; desc @@ 1.1 log @Initial revision @ text @dnl PowerPC-32 mpn_lshiftc. dnl Copyright 1995, 1998, 2000, 2002, 2003, 2004, 2005, 2010 Free Software dnl Foundation, Inc. dnl This file is part of the GNU MP Library. dnl The GNU MP Library is free software; you can redistribute it and/or modify dnl it under the terms of the GNU Lesser General Public License as published dnl by the Free Software Foundation; either version 3 of the License, or (at dnl your option) any later version. dnl The GNU MP Library is distributed in the hope that it will be useful, but dnl WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY dnl or FITNESS FOR A PARTICULAR PURPOSE. See the GNU Lesser General Public dnl License for more details. dnl You should have received a copy of the GNU Lesser General Public License dnl along with the GNU MP Library. If not, see http://www.gnu.org/licenses/. include(`../config.m4') C cycles/limb C 603e: ? C 604e: 3.0 C 75x (G3): 3.0 C 7400,7410 (G4): 3.0 C 7445,7455 (G4+): 2.5 C 7447,7457 (G4+): 2.25 C power4/ppc970: 2.5 C power5: 2.5 C INPUT PARAMETERS C rp r3 C up r4 C n r5 C cnt r6 ASM_START() PROLOGUE(mpn_lshiftc) cmpwi cr0, r5, 30 C more than 30 limbs? slwi r0, r5, 2 add r4, r4, r0 C make r4 point at end of s1 add r7, r3, r0 C make r7 point at end of res bgt L(BIG) C branch if more than 12 limbs mtctr r5 C copy size into CTR subfic r8, r6, 32 lwzu r11, -4(r4) C load first s1 limb srw r3, r11, r8 C compute function return value bdz L(end1) L(oop): lwzu r10, -4(r4) slw r9, r11, r6 srw r12, r10, r8 nor r9, r9, r12 stwu r9, -4(r7) bdz L(end2) lwzu r11, -4(r4) slw r9, r10, r6 srw r12, r11, r8 nor r9, r9, r12 stwu r9, -4(r7) bdnz L(oop) L(end1): slw r0, r11, r6 nor r0, r0, r0 stw r0, -4(r7) blr L(end2): slw r0, r10, r6 nor r0, r0, r0 stw r0, -4(r7) blr L(BIG): stmw r24, -32(r1) C save registers we are supposed to preserve lwzu r9, -4(r4) subfic r8, r6, 32 srw r3, r9, r8 C compute function return value slw r0, r9, r6 addi r5, r5, -1 andi. r10, r5, 3 C count for spill loop beq L(e) mtctr r10 lwzu r28, -4(r4) bdz L(xe0) L(loop0): slw r12, r28, r6 srw r24, r28, r8 lwzu r28, -4(r4) nor r24, r0, r24 stwu r24, -4(r7) mr r0, r12 bdnz L(loop0) C taken at most once! L(xe0): slw r12, r28, r6 srw r24, r28, r8 nor r24, r0, r24 stwu r24, -4(r7) mr r0, r12 L(e): srwi r5, r5, 2 C count for unrolled loop addi r5, r5, -1 mtctr r5 lwz r28, -4(r4) lwz r29, -8(r4) lwz r30, -12(r4) lwzu r31, -16(r4) L(loopU): slw r9, r28, r6 srw r24, r28, r8 lwz r28, -4(r4) slw r10, r29, r6 srw r25, r29, r8 lwz r29, -8(r4) slw r11, r30, r6 srw r26, r30, r8 lwz r30, -12(r4) slw r12, r31, r6 srw r27, r31, r8 lwzu r31, -16(r4) nor r24, r0, r24 stw r24, -4(r7) nor r25, r9, r25 stw r25, -8(r7) nor r26, r10, r26 stw r26, -12(r7) nor r27, r11, r27 stwu r27, -16(r7) mr r0, r12 bdnz L(loopU) slw r9, r28, r6 srw r24, r28, r8 slw r10, r29, r6 srw r25, r29, r8 slw r11, r30, r6 srw r26, r30, r8 slw r12, r31, r6 srw r27, r31, r8 nor r24, r0, r24 stw r24, -4(r7) nor r25, r9, r25 stw r25, -8(r7) nor r26, r10, r26 stw r26, -12(r7) nor r27, r11, r27 stw r27, -16(r7) nor r12, r12, r12 stw r12, -20(r7) lmw r24, -32(r1) C restore registers blr EPILOGUE() @ 1.1.1.1 log @initial import GMP 5.1.3 sources. changes include: fixes for: - mpn_sbpi1_div_qr_sec and mpn_sbpi1_div_r_sec - mpz_powm_ui - AMD family 11h - mpz_powm_sec and mpn_powm_sec - ASSERT() fixes - gcd, gcdext, and invert function fixes - some PPC division operations @ text @@ 1.1.1.2 log @initial import of GMP 6.1.2. main changes from 5.1.3 below. notes: - support for thumb-less ARM chips was in our port of 5.1.3, but a similar method has been provided upstream now - someone should look at the AVX failure reports, and fix them Changes between GMP version 6.1.0 and 6.1.1 FEATURES * Work around faulty cpuid on some recent Intel chips (this allows GMP to run on Skylake Pentiums). * Support thumb-less ARM chips. Changes between GMP version 6.0.* and 6.1.0 BUGS FIXED * The public function mpn_com is now correctly declared in gmp.h. * Healed possible failures of mpn_sec_sqr for non-cryptographic sizes for some obsolete CPUs. * Various problems related to precision for mpf have been fixed. * Fixed ABI incompatible stack alignment in calls from assembly code. * Fixed PIC bug in popcount affecting Intel processors using the 32-bit ABI. SPEEDUPS * Speedup for Intel Broadwell and Skylake through assembly code making use of new ADX instructions. * Square root is now faster when the remainder is not needed. Also the speed to compute the k-th root improved, for small sizes. FEATURES * New C++ functions gcd and lcm for mpz_class. * New public mpn functions mpn_divexact_1, mpn_zero_p, and mpn_cnd_swap. * New public mpq_cmp_z function, to efficiently compare rationals with integers. * Support for more 32-bit arm processors. * Support for AVX-less modern x86 CPUs. (Such support might be missing either because the CPU vendor chose to disable AVX, or because the running kernel lacks AVX context switch support.) * Support for NetBSD under Xen; we switch off AVX unconditionally under NetBSD since a bug in NetBSD makes AVX fail under Xen. MISC * Tuned values for FFT multiplications are provided for larger number on many platforms. Changes between GMP version 5.1.* and 6.0.0 BUGS FIXED * The function mpz_invert now considers any number invertible in Z/1Z. * The mpn multiply code now handles operands of more than 2^31 limbs correctly. (Note however that the mpz code is limited to 2^32 bits on 32-bit hosts and 2^37 bits on 64-bit hosts.) SPEEDUPS * Plain division of large operands is faster and more monotonous in operand size. * Major speedup for ARM, in particular ARM Cortex-A15, thanks to improved assembly. * Speedup for Intel Sandy Bridge, Ivy Bridge, Haswell, thanks to rewritten and vastly expanded assembly support. Speedup also for the older Core 2 and Nehalem. * Faster mixed arithmetic between mpq_class and double. FEATURES * Support for new Intel and AMD CPUs. * New public functions mpn_sec_mul and mpn_sec_sqr, implementing side-channel silent multiplication and squaring. * New public functions mpn_sec_div_qr and mpn_sec_div_r, implementing side-channel silent division. * New public functions mpn_cnd_add_n and mpn_cnd_sub_n. Side-channel silent conditional addition and subtraction. * New public function mpn_sec_powm, implementing side-channel silent modexp. * New public function mpn_sec_invert, implementing side-channel silent modular inversion. * Better support for applications which use the mpz_t type, but nevertheless need to call some of the lower-level mpn functions. See the documentation for mpz_limbs_read and related functions. @ text @d3 2 a4 1 dnl Copyright 1995, 1998, 2000, 2002-2005, 2010 Free Software Foundation, Inc. d7 1 a7 1 dnl d9 4 a12 14 dnl it under the terms of either: dnl dnl * the GNU Lesser General Public License as published by the Free dnl Software Foundation; either version 3 of the License, or (at your dnl option) any later version. dnl dnl or dnl dnl * the GNU General Public License as published by the Free Software dnl Foundation; either version 2 of the License, or (at your option) any dnl later version. dnl dnl or both in parallel, as here. dnl d15 5 a19 6 dnl or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License dnl for more details. dnl dnl You should have received copies of the GNU General Public License and the dnl GNU Lesser General Public License along with the GNU MP Library. If not, dnl see https://www.gnu.org/licenses/. d78 1 a78 2 stwu r1, -48(r1) stmw r24, 8(r1) C save registers we are supposed to preserve d156 1 a156 2 lmw r24, 8(r1) C restore registers addi r1, r1, 48 @ 1.1.1.1.8.1 log @file lshiftc.asm was added on branch tls-maxphys on 2014-08-19 23:59:51 +0000 @ text @d1 158 @ 1.1.1.1.8.2 log @Rebase to HEAD as of a few days ago. @ text @a0 158 dnl PowerPC-32 mpn_lshiftc. dnl Copyright 1995, 1998, 2000, 2002, 2003, 2004, 2005, 2010 Free Software dnl Foundation, Inc. dnl This file is part of the GNU MP Library. dnl The GNU MP Library is free software; you can redistribute it and/or modify dnl it under the terms of the GNU Lesser General Public License as published dnl by the Free Software Foundation; either version 3 of the License, or (at dnl your option) any later version. dnl The GNU MP Library is distributed in the hope that it will be useful, but dnl WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY dnl or FITNESS FOR A PARTICULAR PURPOSE. See the GNU Lesser General Public dnl License for more details. dnl You should have received a copy of the GNU Lesser General Public License dnl along with the GNU MP Library. If not, see http://www.gnu.org/licenses/. include(`../config.m4') C cycles/limb C 603e: ? C 604e: 3.0 C 75x (G3): 3.0 C 7400,7410 (G4): 3.0 C 7445,7455 (G4+): 2.5 C 7447,7457 (G4+): 2.25 C power4/ppc970: 2.5 C power5: 2.5 C INPUT PARAMETERS C rp r3 C up r4 C n r5 C cnt r6 ASM_START() PROLOGUE(mpn_lshiftc) cmpwi cr0, r5, 30 C more than 30 limbs? slwi r0, r5, 2 add r4, r4, r0 C make r4 point at end of s1 add r7, r3, r0 C make r7 point at end of res bgt L(BIG) C branch if more than 12 limbs mtctr r5 C copy size into CTR subfic r8, r6, 32 lwzu r11, -4(r4) C load first s1 limb srw r3, r11, r8 C compute function return value bdz L(end1) L(oop): lwzu r10, -4(r4) slw r9, r11, r6 srw r12, r10, r8 nor r9, r9, r12 stwu r9, -4(r7) bdz L(end2) lwzu r11, -4(r4) slw r9, r10, r6 srw r12, r11, r8 nor r9, r9, r12 stwu r9, -4(r7) bdnz L(oop) L(end1): slw r0, r11, r6 nor r0, r0, r0 stw r0, -4(r7) blr L(end2): slw r0, r10, r6 nor r0, r0, r0 stw r0, -4(r7) blr L(BIG): stmw r24, -32(r1) C save registers we are supposed to preserve lwzu r9, -4(r4) subfic r8, r6, 32 srw r3, r9, r8 C compute function return value slw r0, r9, r6 addi r5, r5, -1 andi. r10, r5, 3 C count for spill loop beq L(e) mtctr r10 lwzu r28, -4(r4) bdz L(xe0) L(loop0): slw r12, r28, r6 srw r24, r28, r8 lwzu r28, -4(r4) nor r24, r0, r24 stwu r24, -4(r7) mr r0, r12 bdnz L(loop0) C taken at most once! L(xe0): slw r12, r28, r6 srw r24, r28, r8 nor r24, r0, r24 stwu r24, -4(r7) mr r0, r12 L(e): srwi r5, r5, 2 C count for unrolled loop addi r5, r5, -1 mtctr r5 lwz r28, -4(r4) lwz r29, -8(r4) lwz r30, -12(r4) lwzu r31, -16(r4) L(loopU): slw r9, r28, r6 srw r24, r28, r8 lwz r28, -4(r4) slw r10, r29, r6 srw r25, r29, r8 lwz r29, -8(r4) slw r11, r30, r6 srw r26, r30, r8 lwz r30, -12(r4) slw r12, r31, r6 srw r27, r31, r8 lwzu r31, -16(r4) nor r24, r0, r24 stw r24, -4(r7) nor r25, r9, r25 stw r25, -8(r7) nor r26, r10, r26 stw r26, -12(r7) nor r27, r11, r27 stwu r27, -16(r7) mr r0, r12 bdnz L(loopU) slw r9, r28, r6 srw r24, r28, r8 slw r10, r29, r6 srw r25, r29, r8 slw r11, r30, r6 srw r26, r30, r8 slw r12, r31, r6 srw r27, r31, r8 nor r24, r0, r24 stw r24, -4(r7) nor r25, r9, r25 stw r25, -8(r7) nor r26, r10, r26 stw r26, -12(r7) nor r27, r11, r27 stw r27, -16(r7) nor r12, r12, r12 stw r12, -20(r7) lmw r24, -32(r1) C restore registers blr EPILOGUE() @ 1.1.1.1.4.1 log @file lshiftc.asm was added on branch yamt-pagecache on 2014-05-22 14:09:01 +0000 @ text @d1 158 @ 1.1.1.1.4.2 log @sync with head. for a reference, the tree before this commit was tagged as yamt-pagecache-tag8. this commit was splitted into small chunks to avoid a limitation of cvs. ("Protocol error: too many arguments") @ text @a0 158 dnl PowerPC-32 mpn_lshiftc. dnl Copyright 1995, 1998, 2000, 2002, 2003, 2004, 2005, 2010 Free Software dnl Foundation, Inc. dnl This file is part of the GNU MP Library. dnl The GNU MP Library is free software; you can redistribute it and/or modify dnl it under the terms of the GNU Lesser General Public License as published dnl by the Free Software Foundation; either version 3 of the License, or (at dnl your option) any later version. dnl The GNU MP Library is distributed in the hope that it will be useful, but dnl WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY dnl or FITNESS FOR A PARTICULAR PURPOSE. See the GNU Lesser General Public dnl License for more details. dnl You should have received a copy of the GNU Lesser General Public License dnl along with the GNU MP Library. If not, see http://www.gnu.org/licenses/. include(`../config.m4') C cycles/limb C 603e: ? C 604e: 3.0 C 75x (G3): 3.0 C 7400,7410 (G4): 3.0 C 7445,7455 (G4+): 2.5 C 7447,7457 (G4+): 2.25 C power4/ppc970: 2.5 C power5: 2.5 C INPUT PARAMETERS C rp r3 C up r4 C n r5 C cnt r6 ASM_START() PROLOGUE(mpn_lshiftc) cmpwi cr0, r5, 30 C more than 30 limbs? slwi r0, r5, 2 add r4, r4, r0 C make r4 point at end of s1 add r7, r3, r0 C make r7 point at end of res bgt L(BIG) C branch if more than 12 limbs mtctr r5 C copy size into CTR subfic r8, r6, 32 lwzu r11, -4(r4) C load first s1 limb srw r3, r11, r8 C compute function return value bdz L(end1) L(oop): lwzu r10, -4(r4) slw r9, r11, r6 srw r12, r10, r8 nor r9, r9, r12 stwu r9, -4(r7) bdz L(end2) lwzu r11, -4(r4) slw r9, r10, r6 srw r12, r11, r8 nor r9, r9, r12 stwu r9, -4(r7) bdnz L(oop) L(end1): slw r0, r11, r6 nor r0, r0, r0 stw r0, -4(r7) blr L(end2): slw r0, r10, r6 nor r0, r0, r0 stw r0, -4(r7) blr L(BIG): stmw r24, -32(r1) C save registers we are supposed to preserve lwzu r9, -4(r4) subfic r8, r6, 32 srw r3, r9, r8 C compute function return value slw r0, r9, r6 addi r5, r5, -1 andi. r10, r5, 3 C count for spill loop beq L(e) mtctr r10 lwzu r28, -4(r4) bdz L(xe0) L(loop0): slw r12, r28, r6 srw r24, r28, r8 lwzu r28, -4(r4) nor r24, r0, r24 stwu r24, -4(r7) mr r0, r12 bdnz L(loop0) C taken at most once! L(xe0): slw r12, r28, r6 srw r24, r28, r8 nor r24, r0, r24 stwu r24, -4(r7) mr r0, r12 L(e): srwi r5, r5, 2 C count for unrolled loop addi r5, r5, -1 mtctr r5 lwz r28, -4(r4) lwz r29, -8(r4) lwz r30, -12(r4) lwzu r31, -16(r4) L(loopU): slw r9, r28, r6 srw r24, r28, r8 lwz r28, -4(r4) slw r10, r29, r6 srw r25, r29, r8 lwz r29, -8(r4) slw r11, r30, r6 srw r26, r30, r8 lwz r30, -12(r4) slw r12, r31, r6 srw r27, r31, r8 lwzu r31, -16(r4) nor r24, r0, r24 stw r24, -4(r7) nor r25, r9, r25 stw r25, -8(r7) nor r26, r10, r26 stw r26, -12(r7) nor r27, r11, r27 stwu r27, -16(r7) mr r0, r12 bdnz L(loopU) slw r9, r28, r6 srw r24, r28, r8 slw r10, r29, r6 srw r25, r29, r8 slw r11, r30, r6 srw r26, r30, r8 slw r12, r31, r6 srw r27, r31, r8 nor r24, r0, r24 stw r24, -4(r7) nor r25, r9, r25 stw r25, -8(r7) nor r26, r10, r26 stw r26, -12(r7) nor r27, r11, r27 stw r27, -16(r7) nor r12, r12, r12 stw r12, -20(r7) lmw r24, -32(r1) C restore registers blr EPILOGUE() @