head 1.2; access; symbols micropython-1-5-2-base:1.1.1.1 MICROPYTHON:1.1.1; locks; strict; comment @ * @; 1.2 date 2026.10.15.05.28.50; author agc; state dead; branches; next 1.1; commitid aHLdC1EGCUYk7xZG; 1.1 date 2016.01.14.01.38.50; author agc; state Exp; branches 1.1.1.1; next ; commitid Q8liT0v6zMF95QQy; 1.1.1.1 date 2016.01.14.01.38.50; author agc; state Exp; branches; next ; commitid Q8liT0v6zMF95QQy; desc @@ 1.2 log @Remove waaaay old micropython sources which haven't been relevant for 10 years @ text @/* * This file is part of the Micro Python project, http://micropython.org/ * * The MIT License (MIT) * * Copyright (c) 2013, 2014 Damien P. George * * Permission is hereby granted, free of charge, to any person obtaining a copy * of this software and associated documentation files (the "Software"), to deal * in the Software without restriction, including without limitation the rights * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell * copies of the Software, and to permit persons to whom the Software is * furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice shall be included in * all copies or substantial portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN * THE SOFTWARE. */ #include #include #include STM32_HAL_H #include "py/obj.h" #include "systick.h" #include "led.h" #include "flash.h" #include "storage.h" #include "irq.h" #if defined(STM32F405xx) || defined(STM32F407xx) #define CACHE_MEM_START_ADDR (0x10000000) // CCM data RAM, 64k #define FLASH_SECTOR_SIZE_MAX (0x10000) // 64k max, size of CCM #define FLASH_MEM_SEG1_START_ADDR (0x08004000) // sector 1 #define FLASH_MEM_SEG1_NUM_BLOCKS (224) // sectors 1,2,3,4: 16k+16k+16k+64k=112k // enable this to get an extra 64k of storage (uses the last sector of the flash) #if 0 #define FLASH_MEM_SEG2_START_ADDR (0x080e0000) // sector 11 #define FLASH_MEM_SEG2_NUM_BLOCKS (128) // sector 11: 128k #endif #elif defined(STM32F401xE) || defined(STM32F411xE) STATIC byte flash_cache_mem[0x4000] __attribute__((aligned(4))); // 16k #define CACHE_MEM_START_ADDR (&flash_cache_mem[0]) #define FLASH_SECTOR_SIZE_MAX (0x4000) // 16k max due to size of cache buffer #define FLASH_MEM_SEG1_START_ADDR (0x08004000) // sector 1 #define FLASH_MEM_SEG1_NUM_BLOCKS (128) // sectors 1,2,3,4: 16k+16k+16k+16k(of 64k)=64k #elif defined(STM32F429xx) #define CACHE_MEM_START_ADDR (0x10000000) // CCM data RAM, 64k #define FLASH_SECTOR_SIZE_MAX (0x10000) // 64k max, size of CCM #define FLASH_MEM_SEG1_START_ADDR (0x08004000) // sector 1 #define FLASH_MEM_SEG1_NUM_BLOCKS (224) // sectors 1,2,3,4: 16k+16k+16k+64k=112k #elif defined(STM32F746xx) // The STM32F746 doesn't really have CCRAM, so we use the 64K DTCM for this. #define CACHE_MEM_START_ADDR (0x20000000) // DTCM data RAM, 64k #define FLASH_SECTOR_SIZE_MAX (0x08000) // 32k max #define FLASH_MEM_SEG1_START_ADDR (0x08008000) // sector 1 #define FLASH_MEM_SEG1_NUM_BLOCKS (192) // sectors 1,2,3: 32k+32k+32=96k #else #error "no storage support for this MCU" #endif #if !defined(FLASH_MEM_SEG2_START_ADDR) #define FLASH_MEM_SEG2_START_ADDR (0) // no second segment #define FLASH_MEM_SEG2_NUM_BLOCKS (0) // no second segment #endif #define FLASH_PART1_START_BLOCK (0x100) #define FLASH_PART1_NUM_BLOCKS (FLASH_MEM_SEG1_NUM_BLOCKS + FLASH_MEM_SEG2_NUM_BLOCKS) #define FLASH_FLAG_DIRTY (1) #define FLASH_FLAG_FORCE_WRITE (2) #define FLASH_FLAG_ERASED (4) static bool flash_is_initialised = false; static __IO uint8_t flash_flags = 0; static uint32_t flash_cache_sector_id; static uint32_t flash_cache_sector_start; static uint32_t flash_cache_sector_size; static uint32_t flash_tick_counter_last_write; static void flash_cache_flush(void) { if (flash_flags & FLASH_FLAG_DIRTY) { flash_flags |= FLASH_FLAG_FORCE_WRITE; while (flash_flags & FLASH_FLAG_DIRTY) { NVIC->STIR = FLASH_IRQn; } } } static uint8_t *flash_cache_get_addr_for_write(uint32_t flash_addr) { uint32_t flash_sector_start; uint32_t flash_sector_size; uint32_t flash_sector_id = flash_get_sector_info(flash_addr, &flash_sector_start, &flash_sector_size); if (flash_sector_size > FLASH_SECTOR_SIZE_MAX) { flash_sector_size = FLASH_SECTOR_SIZE_MAX; } if (flash_cache_sector_id != flash_sector_id) { flash_cache_flush(); memcpy((void*)CACHE_MEM_START_ADDR, (const void*)flash_sector_start, flash_sector_size); flash_cache_sector_id = flash_sector_id; flash_cache_sector_start = flash_sector_start; flash_cache_sector_size = flash_sector_size; } flash_flags |= FLASH_FLAG_DIRTY; led_state(PYB_LED_R1, 1); // indicate a dirty cache with LED on flash_tick_counter_last_write = HAL_GetTick(); return (uint8_t*)CACHE_MEM_START_ADDR + flash_addr - flash_sector_start; } static uint8_t *flash_cache_get_addr_for_read(uint32_t flash_addr) { uint32_t flash_sector_start; uint32_t flash_sector_size; uint32_t flash_sector_id = flash_get_sector_info(flash_addr, &flash_sector_start, &flash_sector_size); if (flash_cache_sector_id == flash_sector_id) { // in cache, copy from there return (uint8_t*)CACHE_MEM_START_ADDR + flash_addr - flash_sector_start; } // not in cache, copy straight from flash return (uint8_t*)flash_addr; } void storage_init(void) { if (!flash_is_initialised) { flash_flags = 0; flash_cache_sector_id = 0; flash_tick_counter_last_write = 0; flash_is_initialised = true; } // Enable the flash IRQ, which is used to also call our storage IRQ handler // It needs to go at a higher priority than all those components that rely on // the flash storage (eg higher than USB MSC). HAL_NVIC_SetPriority(FLASH_IRQn, IRQ_PRI_FLASH, IRQ_SUBPRI_FLASH); HAL_NVIC_EnableIRQ(FLASH_IRQn); } uint32_t storage_get_block_size(void) { return FLASH_BLOCK_SIZE; } uint32_t storage_get_block_count(void) { return FLASH_PART1_START_BLOCK + FLASH_PART1_NUM_BLOCKS; } void storage_irq_handler(void) { if (!(flash_flags & FLASH_FLAG_DIRTY)) { return; } // This code uses interrupts to erase the flash /* if (flash_erase_state == 0) { flash_erase_it(flash_cache_sector_start, (const uint32_t*)CACHE_MEM_START_ADDR, flash_cache_sector_size / 4); flash_erase_state = 1; return; } if (flash_erase_state == 1) { // wait for erase // TODO add timeout #define flash_erase_done() (__HAL_FLASH_GET_FLAG(FLASH_FLAG_BSY) == RESET) if (!flash_erase_done()) { return; } flash_erase_state = 2; } */ // This code erases the flash directly, waiting for it to finish if (!(flash_flags & FLASH_FLAG_ERASED)) { flash_erase(flash_cache_sector_start, (const uint32_t*)CACHE_MEM_START_ADDR, flash_cache_sector_size / 4); flash_flags |= FLASH_FLAG_ERASED; return; } // If not a forced write, wait at least 5 seconds after last write to flush // On file close and flash unmount we get a forced write, so we can afford to wait a while if ((flash_flags & FLASH_FLAG_FORCE_WRITE) || sys_tick_has_passed(flash_tick_counter_last_write, 5000)) { // sync the cache RAM buffer by writing it to the flash page flash_write(flash_cache_sector_start, (const uint32_t*)CACHE_MEM_START_ADDR, flash_cache_sector_size / 4); // clear the flash flags now that we have a clean cache flash_flags = 0; // indicate a clean cache with LED off led_state(PYB_LED_R1, 0); } } void storage_flush(void) { flash_cache_flush(); } static void build_partition(uint8_t *buf, int boot, int type, uint32_t start_block, uint32_t num_blocks) { buf[0] = boot; if (num_blocks == 0) { buf[1] = 0; buf[2] = 0; buf[3] = 0; } else { buf[1] = 0xff; buf[2] = 0xff; buf[3] = 0xff; } buf[4] = type; if (num_blocks == 0) { buf[5] = 0; buf[6] = 0; buf[7] = 0; } else { buf[5] = 0xff; buf[6] = 0xff; buf[7] = 0xff; } buf[8] = start_block; buf[9] = start_block >> 8; buf[10] = start_block >> 16; buf[11] = start_block >> 24; buf[12] = num_blocks; buf[13] = num_blocks >> 8; buf[14] = num_blocks >> 16; buf[15] = num_blocks >> 24; } static uint32_t convert_block_to_flash_addr(uint32_t block) { if (FLASH_PART1_START_BLOCK <= block && block < FLASH_PART1_START_BLOCK + FLASH_PART1_NUM_BLOCKS) { // a block in partition 1 block -= FLASH_PART1_START_BLOCK; if (block < FLASH_MEM_SEG1_NUM_BLOCKS) { return FLASH_MEM_SEG1_START_ADDR + block * FLASH_BLOCK_SIZE; } else if (block < FLASH_MEM_SEG1_NUM_BLOCKS + FLASH_MEM_SEG2_NUM_BLOCKS) { return FLASH_MEM_SEG2_START_ADDR + (block - FLASH_MEM_SEG1_NUM_BLOCKS) * FLASH_BLOCK_SIZE; } // can add more flash segments here if needed, following above pattern } // bad block return -1; } bool storage_read_block(uint8_t *dest, uint32_t block) { //printf("RD %u\n", block); if (block == 0) { // fake the MBR so we can decide on our own partition table for (int i = 0; i < 446; i++) { dest[i] = 0; } build_partition(dest + 446, 0, 0x01 /* FAT12 */, FLASH_PART1_START_BLOCK, FLASH_PART1_NUM_BLOCKS); build_partition(dest + 462, 0, 0, 0, 0); build_partition(dest + 478, 0, 0, 0, 0); build_partition(dest + 494, 0, 0, 0, 0); dest[510] = 0x55; dest[511] = 0xaa; return true; } else { // non-MBR block, get data from flash memory, possibly via cache uint32_t flash_addr = convert_block_to_flash_addr(block); if (flash_addr == -1) { // bad block number return false; } uint8_t *src = flash_cache_get_addr_for_read(flash_addr); memcpy(dest, src, FLASH_BLOCK_SIZE); return true; } } bool storage_write_block(const uint8_t *src, uint32_t block) { //printf("WR %u\n", block); if (block == 0) { // can't write MBR, but pretend we did return true; } else { // non-MBR block, copy to cache uint32_t flash_addr = convert_block_to_flash_addr(block); if (flash_addr == -1) { // bad block number return false; } uint8_t *dest = flash_cache_get_addr_for_write(flash_addr); memcpy(dest, src, FLASH_BLOCK_SIZE); return true; } } @ 1.1 log @Initial revision @ text @@ 1.1.1.1 log @Import micropython version 1.5.2 into othersrc. Micropython is a python3 implementation that has been optimised for micro-controllers and small embedded systems. It also has a "unix" port. It has an MIT license. This is version 1.5.2 of micropython. MicroPython implements the entire Python 3.4 syntax (including exceptions, "with", "yield from", etc.). The following core datatypes are provided: str (including basic Unicode support), bytes, bytearray, tuple, list, dict, set, frozenset, array.array, collections.namedtuple, classes and instances. Builtin modules include sys, time, and struct. Note that only subset of Python 3.4 functionality implemented for the data types and modules. This is the standard micropython source (version v1.5.2), which has been adapted to use reachover infrastructure. At the present time, libffi (from pkgsrc) is used. Alternative locations for libffi can be set using the PKGSRC_PREFIX definition to make. In the whole scheme of things, micropython is quite small: % size bin/micropython text data bss dec hex filename 393495 1624 2208 397327 6100f bin/micropython % and runs much as expected: % bin/micropython MicroPython v1.5.2 on 2016-01-13; linux version Use Ctrl-D to exit, Ctrl-E for paste mode >>> print("hello world") hello world >>> list(5 * x + y for x in range(10) for y in [4, 2, 1]) [4, 2, 1, 9, 7, 6, 14, 12, 11, 19, 17, 16, 24, 22, 21, 29, 27, 26, 34, 32, 31, 39, 37, 36, 44, 42, 41, 49, 47, 46] >>> % python2.7 Python 2.7.10 (default, Oct 17 2015, 17:55:29) [GCC 4.8.5] on netbsd7 Type "help", "copyright", "credits" or "license" for more information. >>> print("hello world") hello world >>> list(5 * x + y for x in range(10) for y in [4, 2, 1]) [4, 2, 1, 9, 7, 6, 14, 12, 11, 19, 17, 16, 24, 22, 21, 29, 27, 26, 34, 32, 31, 39, 37, 36, 44, 42, 41, 49, 47, 46] >>> ^D % This (reachover) version runs all the tests which the gmake version does. % make t cd bin && make t cd /home/agc/local/micropython/bin/../dist/unix/../tests && env MICROPY_MICROPYTHON=/home/agc/local/micropython/bin/micropython ./run-tests pass basics/0prelim.py pass basics/andor.py pass basics/array1.py pass basics/array_add.py pass basics/array_construct.py pass basics/array_construct2.py ... pass unix/ffi_callback.py pass unix/ffi_float.py pass unix/ffi_float2.py 474 tests performed (15812 individual testcases) 474 tests passed 5 tests skipped: cmd_showbc cmd_verbose machine1 machine_mem extra_coverage % The sources are available from github: https://github.com/micropython/micropython micropython release at: https://github.com/micropython/micropython/releases Sources for 1.5.2 taken from: https://github.com/micropython/micropython/archive/v1.5.2.tar.gz Alistair Crooks agc@@netbsd.org Wed Jan 13 17:15:30 PST 2016 @ text @@