head 1.2; access; symbols micropython-1-5-2-base:1.1.1.1 MICROPYTHON:1.1.1; locks; strict; comment @ * @; 1.2 date 2026.10.15.05.27.56; author agc; state dead; branches; next 1.1; commitid aHLdC1EGCUYk7xZG; 1.1 date 2016.01.14.01.38.49; author agc; state Exp; branches 1.1.1.1; next ; commitid Q8liT0v6zMF95QQy; 1.1.1.1 date 2016.01.14.01.38.49; author agc; state Exp; branches; next ; commitid Q8liT0v6zMF95QQy; desc @@ 1.2 log @Remove waaaay old micropython sources which haven't been relevant for 10 years @ text @//***************************************************************************** // // cpu.c // // Instruction wrappers for special CPU instructions needed by the // drivers. // // Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/ // // // Redistribution and use in source and binary forms, with or without // modification, are permitted provided that the following conditions // are met: // // Redistributions of source code must retain the above copyright // notice, this list of conditions and the following disclaimer. // // Redistributions in binary form must reproduce the above copyright // notice, this list of conditions and the following disclaimer in the // documentation and/or other materials provided with the // distribution. // // Neither the name of Texas Instruments Incorporated nor the names of // its contributors may be used to endorse or promote products derived // from this software without specific prior written permission. // // THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS // "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT // LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR // A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT // OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, // SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT // LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, // DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY // THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT // (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE // OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. // //***************************************************************************** #include "cpu.h" //***************************************************************************** // // Wrapper function for the CPSID instruction. Returns the state of PRIMASK // on entry. // //***************************************************************************** #if defined(gcc) unsigned long __attribute__((naked)) CPUcpsid(void) { unsigned long ulRet; // // Read PRIMASK and disable interrupts. // __asm(" mrs r0, PRIMASK\n" " cpsid i\n" " dsb \n" " isb \n" " bx lr\n" : "=r" (ulRet)); // // The return is handled in the inline assembly, but the compiler will // still complain if there is not an explicit return here (despite the fact // that this does not result in any code being produced because of the // naked attribute). // return(ulRet); } #endif #if defined(ewarm) unsigned long CPUcpsid(void) { // // Read PRIMASK and disable interrupts. // __asm(" mrs r0, PRIMASK\n" " cpsid i\n" " dsb \n" " isb \n"); // // "Warning[Pe940]: missing return statement at end of non-void function" // is suppressed here to avoid putting a "bx lr" in the inline assembly // above and a superfluous return statement here. // #pragma diag_suppress=Pe940 } #pragma diag_default=Pe940 #endif #if defined(ccs) unsigned long CPUcpsid(void) { // // Read PRIMASK and disable interrupts. // __asm(" mrs r0, PRIMASK\n" " cpsid i\n" " dsb \n" " isb \n" " bx lr\n"); // // The following keeps the compiler happy, because it wants to see a // return value from this function. It will generate code to return // a zero. However, the real return is the "bx lr" above, so the // return(0) is never executed and the function returns with the value // you expect in R0. // return(0); } #endif //***************************************************************************** // // Wrapper function returning the state of PRIMASK (indicating whether // interrupts are enabled or disabled). // //***************************************************************************** #if defined(gcc) unsigned long __attribute__((naked)) CPUprimask(void) { unsigned long ulRet; // // Read PRIMASK and disable interrupts. // __asm(" mrs r0, PRIMASK\n" " bx lr\n" : "=r" (ulRet)); // // The return is handled in the inline assembly, but the compiler will // still complain if there is not an explicit return here (despite the fact // that this does not result in any code being produced because of the // naked attribute). // return(ulRet); } #endif #if defined(ewarm) unsigned long CPUprimask(void) { // // Read PRIMASK and disable interrupts. // __asm(" mrs r0, PRIMASK\n"); // // "Warning[Pe940]: missing return statement at end of non-void function" // is suppressed here to avoid putting a "bx lr" in the inline assembly // above and a superfluous return statement here. // #pragma diag_suppress=Pe940 } #pragma diag_default=Pe940 #endif #if defined(ccs) unsigned long CPUprimask(void) { // // Read PRIMASK and disable interrupts. // __asm(" mrs r0, PRIMASK\n" " bx lr\n"); // // The following keeps the compiler happy, because it wants to see a // return value from this function. It will generate code to return // a zero. However, the real return is the "bx lr" above, so the // return(0) is never executed and the function returns with the value // you expect in R0. // return(0); } #endif //***************************************************************************** // // Wrapper function for the CPSIE instruction. Returns the state of PRIMASK // on entry. // //***************************************************************************** #if defined(gcc) unsigned long __attribute__((naked)) CPUcpsie(void) { unsigned long ulRet; // // Read PRIMASK and enable interrupts. // __asm(" mrs r0, PRIMASK\n" " cpsie i\n" " dsb \n" " isb \n" " bx lr\n" : "=r" (ulRet)); // // The return is handled in the inline assembly, but the compiler will // still complain if there is not an explicit return here (despite the fact // that this does not result in any code being produced because of the // naked attribute). // return(ulRet); } #endif #if defined(ewarm) unsigned long CPUcpsie(void) { // // Read PRIMASK and enable interrupts. // __asm(" mrs r0, PRIMASK\n" " cpsie i\n" " dsb \n" " isb \n"); // // "Warning[Pe940]: missing return statement at end of non-void function" // is suppressed here to avoid putting a "bx lr" in the inline assembly // above and a superfluous return statement here. // #pragma diag_suppress=Pe940 } #pragma diag_default=Pe940 #endif #if defined(ccs) unsigned long CPUcpsie(void) { // // Read PRIMASK and enable interrupts. // __asm(" mrs r0, PRIMASK\n" " cpsie i\n" " dsb \n" " isb \n" " bx lr\n"); // // The following keeps the compiler happy, because it wants to see a // return value from this function. It will generate code to return // a zero. However, the real return is the "bx lr" above, so the // return(0) is never executed and the function returns with the value // you expect in R0. // return(0); } #endif //***************************************************************************** // // Wrapper function for the WFI instruction. // //***************************************************************************** #if defined(gcc) void __attribute__((naked)) CPUwfi(void) { // // Wait for the next interrupt. // __asm(" dsb \n" " isb \n" " wfi \n" " bx lr\n"); } #endif #if defined(ewarm) void CPUwfi(void) { // // Wait for the next interrupt. // __asm(" dsb \n" " isb \n" " wfi \n"); } #endif #if defined(ccs) void CPUwfi(void) { // // Wait for the next interrupt. // __asm(" dsb \n" " isb \n" " wfi \n"); } #endif //***************************************************************************** // // Wrapper function for writing the BASEPRI register. // //***************************************************************************** #if defined(gcc) void __attribute__((naked)) CPUbasepriSet(unsigned long ulNewBasepri) { // // Set the BASEPRI register // __asm(" msr BASEPRI, r0\n" " dsb \n" " isb \n" " bx lr\n"); } #endif #if defined(ewarm) void CPUbasepriSet(unsigned long ulNewBasepri) { // // Set the BASEPRI register // __asm(" msr BASEPRI, r0\n" " dsb \n" " isb \n"); } #endif #if defined(ccs) void CPUbasepriSet(unsigned long ulNewBasepri) { // // Set the BASEPRI register // __asm(" msr BASEPRI, r0\n" " dsb \n" " isb \n"); } #endif //***************************************************************************** // // Wrapper function for reading the BASEPRI register. // //***************************************************************************** #if defined(gcc) unsigned long __attribute__((naked)) CPUbasepriGet(void) { unsigned long ulRet; // // Read BASEPRI // __asm(" mrs r0, BASEPRI\n" " bx lr\n" : "=r" (ulRet)); // // The return is handled in the inline assembly, but the compiler will // still complain if there is not an explicit return here (despite the fact // that this does not result in any code being produced because of the // naked attribute). // return(ulRet); } #endif #if defined(ewarm) unsigned long CPUbasepriGet(void) { // // Read BASEPRI // __asm(" mrs r0, BASEPRI\n"); // // "Warning[Pe940]: missing return statement at end of non-void function" // is suppressed here to avoid putting a "bx lr" in the inline assembly // above and a superfluous return statement here. // #pragma diag_suppress=Pe940 } #pragma diag_default=Pe940 #endif #if defined(ccs) unsigned long CPUbasepriGet(void) { // // Read BASEPRI // __asm(" mrs r0, BASEPRI\n" " bx lr\n"); // // The following keeps the compiler happy, because it wants to see a // return value from this function. It will generate code to return // a zero. However, the real return is the "bx lr" above, so the // return(0) is never executed and the function returns with the value // you expect in R0. // return(0); } #endif @ 1.1 log @Initial revision @ text @@ 1.1.1.1 log @Import micropython version 1.5.2 into othersrc. Micropython is a python3 implementation that has been optimised for micro-controllers and small embedded systems. It also has a "unix" port. It has an MIT license. This is version 1.5.2 of micropython. MicroPython implements the entire Python 3.4 syntax (including exceptions, "with", "yield from", etc.). The following core datatypes are provided: str (including basic Unicode support), bytes, bytearray, tuple, list, dict, set, frozenset, array.array, collections.namedtuple, classes and instances. Builtin modules include sys, time, and struct. Note that only subset of Python 3.4 functionality implemented for the data types and modules. This is the standard micropython source (version v1.5.2), which has been adapted to use reachover infrastructure. At the present time, libffi (from pkgsrc) is used. Alternative locations for libffi can be set using the PKGSRC_PREFIX definition to make. In the whole scheme of things, micropython is quite small: % size bin/micropython text data bss dec hex filename 393495 1624 2208 397327 6100f bin/micropython % and runs much as expected: % bin/micropython MicroPython v1.5.2 on 2016-01-13; linux version Use Ctrl-D to exit, Ctrl-E for paste mode >>> print("hello world") hello world >>> list(5 * x + y for x in range(10) for y in [4, 2, 1]) [4, 2, 1, 9, 7, 6, 14, 12, 11, 19, 17, 16, 24, 22, 21, 29, 27, 26, 34, 32, 31, 39, 37, 36, 44, 42, 41, 49, 47, 46] >>> % python2.7 Python 2.7.10 (default, Oct 17 2015, 17:55:29) [GCC 4.8.5] on netbsd7 Type "help", "copyright", "credits" or "license" for more information. >>> print("hello world") hello world >>> list(5 * x + y for x in range(10) for y in [4, 2, 1]) [4, 2, 1, 9, 7, 6, 14, 12, 11, 19, 17, 16, 24, 22, 21, 29, 27, 26, 34, 32, 31, 39, 37, 36, 44, 42, 41, 49, 47, 46] >>> ^D % This (reachover) version runs all the tests which the gmake version does. % make t cd bin && make t cd /home/agc/local/micropython/bin/../dist/unix/../tests && env MICROPY_MICROPYTHON=/home/agc/local/micropython/bin/micropython ./run-tests pass basics/0prelim.py pass basics/andor.py pass basics/array1.py pass basics/array_add.py pass basics/array_construct.py pass basics/array_construct2.py ... pass unix/ffi_callback.py pass unix/ffi_float.py pass unix/ffi_float2.py 474 tests performed (15812 individual testcases) 474 tests passed 5 tests skipped: cmd_showbc cmd_verbose machine1 machine_mem extra_coverage % The sources are available from github: https://github.com/micropython/micropython micropython release at: https://github.com/micropython/micropython/releases Sources for 1.5.2 taken from: https://github.com/micropython/micropython/archive/v1.5.2.tar.gz Alistair Crooks agc@@netbsd.org Wed Jan 13 17:15:30 PST 2016 @ text @@