head 1.1; branch 1.1.1; access; symbols netbsd-11-0-RC4:1.1.1.1 netbsd-11-0-RC3:1.1.1.1 netbsd-11-0-RC2:1.1.1.1 netbsd-11-0-RC1:1.1.1.1 netbsd-11:1.1.1.1.0.14 netbsd-11-base:1.1.1.1 netbsd-10-1-RELEASE:1.1.1.1 netbsd-8-3-RELEASE:1.1.1.1 netbsd-9-4-RELEASE:1.1.1.1 netbsd-10-0-RELEASE:1.1.1.1 netbsd-10-0-RC6:1.1.1.1 netbsd-10-0-RC5:1.1.1.1 netbsd-10-0-RC4:1.1.1.1 netbsd-10-0-RC3:1.1.1.1 netbsd-10-0-RC2:1.1.1.1 netbsd-10-0-RC1:1.1.1.1 netbsd-10:1.1.1.1.0.12 netbsd-10-base:1.1.1.1 netbsd-9-3-RELEASE:1.1.1.1 netbsd-9-2-RELEASE:1.1.1.1 netbsd-9-1-RELEASE:1.1.1.1 netbsd-8-2-RELEASE:1.1.1.1 netbsd-9-0-RELEASE:1.1.1.1 netbsd-9-0-RC2:1.1.1.1 netbsd-9-0-RC1:1.1.1.1 netbsd-9:1.1.1.1.0.10 netbsd-9-base:1.1.1.1 netbsd-8-1-RELEASE:1.1.1.1 netbsd-8-1-RC1:1.1.1.1 xf86-video-intel-6afed33b2d673d88674f0c76efe500ae414e8e1b:1.1.1.1 netbsd-7-2-RELEASE:1.1.1.1 netbsd-8-0-RELEASE:1.1.1.1 netbsd-8-0-RC2:1.1.1.1 netbsd-8-0-RC1:1.1.1.1 netbsd-7-1-2-RELEASE:1.1.1.1 netbsd-7-1-1-RELEASE:1.1.1.1 netbsd-8:1.1.1.1.0.8 netbsd-8-base:1.1.1.1 netbsd-7-1:1.1.1.1.0.6 netbsd-7-1-RELEASE:1.1.1.1 netbsd-7-1-RC2:1.1.1.1 netbsd-7-1-RC1:1.1.1.1 netbsd-7-0-2-RELEASE:1.1.1.1 netbsd-7-0-1-RELEASE:1.1.1.1 netbsd-7-0:1.1.1.1.0.4 netbsd-7-0-RELEASE:1.1.1.1 netbsd-7-0-RC3:1.1.1.1 netbsd-7-0-RC2:1.1.1.1 netbsd-7-0-RC1:1.1.1.1 xf86-video-intel-2-99-917:1.1.1.1 xf86-video-intel-2-99-916:1.1.1.1 netbsd-7:1.1.1.1.0.2 netbsd-7-base:1.1.1.1 riastradh-xf86-video-intel-2-7-1-pre-2-21-15:1.1.1.1 xf86-video-intel-2-21-15:1.1.1.1 xorg:1.1.1; locks; strict; comment @# @; 1.1 date 2014.03.21.22.42.43; author riastradh; state Exp; branches 1.1.1.1; next ; commitid gkwXFwvN4HJ5qCtx; 1.1.1.1 date 2014.03.21.22.42.43; author riastradh; state Exp; branches; next ; commitid gkwXFwvN4HJ5qCtx; desc @@ 1.1 log @Initial revision @ text @/* * Copyright © 2008 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Author: * Zou Nan hai * Zhang Hua jun * Xing Dong sheng * */ mov (8) g76.0<1>UD g1.0<8,8,1>UD {align1}; //mov (8) g77.0<1>UD g2.0<8,8,1>UD {align1}; include(`block_clear.g4i') mov (8) g115.0<1>UD g1.0<8,8,1>UD {align1}; mov (8) g116.0<1>UD g1.0<8,8,1>UD {align1}; /*Y buffer*/ mov(1) g1.8<1>UD 0x007000fUD { align1 }; asr (2) g115.14<1>W g1.14<2,2,1>W 1UW {align1}; add (2) g115.0<1>UD g116.0<2,2,1>UD g115.14<2,2,1>W {align1}; and (1) g115.4<1>UD g115.4<1,1,1>UD 0xFFFFFFFEUD {align1}; mov (1) g115.8<1>UD 0x1fUD { align1 }; //read 1 line, 32 columns. /*first vector*/ and.nz (1) null g1.31<1,1,1>UB 0x1UW {align1}; (f0) add (1) g115.4<1>UD g115.4<1,1,1>UD 1UD {align1}; define(`surface',`4') define(`mv1',`g1.14') define(`mv2',`g1.16') include(`motion_field_y.g4i') mov (8) g28.0<1>UD g96.0<8,8,1>UD {align1}; mov (8) g30.0<1>UD g97.0<8,8,1>UD {align1}; mov (8) g32.0<1>UD g98.0<8,8,1>UD {align1}; mov (8) g34.0<1>UD g99.0<8,8,1>UD {align1}; mov (8) g36.0<1>UD g100.0<8,8,1>UD {align1}; mov (8) g38.0<1>UD g101.0<8,8,1>UD {align1}; mov (8) g40.0<1>UD g102.0<8,8,1>UD {align1}; mov (8) g42.0<1>UD g103.0<8,8,1>UD {align1}; /*second vector*/ asr (2) g115.14<1>W g1.22<2,2,1>W 1UW {align1}; add (2) g115.0<1>UD g116.0<2,2,1>UD g115.14<2,2,1>W {align1}; and (1) g115.4<1>UD g115.4<1,1,1>UD 0xFFFFFFFEUD {align1}; mov (1) g115.8<1>UD 0x1fUD { align1 }; //read 1 line, 32 columns. and.nz (1) null g1.31<1,1,1>UB 0x4UW {align1}; (f0) add (1) g115.4<1>UD g115.4<1,1,1>UD 1UD {align1}; define(`surface',`4') define(`mv1',`g1.22') define(`mv2',`g1.24') include(`motion_field_y.g4i') mov (8) g29.0<1>UD g96.0<8,8,1>UD {align1}; mov (8) g31.0<1>UD g97.0<8,8,1>UD {align1}; mov (8) g33.0<1>UD g98.0<8,8,1>UD {align1}; mov (8) g35.0<1>UD g99.0<8,8,1>UD {align1}; mov (8) g37.0<1>UD g100.0<8,8,1>UD {align1}; mov (8) g39.0<1>UD g101.0<8,8,1>UD {align1}; mov (8) g41.0<1>UD g102.0<8,8,1>UD {align1}; mov (8) g43.0<1>UD g103.0<8,8,1>UD {align1}; /*U buffer, V buffer*/ /*first vector*/ mov(1) g115.8<1>UD 0x007000fUD { align1 }; asr (2) g115.14<1>W g1.14<2,2,1>W 2UW {align1}; asr (2) g115.0<1>D g116.0<2,2,1>D 1D {align1}; add (2) g115.0<1>D g115.0<2,2,1>D g115.14<2,2,1>W {align1}; and (1) g115.4<1>UD g115.4<1,1,1>UD 0xFFFFFFFEUD {align1}; and.nz (1) null g1.31<1,1,1>UB 0x1UW {align1}; (f0) add (1) g115.4<1>UD g115.4<1,1,1>UD 1UD {align1}; define(`surface_u',`5') define(`surface_v',`6') define(`mv1',`g1.14') define(`mv2',`g1.16') include(`motion_field_uv.g4i') mov (8) g44.0<1>UW g78.0<8,8,1>UW {align1}; mov (8) g45.0<1>UW g79.0<8,8,1>UW {align1}; mov (8) g46.0<1>UW g80.0<8,8,1>UW {align1}; mov (8) g47.0<1>UW g81.0<8,8,1>UW {align1}; mov (8) g48.0<1>UW g82.0<8,8,1>UW {align1}; mov (8) g49.0<1>UW g83.0<8,8,1>UW {align1}; mov (8) g50.0<1>UW g84.0<8,8,1>UW {align1}; mov (8) g51.0<1>UW g85.0<8,8,1>UW {align1}; /*second vector*/ asr (2) g115.14<1>W g1.22<2,2,1>W 2UW {align1}; asr (2) g115.0<1>D g116.0<2,2,1>D 1D {align1}; add (2) g115.0<1>D g115.0<2,2,1>D g115.14<2,2,1>W {align1}; and (1) g115.4<1>UD g115.4<1,1,1>UD 0xFFFFFFFEUD {align1}; and.nz (1) null g1.31<1,1,1>UB 0x4UW {align1}; (f0) add (1) g115.4<1>UD g115.4<1,1,1>UD 1UD {align1}; define(`mv1',`g1.22') define(`mv2',`g1.24') include(`motion_field_uv.g4i') mov (8) g44.16<1>UW g78.0<8,8,1>UW {align1}; mov (8) g45.16<1>UW g79.0<8,8,1>UW {align1}; mov (8) g46.16<1>UW g80.0<8,8,1>UW {align1}; mov (8) g47.16<1>UW g81.0<8,8,1>UW {align1}; mov (8) g48.16<1>UW g82.0<8,8,1>UW {align1}; mov (8) g49.16<1>UW g83.0<8,8,1>UW {align1}; mov (8) g50.16<1>UW g84.0<8,8,1>UW {align1}; mov (8) g51.16<1>UW g85.0<8,8,1>UW {align1}; include(`addidct.g4i') //send (16) 0 acc0<1>UW g0<8,8,1>UW // thread_spawner(0, 0, 0) mlen 1 rlen 0 { align1 EOT}; @ 1.1.1.1 log @initial import of xf86-video-intel-2.21.15 @ text @@