head 1.1; branch 1.1.1; access; symbols netbsd-11-0-RC7:1.1.1.1 netbsd-11-0-RC6:1.1.1.1 netbsd-11-0-RC5:1.1.1.1 netbsd-11-0-RC4:1.1.1.1 netbsd-11-0-RC3:1.1.1.1 netbsd-11-0-RC2:1.1.1.1 netbsd-11-0-RC1:1.1.1.1 netbsd-11:1.1.1.1.0.6 netbsd-11-base:1.1.1.1 netbsd-10-1-RELEASE:1.1.1.1 netbsd-9-4-RELEASE:1.1.1.1 netbsd-10-0-RELEASE:1.1.1.1 netbsd-10-0-RC6:1.1.1.1 netbsd-10-0-RC5:1.1.1.1 netbsd-10-0-RC4:1.1.1.1 netbsd-10-0-RC3:1.1.1.1 netbsd-10-0-RC2:1.1.1.1 netbsd-10-0-RC1:1.1.1.1 netbsd-10:1.1.1.1.0.4 netbsd-10-base:1.1.1.1 netbsd-9-3-RELEASE:1.1.1.1 netbsd-9-2-RELEASE:1.1.1.1 netbsd-9-1-RELEASE:1.1.1.1 netbsd-9-0-RELEASE:1.1.1.1 netbsd-9-0-RC2:1.1.1.1 netbsd-9-0-RC1:1.1.1.1 netbsd-9:1.1.1.1.0.2 netbsd-9-base:1.1.1.1 src-current-2019-03-18:1.1.1.1 NetBSD:1.1.1; locks; strict; comment @# @; 1.1 date 2019.05.10.06.22.24; author mrg; state Exp; branches 1.1.1.1; next ; commitid NVvVabT92hhUGCmB; 1.1.1.1 date 2019.05.10.06.22.24; author mrg; state Exp; branches; next ; commitid NVvVabT92hhUGCmB; desc @@ 1.1 log @Initial revision @ text @/* * Copyright © 2008 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Author: * Zou Nan hai * Yan Li * Liu Xi bin */ /* GRF allocation: g1~g30: constant buffer g1~g2:intra IQ matrix g3~g4:non intra IQ matrix g5~g20:IDCT table g31: thread payload g32: message descriptor for reading reference data g58~g81:reference data g82: thread payload backup g83~g106:IDCT data */ mov (2) g31.0<1>UD g82.12<2,2,1>UW {align1}; //restore x and y and.nz (1) null g82.2<1,1,1>UW 0x20UW {align1}; //dct_type (f0) jmpi field_dct; add (16) g58.0<1>W g83.0<16,16,1>W g58.0<16,16,2>UB {align1}; add (16) g59.0<1>W g84.0<16,16,1>W g59.0<16,16,2>UB {align1}; add (16) g60.0<1>W g85.0<16,16,1>W g60.0<16,16,2>UB {align1}; add (16) g61.0<1>W g86.0<16,16,1>W g61.0<16,16,2>UB {align1}; add (16) g62.0<1>W g87.0<16,16,1>W g62.0<16,16,2>UB {align1}; add (16) g63.0<1>W g88.0<16,16,1>W g63.0<16,16,2>UB {align1}; add (16) g64.0<1>W g89.0<16,16,1>W g64.0<16,16,2>UB {align1}; add (16) g65.0<1>W g90.0<16,16,1>W g65.0<16,16,2>UB {align1}; add (16) g66.0<1>W g91.0<16,16,1>W g66.0<16,16,2>UB {align1}; add (16) g67.0<1>W g92.0<16,16,1>W g67.0<16,16,2>UB {align1}; add (16) g68.0<1>W g93.0<16,16,1>W g68.0<16,16,2>UB {align1}; add (16) g69.0<1>W g94.0<16,16,1>W g69.0<16,16,2>UB {align1}; add (16) g70.0<1>W g95.0<16,16,1>W g70.0<16,16,2>UB {align1}; add (16) g71.0<1>W g96.0<16,16,1>W g71.0<16,16,2>UB {align1}; add (16) g72.0<1>W g97.0<16,16,1>W g72.0<16,16,2>UB {align1}; add (16) g73.0<1>W g98.0<16,16,1>W g73.0<16,16,2>UB {align1}; jmpi write_back; field_dct: add (16) g58.0<1>W g83.0<16,16,1>W g58.0<16,16,2>UB {align1}; add (16) g59.0<1>W g91.0<16,16,1>W g59.0<16,16,2>UB {align1}; add (16) g60.0<1>W g84.0<16,16,1>W g60.0<16,16,2>UB {align1}; add (16) g61.0<1>W g92.0<16,16,1>W g61.0<16,16,2>UB {align1}; add (16) g62.0<1>W g85.0<16,16,1>W g62.0<16,16,2>UB {align1}; add (16) g63.0<1>W g93.0<16,16,1>W g63.0<16,16,2>UB {align1}; add (16) g64.0<1>W g86.0<16,16,1>W g64.0<16,16,2>UB {align1}; add (16) g65.0<1>W g94.0<16,16,1>W g65.0<16,16,2>UB {align1}; add (16) g66.0<1>W g87.0<16,16,1>W g66.0<16,16,2>UB {align1}; add (16) g67.0<1>W g95.0<16,16,1>W g67.0<16,16,2>UB {align1}; add (16) g68.0<1>W g88.0<16,16,1>W g68.0<16,16,2>UB {align1}; add (16) g69.0<1>W g96.0<16,16,1>W g69.0<16,16,2>UB {align1}; add (16) g70.0<1>W g89.0<16,16,1>W g70.0<16,16,2>UB {align1}; add (16) g71.0<1>W g97.0<16,16,1>W g71.0<16,16,2>UB {align1}; add (16) g72.0<1>W g90.0<16,16,1>W g72.0<16,16,2>UB {align1}; add (16) g73.0<1>W g98.0<16,16,1>W g73.0<16,16,2>UB {align1}; write_back: mov (1) g31.8<1>UD 0x00F000FUD {align1}; mov.sat (16) g58.0<2>UB g58.0<16,16,1>W {align1}; mov.sat (16) g59.0<2>UB g59.0<16,16,1>W {align1}; mov.sat (16) g60.0<2>UB g60.0<16,16,1>W {align1}; mov.sat (16) g61.0<2>UB g61.0<16,16,1>W {align1}; mov.sat (16) g62.0<2>UB g62.0<16,16,1>W {align1}; mov.sat (16) g63.0<2>UB g63.0<16,16,1>W {align1}; mov.sat (16) g64.0<2>UB g64.0<16,16,1>W {align1}; mov.sat (16) g65.0<2>UB g65.0<16,16,1>W {align1}; mov.sat (16) g66.0<2>UB g66.0<16,16,1>W {align1}; mov.sat (16) g67.0<2>UB g67.0<16,16,1>W {align1}; mov.sat (16) g68.0<2>UB g68.0<16,16,1>W {align1}; mov.sat (16) g69.0<2>UB g69.0<16,16,1>W {align1}; mov.sat (16) g70.0<2>UB g70.0<16,16,1>W {align1}; mov.sat (16) g71.0<2>UB g71.0<16,16,1>W {align1}; mov.sat (16) g72.0<2>UB g72.0<16,16,1>W {align1}; mov.sat (16) g73.0<2>UB g73.0<16,16,1>W {align1}; mov (16) m1.0<1>UB g58.0<16,16,2>UB {align1}; mov (16) m1.16<1>UB g59.0<16,16,2>UB {align1}; mov (16) m2.0<1>UB g60.0<16,16,2>UB {align1}; mov (16) m2.16<1>UB g61.0<16,16,2>UB {align1}; mov (16) m3.0<1>UB g62.0<16,16,2>UB {align1}; mov (16) m3.16<1>UB g63.0<16,16,2>UB {align1}; mov (16) m4.0<1>UB g64.0<16,16,2>UB {align1}; mov (16) m4.16<1>UB g65.0<16,16,2>UB {align1}; mov (16) m5.0<1>UB g66.0<16,16,2>UB {align1}; mov (16) m5.16<1>UB g67.0<16,16,2>UB {align1}; mov (16) m6.0<1>UB g68.0<16,16,2>UB {align1}; mov (16) m6.16<1>UB g69.0<16,16,2>UB {align1}; mov (16) m7.0<1>UB g70.0<16,16,2>UB {align1}; mov (16) m7.16<1>UB g71.0<16,16,2>UB {align1}; mov (16) m8.0<1>UB g72.0<16,16,2>UB {align1}; mov (16) m8.16<1>UB g73.0<16,16,2>UB {align1}; send (16) 0 acc0<1>UW g31<8,8,1>UW write(0,0,2,0) mlen 9 rlen 0 {align1}; //U mov (1) g31.8<1>UD 0x0070007UD { align1 }; shr (2) g31.0<1>UD g31.0<2,2,1>UD 1D {align1}; add (16) g74.0<1>W g99.0<16,16,1>W g74.0<16,16,1>UW {align1}; add (16) g75.0<1>W g100.0<16,16,1>W g75.0<16,16,1>UW {align1}; add (16) g76.0<1>W g101.0<16,16,1>W g76.0<16,16,1>UW {align1}; add (16) g77.0<1>W g102.0<16,16,1>W g77.0<16,16,1>UW {align1}; mov.sat (16) g74.0<2>UB g74.0<16,16,1>W {align1}; mov.sat (16) g75.0<2>UB g75.0<16,16,1>W {align1}; mov.sat (16) g76.0<2>UB g76.0<16,16,1>W {align1}; mov.sat (16) g77.0<2>UB g77.0<16,16,1>W {align1}; mov (16) m1.0<1>UB g74.0<16,16,2>UB {align1}; mov (16) m1.16<1>UB g75.0<16,16,2>UB {align1}; mov (16) m2.0<1>UB g76.0<16,16,2>UB {align1}; mov (16) m2.16<1>UB g77.0<16,16,2>UB {align1}; send (16) 0 acc0<1>UW g31<8,8,1>UW write(1, 0, 2, 0) mlen 3 rlen 0 { align1 }; //V add (16) g78.0<1>UW g103.0<16,16,1>W g78.0<16,16,1>UW {align1}; add (16) g79.0<1>UW g104.0<16,16,1>W g79.0<16,16,1>UW {align1}; add (16) g80.0<1>UW g105.0<16,16,1>W g80.0<16,16,1>UW {align1}; add (16) g81.0<1>UW g106.0<16,16,1>W g81.0<16,16,1>UW {align1}; mov.sat (16) g78.0<2>UB g78.0<16,16,1>W {align1}; mov.sat (16) g79.0<2>UB g79.0<16,16,1>W {align1}; mov.sat (16) g80.0<2>UB g80.0<16,16,1>W {align1}; mov.sat (16) g81.0<2>UB g81.0<16,16,1>W {align1}; mov (16) m1.0<1>UB g78.0<16,16,2>UB {align1}; mov (16) m1.16<1>UB g79.0<16,16,2>UB {align1}; mov (16) m2.0<1>UB g80.0<16,16,2>UB {align1}; mov (16) m2.16<1>UB g81.0<16,16,2>UB {align1}; send (16) 0 acc0<1>UW g31<8,8,1>UW write(2, 0, 2, 0) mlen 3 rlen 0 { align1 }; send (16) 0 acc0<1>UW g0<8,8,1>UW thread_spawner(0, 0, 0) mlen 1 rlen 0 { align1 EOT}; @ 1.1.1.1 log @import our slightly older intel xf86 driver as "intel-2014". this driver works better on older systems, but doesn't support gen9 as well. @ text @@