head 1.3; access; symbols netbsd-11-0-RC6:1.3 netbsd-11-0-RC5:1.3 netbsd-11-0-RC4:1.3 netbsd-11-0-RC3:1.3 netbsd-11-0-RC2:1.3 netbsd-11-0-RC1:1.3 perseant-exfatfs-base-20250801:1.3 netbsd-11:1.3.0.12 netbsd-11-base:1.3 netbsd-10-1-RELEASE:1.3 perseant-exfatfs-base-20240630:1.3 perseant-exfatfs:1.3.0.10 perseant-exfatfs-base:1.3 netbsd-9-4-RELEASE:1.2 netbsd-10-0-RELEASE:1.3 netbsd-10-0-RC6:1.3 netbsd-10-0-RC5:1.3 netbsd-10-0-RC4:1.3 netbsd-10-0-RC3:1.3 netbsd-10-0-RC2:1.3 thorpej-ifq:1.3.0.8 thorpej-ifq-base:1.3 thorpej-altq-separation:1.3.0.6 thorpej-altq-separation-base:1.3 netbsd-10-0-RC1:1.3 netbsd-10:1.3.0.4 netbsd-10-base:1.3 bouyer-sunxi-drm:1.3.0.2 bouyer-sunxi-drm-base:1.3 netbsd-9-3-RELEASE:1.2 linux-drm-v5-6-rc3:1.1.1.2 thorpej-i2c-spi-conf2:1.2.0.30 thorpej-i2c-spi-conf2-base:1.2 thorpej-futex2:1.2.0.28 thorpej-futex2-base:1.2 thorpej-cfargs2:1.2.0.26 thorpej-cfargs2-base:1.2 cjep_sun2x-base1:1.2 cjep_sun2x:1.2.0.24 cjep_sun2x-base:1.2 cjep_staticlib_x-base1:1.2 netbsd-9-2-RELEASE:1.2 cjep_staticlib_x:1.2.0.22 cjep_staticlib_x-base:1.2 thorpej-i2c-spi-conf:1.2.0.20 thorpej-i2c-spi-conf-base:1.2 thorpej-cfargs:1.2.0.18 thorpej-cfargs-base:1.2 thorpej-futex:1.2.0.16 thorpej-futex-base:1.2 netbsd-9-1-RELEASE:1.2 bouyer-xenpvh-base2:1.2 phil-wifi-20200421:1.2 bouyer-xenpvh-base1:1.2 phil-wifi-20200411:1.2 bouyer-xenpvh:1.2.0.14 bouyer-xenpvh-base:1.2 is-mlppp:1.2.0.12 is-mlppp-base:1.2 phil-wifi-20200406:1.2 ad-namecache-base3:1.2 netbsd-9-0-RELEASE:1.2 netbsd-9-0-RC2:1.2 ad-namecache-base2:1.2 ad-namecache-base1:1.2 ad-namecache:1.2.0.10 ad-namecache-base:1.2 netbsd-9-0-RC1:1.2 phil-wifi-20191119:1.2 netbsd-9:1.2.0.8 netbsd-9-base:1.2 phil-wifi:1.2.0.6 phil-wifi-20190609:1.2 isaki-audio2:1.2.0.4 isaki-audio2-base:1.2 pgoyette-compat-merge-20190127:1.2.2.2 pgoyette-compat-20190127:1.2 pgoyette-compat-20190118:1.2 pgoyette-compat-1226:1.2 pgoyette-compat-1126:1.2 pgoyette-compat-1020:1.2 pgoyette-compat-0930:1.2 pgoyette-compat:1.2.0.2 pgoyette-compat-0906:1.2 linux-drm-v4-4-143:1.1.1.1 LINUX:1.1.1; locks; strict; comment @# @; 1.3 date 2021.12.18.23.45.41; author riastradh; state Exp; branches; next 1.2; commitid Zzh9v7Bb24ydPblD; 1.2 date 2018.08.27.04.58.35; author riastradh; state Exp; branches 1.2.2.1 1.2.6.1; next 1.1; commitid SZZre9lWvwC1sIPA; 1.1 date 2018.08.27.01.34.56; author riastradh; state Exp; branches 1.1.1.1; next ; commitid J8kFZ57DI7RmkHPA; 1.2.2.1 date 2018.08.27.04.58.35; author pgoyette; state dead; branches; next 1.2.2.2; commitid HCi1bXD317XIK0RA; 1.2.2.2 date 2018.09.06.06.56.30; author pgoyette; state Exp; branches; next ; commitid HCi1bXD317XIK0RA; 1.2.6.1 date 2018.08.27.04.58.35; author christos; state dead; branches; next 1.2.6.2; commitid jtc8rnCzWiEEHGqB; 1.2.6.2 date 2019.06.10.22.08.24; author christos; state Exp; branches; next ; commitid jtc8rnCzWiEEHGqB; 1.1.1.1 date 2018.08.27.01.34.56; author riastradh; state Exp; branches; next 1.1.1.2; commitid J8kFZ57DI7RmkHPA; 1.1.1.2 date 2021.12.18.20.15.42; author riastradh; state Exp; branches; next ; commitid Qm9wp54q2SRJDalD; desc @@ 1.3 log @Merge linux-drm-v5-6-rc3 @ text @/* * Copyright 2013 Red Hat Inc. * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice shall be included in * all copies or substantial portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR * OTHER DEALINGS IN THE SOFTWARE. * * Authors: Ben Skeggs */ #ifdef INCLUDE_PROC process(PROC_HOST, #host_init, #host_recv) #endif /****************************************************************************** * HOST data segment *****************************************************************************/ #ifdef INCLUDE_DATA // HOST (R)FIFO packet format .equ #fifo_process 0x00 .equ #fifo_message 0x04 .equ #fifo_data0 0x08 .equ #fifo_data1 0x0c // HOST HOST->PWR queue description .equ #fifo_qlen 4 // log2(size of queue entry in bytes) .equ #fifo_qnum 3 // log2(max number of entries in queue) .equ #fifo_qmaskb (1 << #fifo_qnum) // max number of entries in queue .equ #fifo_qmaskp (#fifo_qmaskb - 1) .equ #fifo_qmaskf ((#fifo_qmaskb << 1) - 1) .equ #fifo_qsize (1 << (#fifo_qlen + #fifo_qnum)) fifo_queue: .skip 128 // #fifo_qsize // HOST PWR->HOST queue description .equ #rfifo_qlen 4 // log2(size of queue entry in bytes) .equ #rfifo_qnum 3 // log2(max number of entries in queue) .equ #rfifo_qmaskb (1 << #rfifo_qnum) // max number of entries in queue .equ #rfifo_qmaskp (#rfifo_qmaskb - 1) .equ #rfifo_qmaskf ((#rfifo_qmaskb << 1) - 1) .equ #rfifo_qsize (1 << (#rfifo_qlen + #rfifo_qnum)) rfifo_queue: .skip 128 // #rfifo_qsize #endif /****************************************************************************** * HOST code segment *****************************************************************************/ #ifdef INCLUDE_CODE // HOST->PWR comms - dequeue message(s) for process(es) from FIFO // // $r15 - current (host) // $r0 - zero host_send: nv_iord($r1, NV_PPWR_FIFO_GET(0)) nv_iord($r2, NV_PPWR_FIFO_PUT(0)) cmp b32 $r1 $r2 bra e #host_send_done // calculate address of message and $r14 $r1 #fifo_qmaskp shl b32 $r14 $r14 #fifo_qlen add b32 $r14 #fifo_queue // read message data, and pass to appropriate process ld b32 $r11 D[$r14 + #fifo_data1] ld b32 $r12 D[$r14 + #fifo_data0] ld b32 $r13 D[$r14 + #fifo_message] ld b32 $r14 D[$r14 + #fifo_process] call(send) // increment GET add b32 $r1 0x1 and $r14 $r1 #fifo_qmaskf nv_iowr(NV_PPWR_FIFO_GET(0), $r14) bra #host_send host_send_done: ret // PWR->HOST comms - enqueue message for HOST to RFIFO // // $r15 - current (host) // $r14 - process // $r13 - message // $r12 - message data 0 // $r11 - message data 1 // $r0 - zero host_recv: // message from intr handler == HOST->PWR comms pending imm32($r1, PROC_KERN) cmp b32 $r14 $r1 bra e #host_send // wait for space in RFIFO host_recv_wait: nv_iord($r1, NV_PPWR_RFIFO_GET) nv_iord($r2, NV_PPWR_RFIFO_PUT) xor $r1 #rfifo_qmaskb cmp b32 $r1 $r2 bra e #host_recv_wait and $r3 $r2 #rfifo_qmaskp shl b32 $r3 #rfifo_qlen add b32 $r3 #rfifo_queue // enqueue message st b32 D[$r3 + #fifo_data1] $r11 st b32 D[$r3 + #fifo_data0] $r12 st b32 D[$r3 + #fifo_message] $r13 st b32 D[$r3 + #fifo_process] $r14 add b32 $r2 0x1 and $r2 #rfifo_qmaskf nv_iowr(NV_PPWR_RFIFO_PUT, $r2) // notify host of pending message mov $r2 NV_PPWR_INTR_TRIGGER_USER0 nv_iowr(NV_PPWR_INTR_TRIGGER, $r2) ret // $r15 - current (host) // $r0 - zero host_init: // store each fifo's base/size in H2D/D2H scratch regs mov $r1 #fifo_qsize shl b32 $r1 16 or $r1 #fifo_queue nv_iowr(NV_PPWR_H2D, $r1); mov $r1 #rfifo_qsize shl b32 $r1 16 or $r1 #rfifo_queue nv_iowr(NV_PPWR_D2H, $r1); // enable fifo subintr for first fifo mov $r1 1 nv_iowr(NV_PPWR_FIFO_INTR_EN, $r1) ret #endif @ 1.2 log @merge linux-drm-v4-4-143 @ text @d101 1 a101 2 mov $r1 (PROC_KERN & 0x0000ffff) sethi $r1 (PROC_KERN & 0xffff0000) @ 1.2.6.1 log @file host.fuc was added on branch phil-wifi on 2019-06-10 22:08:24 +0000 @ text @d1 151 @ 1.2.6.2 log @Sync with HEAD @ text @a0 151 /* * Copyright 2013 Red Hat Inc. * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice shall be included in * all copies or substantial portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR * OTHER DEALINGS IN THE SOFTWARE. * * Authors: Ben Skeggs */ #ifdef INCLUDE_PROC process(PROC_HOST, #host_init, #host_recv) #endif /****************************************************************************** * HOST data segment *****************************************************************************/ #ifdef INCLUDE_DATA // HOST (R)FIFO packet format .equ #fifo_process 0x00 .equ #fifo_message 0x04 .equ #fifo_data0 0x08 .equ #fifo_data1 0x0c // HOST HOST->PWR queue description .equ #fifo_qlen 4 // log2(size of queue entry in bytes) .equ #fifo_qnum 3 // log2(max number of entries in queue) .equ #fifo_qmaskb (1 << #fifo_qnum) // max number of entries in queue .equ #fifo_qmaskp (#fifo_qmaskb - 1) .equ #fifo_qmaskf ((#fifo_qmaskb << 1) - 1) .equ #fifo_qsize (1 << (#fifo_qlen + #fifo_qnum)) fifo_queue: .skip 128 // #fifo_qsize // HOST PWR->HOST queue description .equ #rfifo_qlen 4 // log2(size of queue entry in bytes) .equ #rfifo_qnum 3 // log2(max number of entries in queue) .equ #rfifo_qmaskb (1 << #rfifo_qnum) // max number of entries in queue .equ #rfifo_qmaskp (#rfifo_qmaskb - 1) .equ #rfifo_qmaskf ((#rfifo_qmaskb << 1) - 1) .equ #rfifo_qsize (1 << (#rfifo_qlen + #rfifo_qnum)) rfifo_queue: .skip 128 // #rfifo_qsize #endif /****************************************************************************** * HOST code segment *****************************************************************************/ #ifdef INCLUDE_CODE // HOST->PWR comms - dequeue message(s) for process(es) from FIFO // // $r15 - current (host) // $r0 - zero host_send: nv_iord($r1, NV_PPWR_FIFO_GET(0)) nv_iord($r2, NV_PPWR_FIFO_PUT(0)) cmp b32 $r1 $r2 bra e #host_send_done // calculate address of message and $r14 $r1 #fifo_qmaskp shl b32 $r14 $r14 #fifo_qlen add b32 $r14 #fifo_queue // read message data, and pass to appropriate process ld b32 $r11 D[$r14 + #fifo_data1] ld b32 $r12 D[$r14 + #fifo_data0] ld b32 $r13 D[$r14 + #fifo_message] ld b32 $r14 D[$r14 + #fifo_process] call(send) // increment GET add b32 $r1 0x1 and $r14 $r1 #fifo_qmaskf nv_iowr(NV_PPWR_FIFO_GET(0), $r14) bra #host_send host_send_done: ret // PWR->HOST comms - enqueue message for HOST to RFIFO // // $r15 - current (host) // $r14 - process // $r13 - message // $r12 - message data 0 // $r11 - message data 1 // $r0 - zero host_recv: // message from intr handler == HOST->PWR comms pending mov $r1 (PROC_KERN & 0x0000ffff) sethi $r1 (PROC_KERN & 0xffff0000) cmp b32 $r14 $r1 bra e #host_send // wait for space in RFIFO host_recv_wait: nv_iord($r1, NV_PPWR_RFIFO_GET) nv_iord($r2, NV_PPWR_RFIFO_PUT) xor $r1 #rfifo_qmaskb cmp b32 $r1 $r2 bra e #host_recv_wait and $r3 $r2 #rfifo_qmaskp shl b32 $r3 #rfifo_qlen add b32 $r3 #rfifo_queue // enqueue message st b32 D[$r3 + #fifo_data1] $r11 st b32 D[$r3 + #fifo_data0] $r12 st b32 D[$r3 + #fifo_message] $r13 st b32 D[$r3 + #fifo_process] $r14 add b32 $r2 0x1 and $r2 #rfifo_qmaskf nv_iowr(NV_PPWR_RFIFO_PUT, $r2) // notify host of pending message mov $r2 NV_PPWR_INTR_TRIGGER_USER0 nv_iowr(NV_PPWR_INTR_TRIGGER, $r2) ret // $r15 - current (host) // $r0 - zero host_init: // store each fifo's base/size in H2D/D2H scratch regs mov $r1 #fifo_qsize shl b32 $r1 16 or $r1 #fifo_queue nv_iowr(NV_PPWR_H2D, $r1); mov $r1 #rfifo_qsize shl b32 $r1 16 or $r1 #rfifo_queue nv_iowr(NV_PPWR_D2H, $r1); // enable fifo subintr for first fifo mov $r1 1 nv_iowr(NV_PPWR_FIFO_INTR_EN, $r1) ret #endif @ 1.2.2.1 log @file host.fuc was added on branch pgoyette-compat on 2018-09-06 06:56:30 +0000 @ text @d1 151 @ 1.2.2.2 log @Sync with HEAD Resolve a couple of conflicts (result of the uimin/uimax changes) @ text @a0 151 /* * Copyright 2013 Red Hat Inc. * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice shall be included in * all copies or substantial portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR * OTHER DEALINGS IN THE SOFTWARE. * * Authors: Ben Skeggs */ #ifdef INCLUDE_PROC process(PROC_HOST, #host_init, #host_recv) #endif /****************************************************************************** * HOST data segment *****************************************************************************/ #ifdef INCLUDE_DATA // HOST (R)FIFO packet format .equ #fifo_process 0x00 .equ #fifo_message 0x04 .equ #fifo_data0 0x08 .equ #fifo_data1 0x0c // HOST HOST->PWR queue description .equ #fifo_qlen 4 // log2(size of queue entry in bytes) .equ #fifo_qnum 3 // log2(max number of entries in queue) .equ #fifo_qmaskb (1 << #fifo_qnum) // max number of entries in queue .equ #fifo_qmaskp (#fifo_qmaskb - 1) .equ #fifo_qmaskf ((#fifo_qmaskb << 1) - 1) .equ #fifo_qsize (1 << (#fifo_qlen + #fifo_qnum)) fifo_queue: .skip 128 // #fifo_qsize // HOST PWR->HOST queue description .equ #rfifo_qlen 4 // log2(size of queue entry in bytes) .equ #rfifo_qnum 3 // log2(max number of entries in queue) .equ #rfifo_qmaskb (1 << #rfifo_qnum) // max number of entries in queue .equ #rfifo_qmaskp (#rfifo_qmaskb - 1) .equ #rfifo_qmaskf ((#rfifo_qmaskb << 1) - 1) .equ #rfifo_qsize (1 << (#rfifo_qlen + #rfifo_qnum)) rfifo_queue: .skip 128 // #rfifo_qsize #endif /****************************************************************************** * HOST code segment *****************************************************************************/ #ifdef INCLUDE_CODE // HOST->PWR comms - dequeue message(s) for process(es) from FIFO // // $r15 - current (host) // $r0 - zero host_send: nv_iord($r1, NV_PPWR_FIFO_GET(0)) nv_iord($r2, NV_PPWR_FIFO_PUT(0)) cmp b32 $r1 $r2 bra e #host_send_done // calculate address of message and $r14 $r1 #fifo_qmaskp shl b32 $r14 $r14 #fifo_qlen add b32 $r14 #fifo_queue // read message data, and pass to appropriate process ld b32 $r11 D[$r14 + #fifo_data1] ld b32 $r12 D[$r14 + #fifo_data0] ld b32 $r13 D[$r14 + #fifo_message] ld b32 $r14 D[$r14 + #fifo_process] call(send) // increment GET add b32 $r1 0x1 and $r14 $r1 #fifo_qmaskf nv_iowr(NV_PPWR_FIFO_GET(0), $r14) bra #host_send host_send_done: ret // PWR->HOST comms - enqueue message for HOST to RFIFO // // $r15 - current (host) // $r14 - process // $r13 - message // $r12 - message data 0 // $r11 - message data 1 // $r0 - zero host_recv: // message from intr handler == HOST->PWR comms pending mov $r1 (PROC_KERN & 0x0000ffff) sethi $r1 (PROC_KERN & 0xffff0000) cmp b32 $r14 $r1 bra e #host_send // wait for space in RFIFO host_recv_wait: nv_iord($r1, NV_PPWR_RFIFO_GET) nv_iord($r2, NV_PPWR_RFIFO_PUT) xor $r1 #rfifo_qmaskb cmp b32 $r1 $r2 bra e #host_recv_wait and $r3 $r2 #rfifo_qmaskp shl b32 $r3 #rfifo_qlen add b32 $r3 #rfifo_queue // enqueue message st b32 D[$r3 + #fifo_data1] $r11 st b32 D[$r3 + #fifo_data0] $r12 st b32 D[$r3 + #fifo_message] $r13 st b32 D[$r3 + #fifo_process] $r14 add b32 $r2 0x1 and $r2 #rfifo_qmaskf nv_iowr(NV_PPWR_RFIFO_PUT, $r2) // notify host of pending message mov $r2 NV_PPWR_INTR_TRIGGER_USER0 nv_iowr(NV_PPWR_INTR_TRIGGER, $r2) ret // $r15 - current (host) // $r0 - zero host_init: // store each fifo's base/size in H2D/D2H scratch regs mov $r1 #fifo_qsize shl b32 $r1 16 or $r1 #fifo_queue nv_iowr(NV_PPWR_H2D, $r1); mov $r1 #rfifo_qsize shl b32 $r1 16 or $r1 #rfifo_queue nv_iowr(NV_PPWR_D2H, $r1); // enable fifo subintr for first fifo mov $r1 1 nv_iowr(NV_PPWR_FIFO_INTR_EN, $r1) ret #endif @ 1.1 log @Initial revision @ text @@ 1.1.1.1 log @Import drm from Linux v4.4.143 (commit a8ea6276d00555387deaaa5eaeb380cd5c17bdc9). drivers/gpu/drm -> sys/external/bsd/drm2/dist/drm include/drm -> sys/external/bsd/drm2/dist/include/drm include/uapi/drm -> sys/external/bsd/drm2/dist/uapi/drm GPL sources excluded. @ text @@ 1.1.1.2 log @Import drm from Linux v5.6-rc3 (commit f8788d86ab28f61f7b46eb6be375f8a726783636) drivers/gpu/drm -> sys/external/bsd/drm2/dist/drm include/drm -> sys/external/bsd/drm2/dist/include/drm include/uapi/drm -> sys/external/bsd/drm2/dist/include/uapi/drm GPL exclusions in dist/drm: - amd/amdgpu/amdgpu_atpx_handler.c - arc/ - arm/ - armada/ - aspeed/ - atmel-hlcdc/ - bochs/ - bridge/ - cirrus/ - drm_dp_cec.c - drm_dp_mst_topology_internal.h - drm_edid_load.c - drm_format_helper.c - drm_gem_cma_helper.c - drm_gem_framebuffer_helper.c - drm_gem_shmem_helper.c - drm_gem_ttm_helper.c - drm_gem_vram_helper.c - drm_hdcp.c - drm_lease.c - drm_mipi_dbi.c - drm_simple_kms_helper.c - drm_sysfs.c - drm_trace.h - drm_vram_helper_common.c - drm_writeback.c - etnaviv/ - exynos/ - fsl-dcu/ - gma500/ - hisilicon/ - i2c/tda9950.c - i2c/tda998x_drv.c - i915/gt/selftest_context.c - i915/gt/selftest_engine.c - i915/gt/selftest_engine.h - i915/gt/selftest_engine_cs.c - i915/gt/selftest_engine_pm.c - i915/i915_trace.h - i915/selftests/i915_live_selftests.h - i915/selftests/i915_mock_selftests.h - i915/selftests/i915_perf_selftests.h - i915/selftests/lib_sw_fence.h - imx/ - ingenic/ - lima/ - mcde/ - mediatek/ - meson/ - mgag200/ - msm/ - mxsfb/ - omapdrm/ - panel/ - panfrost/ - pl111/ - radeon/radeon_atpx_handler.c - rcar-du/ - rockchip/ - selftests/drm_cmdline_selftests.h - selftests/drm_modeset_selftests.h - selftests/test-drm_cmdline_parser.c - selftests/test-drm_damage_helper.c - selftests/test-drm_dp_mst_helper.c - selftests/test-drm_format.c - selftests/test-drm_framebuffer.c - selftests/test-drm_modeset_common.c - selftests/test-drm_modeset_common.h - selftests/test-drm_plane_helper.c - selftests/test-drm_rect.c - shmobile/ - sti/ - stm/ - sun4i/ - tegra/ - tilcdc/ - tiny/ - tve200/ - udl/ - v3d/ - vc4/ - virtio/virtgpu_trace.h - virtio/virtgpu_trace_points.c - vkms/ - vmwgfx/device_include/vmware_pack_begin.h - vmwgfx/device_include/vmware_pack_end.h - zte/ Exceptions -- these all appear to be files to which someone added an SPDX license header automatically by a script that is not aware of the default MIT licensing under drivers/gpu/drm: - ast/ast_dp501.c - ast/ast_dram_tables.h - lib/drm_random.c - lib/drm_random.h - i915/display/intel_acpi.c - i915/selftests/mock_gem_device.h - i915/selftests/i915_mock_selftests.h - i915/selftests/i915_live_selftests.h - r128/ati_pcigart.h - selftests/drm_mm_selftests.h - selftests/test-drm_mm.c - vmwgfx/device_include/vm_basic_types.h GPL exclusions in dist/include/drm: - bridge - drm_client.h - drm_fb_cma_helper.h - drm_format_helper.h - drm_gem_cma_helper.h - drm_gem_shmem_helper.h - drm_gem_ttm_helper.h - drm_gem_vram_helper.h - drm_lease.h - drm_mipi_dbi.h - drm_mipi_dsi.h - drm_of.h - drm_simple_kms_helper.h - drm_sysfs.h - drm_writeback.h - gma_drm.h - i2c/tda998x.h - i915_mei_hdcp_interface.h - intel-gtt.h Exceptions: - drm_agpsupport.h - was in original drm; wrong spdx header auto-added GPL exclusions in dist/include/uapi/drm: - armada_drm.h - etnaviv_drm.h - exynos_drm.h - lima_drm.h - omap_drm.h Exceptions: - i810_drm.h - was in original drm; spdx header is wrong @ text @d101 2 a102 1 imm32($r1, PROC_KERN) @