head 1.1; access; symbols perseant-exfatfs-base-20250801:1.1 perseant-exfatfs-base-20240630:1.1 perseant-exfatfs:1.1.0.140 perseant-exfatfs-base:1.1 bouyer-sunxi-drm:1.1.0.138 bouyer-sunxi-drm-base:1.1 cjep_sun2x:1.1.0.136 cjep_sun2x-base:1.1 cjep_staticlib_x-base1:1.1 cjep_staticlib_x:1.1.0.134 cjep_staticlib_x-base:1.1 thorpej-futex-base:1.1 bouyer-xenpvh-base2:1.1 phil-wifi-20200421:1.1 bouyer-xenpvh-base1:1.1 phil-wifi-20200411:1.1 bouyer-xenpvh:1.1.0.132 bouyer-xenpvh-base:1.1 phil-wifi-20200406:1.1 ad-namecache-base3:1.1 ad-namecache-base2:1.1 ad-namecache-base1:1.1 ad-namecache:1.1.0.130 ad-namecache-base:1.1 isaki-audio2:1.1.0.128 isaki-audio2-base:1.1 pgoyette-compat-merge-20190127:1.1 pgoyette-compat-20190127:1.1 pgoyette-compat-20190118:1.1 pgoyette-compat-1226:1.1 pgoyette-compat-1126:1.1 pgoyette-compat-1020:1.1 pgoyette-compat-0930:1.1 pgoyette-compat-0906:1.1 pgoyette-compat-0728:1.1 pgoyette-compat-0625:1.1 pgoyette-compat-0521:1.1 pgoyette-compat-0502:1.1 pgoyette-compat-0422:1.1 pgoyette-compat-0415:1.1 pgoyette-compat-0407:1.1 pgoyette-compat-0330:1.1 pgoyette-compat-0322:1.1 pgoyette-compat-0315:1.1 pgoyette-compat:1.1.0.10 pgoyette-compat-base:1.1 perseant-stdc-iso10646:1.1.0.126 perseant-stdc-iso10646-base:1.1 prg-localcount2-base3:1.1 prg-localcount2-base2:1.1 prg-localcount2-base1:1.1 prg-localcount2:1.1.0.124 prg-localcount2-base:1.1 pgoyette-localcount-20170426:1.1 bouyer-socketcan-base1:1.1 pgoyette-localcount-20170320:1.1 bouyer-socketcan:1.1.0.122 bouyer-socketcan-base:1.1 pgoyette-localcount-20170107:1.1 pgoyette-localcount-20161104:1.1 localcount-20160914:1.1 pgoyette-localcount-20160806:1.1 pgoyette-localcount-20160726:1.1 pgoyette-localcount:1.1.0.120 pgoyette-localcount-base:1.1 netbsd-5-2-3-RELEASE:1.1 netbsd-5-1-5-RELEASE:1.1 yamt-pagecache-base9:1.1 yamt-pagecache-tag8:1.1 tls-earlyentropy:1.1.0.118 tls-earlyentropy-base:1.1 riastradh-xf86-video-intel-2-7-1-pre-2-21-15:1.1 riastradh-drm2-base3:1.1 netbsd-5-2-2-RELEASE:1.1 netbsd-5-1-4-RELEASE:1.1 netbsd-5-2-1-RELEASE:1.1 netbsd-5-1-3-RELEASE:1.1 rmind-smpnet-nbase:1.1 rmind-smpnet:1.1.0.114 rmind-smpnet-base:1.1 agc-symver:1.1.0.116 agc-symver-base:1.1 tls-maxphys-base:1.1 yamt-pagecache-base8:1.1 netbsd-5-2:1.1.0.112 yamt-pagecache-base7:1.1 netbsd-5-2-RELEASE:1.1 netbsd-5-2-RC1:1.1 yamt-pagecache-base6:1.1 yamt-pagecache-base5:1.1 yamt-pagecache-base4:1.1 netbsd-5-1-2-RELEASE:1.1 netbsd-5-1-1-RELEASE:1.1 jmcneill-usbmp:1.1.0.110 jmcneill-usbmp-base:1.1 jmcneill-audiomp3:1.1.0.108 jmcneill-audiomp3-base:1.1 yamt-pagecache-base3:1.1 yamt-pagecache-base2:1.1 yamt-pagecache:1.1.0.106 yamt-pagecache-base:1.1 rmind-uvmplock-nbase:1.1 bouyer-quota2-nbase:1.1 bouyer-quota2:1.1.0.104 bouyer-quota2-base:1.1 jruoho-x86intr:1.1.0.102 jruoho-x86intr-base:1.1 matt-nb5-pq3:1.1.0.100 matt-nb5-pq3-base:1.1 netbsd-5-1:1.1.0.98 netbsd-5-1-RELEASE:1.1 yamt-nfs-mp-base11:1.1 netbsd-5-1-RC4:1.1 uebayasi-xip-base2:1.1 yamt-nfs-mp-base10:1.1 netbsd-5-1-RC3:1.1 netbsd-5-1-RC2:1.1 netbsd-5-1-RC1:1.1 rmind-uvmplock:1.1.0.96 rmind-uvmplock-base:1.1 yamt-nfs-mp-base9:1.1 uebayasi-xip:1.1.0.94 uebayasi-xip-base:1.1 netbsd-5-0-2-RELEASE:1.1 yamt-nfs-mp-base8:1.1 yamt-nfs-mp-base7:1.1 netbsd-5-0-1-RELEASE:1.1 jymxensuspend-base:1.1 yamt-nfs-mp-base6:1.1 yamt-nfs-mp-base5:1.1 yamt-nfs-mp-base4:1.1 jym-xensuspend-nbase:1.1 yamt-nfs-mp-base3:1.1 netbsd-5-0:1.1.0.92 netbsd-5-0-RELEASE:1.1 netbsd-5-0-RC4:1.1 netbsd-5-0-RC3:1.1 netbsd-5-0-RC2:1.1 jym-xensuspend:1.1.0.90 jym-xensuspend-base:1.1 netbsd-5-0-RC1:1.1 haad-dm-base2:1.1 haad-nbase2:1.1 ad-audiomp2:1.1.0.88 ad-audiomp2-base:1.1 netbsd-5:1.1.0.86 netbsd-5-base:1.1 haad-dm-base1:1.1 haad-dm:1.1.0.84 haad-dm-base:1.1 simonb-wapbl-nbase:1.1 yamt-pf42-base4:1.1 simonb-wapbl:1.1.0.82 simonb-wapbl-base:1.1 yamt-pf42-base3:1.1 hpcarm-cleanup-nbase:1.1 yamt-pf42-base2:1.1 yamt-nfs-mp-base2:1.1 yamt-nfs-mp:1.1.0.80 yamt-nfs-mp-base:1.1 yamt-pf42:1.1.0.78 yamt-pf42-base:1.1 ad-socklock-base1:1.1 yamt-lazymbuf-base15:1.1 yamt-lazymbuf-base14:1.1 keiichi-mipv6-nbase:1.1 mjf-devfs2:1.1.0.76 mjf-devfs2-base:1.1 keiichi-mipv6:1.1.0.74 keiichi-mipv6-base:1.1 bouyer-xeni386-merge1:1.1 vmlocking2-base3:1.1 bouyer-xeni386-nbase:1.1 yamt-kmem-base3:1.1 cube-autoconf:1.1.0.72 cube-autoconf-base:1.1 yamt-kmem-base2:1.1 bouyer-xeni386:1.1.0.70 bouyer-xeni386-base:1.1 yamt-kmem:1.1.0.68 yamt-kmem-base:1.1 vmlocking2-base2:1.1 reinoud-bufcleanup-nbase:1.1 vmlocking2:1.1.0.66 vmlocking2-base1:1.1 jmcneill-base:1.1 mjf-devfs:1.1.0.64 mjf-devfs-base:1.1 bouyer-xenamd64-base2:1.1 vmlocking-nbase:1.1 yamt-x86pmap-base4:1.1 bouyer-xenamd64:1.1.0.62 bouyer-xenamd64-base:1.1 yamt-x86pmap-base3:1.1 yamt-x86pmap-base2:1.1 yamt-x86pmap:1.1.0.60 yamt-x86pmap-base:1.1 jmcneill-pm:1.1.0.58 jmcneill-pm-base:1.1 hpcarm-cleanup:1.1.0.56 hpcarm-cleanup-base:1.1 mjf-ufs-trans-base:1.1 yamt-idlelwp-base8:1.1 reinoud-bufcleanup-base:1.1 vmlocking:1.1.0.54 vmlocking-base:1.1 ad-audiomp:1.1.0.52 ad-audiomp-base:1.1 yamt-idlelwp:1.1.0.50 post-newlock2-merge:1.1 newlock2-nbase:1.1 yamt-splraiseipl-base5:1.1 yamt-splraiseipl-base4:1.1 yamt-splraiseipl-base3:1.1 yamt-splraiseipl-base2:1.1 yamt-splraiseipl:1.1.0.48 yamt-splraiseipl-base:1.1 newlock2:1.1.0.46 newlock2-base:1.1 yamt-pdpolicy-base8:1.1 yamt-pdpolicy-base7:1.1 yamt-pdpolicy-base6:1.1 gdamore-uart:1.1.0.44 gdamore-uart-base:1.1 simonb-timcounters-final:1.1 yamt-pdpolicy-base5:1.1 elad-kernelauth-nbase:1.1 yamt-pdpolicy-base4:1.1 yamt-pdpolicy-base3:1.1 yamt-pdpolicy-base2:1.1 yamt-pdpolicy:1.1.0.42 yamt-pdpolicy-base:1.1 yamt-uio_vmspace-base5:1.1 simonb-timecounters:1.1.0.40 simonb-timecounters-base:1.1 rpaulo-netinet-merge-pcb:1.1.0.38 rpaulo-netinet-merge-pcb-base:1.1 yamt-uio_vmspace:1.1.0.36 yamt-readahead-base3:1.1 yamt-readahead-base2:1.1 yamt-readahead:1.1.0.34 yamt-readahead-base:1.1 yamt-vop-base3:1.1 yamt-vop-base2:1.1 thorpej-vnode-attr:1.1.0.32 thorpej-vnode-attr-base:1.1 yamt-vop:1.1.0.30 yamt-vop-base:1.1 yamt-lazymbuf:1.1.0.28 yamt-km-base4:1.1 yamt-km-base3:1.1 yamt-km-base2:1.1 yamt-km:1.1.0.26 yamt-km-base:1.1 kent-audio2:1.1.0.24 kent-audio2-base:1.1 ktrace-lwp:1.1.0.22 ktrace-lwp-base:1.1 nathanw_sa_before_merge:1.1 gmcgarry_ctxsw:1.1.0.20 gmcgarry_ctxsw_base:1.1 gmcgarry_ucred:1.1.0.18 gmcgarry_ucred_base:1.1 nathanw_sa_base:1.1 gehenna-devsw:1.1.0.16 gehenna-devsw-base:1.1 eeh-devprop:1.1.0.14 eeh-devprop-base:1.1 newlock:1.1.0.12 newlock-base:1.1 ifpoll-base:1.1 thorpej-mips-cache:1.1.0.8 thorpej-mips-cache-base:1.1 thorpej-devvp:1.1.0.6 thorpej-devvp-base:1.1 kqueue:1.1.0.4 kqueue-base:1.1 thorpej_scsipi_beforemerge:1.1 thorpej_scsipi_nbase:1.1 thorpej_scsipi_base:1.1 thorpej_scsipi:1.1.0.2; locks; strict; comment @# @; 1.1 date 2000.11.20.11.40.49; author bouyer; state dead; branches 1.1.2.1; next ; 1.1.2.1 date 2000.11.20.11.40.49; author bouyer; state Exp; branches; next 1.1.2.2; 1.1.2.2 date 2000.11.20.17.59.04; author bouyer; state dead; branches; next ; desc @@ 1.1 log @file ncr53c9xvar.h.orig was initially added on branch thorpej_scsipi. @ text @@ 1.1.2.1 log @Update thorpej_scsipi to -current as of a month ago A i386 GENERIC kernel compiles without the siop, ahc and bha drivers (will be updated later). i386 IDE/ATAPI and ncr work, as well as sparc/esp_sbus. alpha should work as well (untested yet). siop, ahc and bha will be updated once I've updated the branch to current -current, as well as machine-dependant code. @ text @a0 405 /* $NetBSD: ncr53c9xvar.h,v 1.24 2000/06/05 07:59:54 nisimura Exp $ */ /*- * Copyright (c) 1997 The NetBSD Foundation, Inc. * All rights reserved. * * This code is derived from software contributed to The NetBSD Foundation * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, * NASA Ames Research Center. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * 3. All advertising materials mentioning features or use of this software * must display the following acknowledgement: * This product includes software developed by the NetBSD * Foundation, Inc. and its contributors. * 4. Neither the name of The NetBSD Foundation nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. */ /* * Copyright (c) 1994 Peter Galbavy. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * 3. All advertising materials mentioning features or use of this software * must display the following acknowledgement: * This product includes software developed by Peter Galbavy. * 4. The name of the author may not be used to endorse or promote products * derived from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ /* Set this to 1 for normal debug, or 2 for per-target tracing. */ #define NCR53C9X_DEBUG 1 #define NCR_ABORT_TIMEOUT 2000 /* time to wait for abort */ #define NCR_SENSE_TIMEOUT 1000 /* time to wait for sense */ #define FREQTOCCF(freq) (((freq + 4) / 5)) /* * NCR 53c9x variants. Note, these values are used as indexes into * a table; don't modify them unless you know what you're doing. */ #define NCR_VARIANT_ESP100 0 #define NCR_VARIANT_ESP100A 1 #define NCR_VARIANT_ESP200 2 #define NCR_VARIANT_NCR53C94 3 #define NCR_VARIANT_NCR53C96 4 #define NCR_VARIANT_ESP406 5 #define NCR_VARIANT_FAS408 6 #define NCR_VARIANT_FAS216 7 #define NCR_VARIANT_AM53C974 8 #define NCR_VARIANT_MAX 9 /* * ECB. Holds additional information for each SCSI command Comments: We * need a separate scsi command block because we may need to overwrite it * with a request sense command. Basicly, we refrain from fiddling with * the scsipi_xfer struct (except do the expected updating of return values). * We'll generally update: xs->{flags,resid,error,sense,status} and * occasionally xs->retries. */ struct ncr53c9x_ecb { TAILQ_ENTRY(ncr53c9x_ecb) chain; struct scsipi_xfer *xs; /* SCSI xfer ctrl block from above */ int flags; #define ECB_ALLOC 0x01 #define ECB_NEXUS 0x02 #define ECB_SENSE 0x04 #define ECB_ABORT 0x40 #define ECB_RESET 0x80 #define ECB_TENTATIVE_DONE 0x100 int timeout; struct { u_char id; /* Selection Id msg */ struct scsi_generic cmd; /* SCSI command block */ } cmd; int clen; /* Size of command in cmd.cmd */ char *daddr; /* Saved data pointer */ int dleft; /* Residue */ u_char stat; /* SCSI status byte */ u_char pad[3]; #if NCR53C9X_DEBUG > 1 char trace[1000]; #endif }; #if NCR53C9X_DEBUG > 1 #define ECB_TRACE(ecb, msg, a, b) do { \ const char *f = "[" msg "]"; \ int n = strlen((ecb)->trace); \ if (n < (sizeof((ecb)->trace)-100)) \ sprintf((ecb)->trace + n, f, a, b); \ } while(0) #else #define ECB_TRACE(ecb, msg, a, b) #endif /* * Some info about each (possible) target on the SCSI bus. This should * probably have been a "per target+lunit" structure, but we'll leave it at * this for now. Is there a way to reliably hook it up to sc->fordriver?? */ struct ncr53c9x_tinfo { int cmds; /* #commands processed */ int dconns; /* #disconnects */ int touts; /* #timeouts */ int perrs; /* #parity errors */ int senses; /* #request sense commands sent */ ushort lubusy; /* What local units/subr. are busy? */ u_char flags; #define T_NEED_TO_RESET 0x01 /* Should send a BUS_DEV_RESET */ #define T_NEGOTIATE 0x02 /* (Re)Negotiate synchronous options */ #define T_BUSY 0x04 /* Target is busy, i.e. cmd in progress */ #define T_SYNCMODE 0x08 /* sync mode has been negotiated */ #define T_SYNCHOFF 0x10 /* .. */ #define T_RSELECTOFF 0x20 /* .. */ u_char period; /* Period suggestion */ u_char offset; /* Offset suggestion */ u_char pad[3]; }; /* Register a linenumber (for debugging) */ #define LOGLINE(p) #define NCR_SHOWECBS 0x01 #define NCR_SHOWINTS 0x02 #define NCR_SHOWCMDS 0x04 #define NCR_SHOWMISC 0x08 #define NCR_SHOWTRAC 0x10 #define NCR_SHOWSTART 0x20 #define NCR_SHOWPHASE 0x40 #define NCR_SHOWDMA 0x80 #define NCR_SHOWCCMDS 0x100 #define NCR_SHOWMSGS 0x200 #ifdef NCR53C9X_DEBUG extern int ncr53c9x_debug; #define NCR_ECBS(str) \ do {if (ncr53c9x_debug & NCR_SHOWECBS) printf str;} while (0) #define NCR_MISC(str) \ do {if (ncr53c9x_debug & NCR_SHOWMISC) printf str;} while (0) #define NCR_INTS(str) \ do {if (ncr53c9x_debug & NCR_SHOWINTS) printf str;} while (0) #define NCR_TRACE(str) \ do {if (ncr53c9x_debug & NCR_SHOWTRAC) printf str;} while (0) #define NCR_CMDS(str) \ do {if (ncr53c9x_debug & NCR_SHOWCMDS) printf str;} while (0) #define NCR_START(str) \ do {if (ncr53c9x_debug & NCR_SHOWSTART) printf str;}while (0) #define NCR_PHASE(str) \ do {if (ncr53c9x_debug & NCR_SHOWPHASE) printf str;}while (0) #define NCR_DMA(str) \ do {if (ncr53c9x_debug & NCR_SHOWDMA) printf str;}while (0) #define NCR_MSGS(str) \ do {if (ncr53c9x_debug & NCR_SHOWMSGS) printf str;}while (0) #else #define NCR_ECBS(str) #define NCR_MISC(str) #define NCR_INTS(str) #define NCR_TRACE(str) #define NCR_CMDS(str) #define NCR_START(str) #define NCR_PHASE(str) #define NCR_DMA(str) #define NCR_MSGS(str) #endif #define NCR_MAX_MSG_LEN 8 struct ncr53c9x_softc; /* * Function switch used as glue to MD code. */ struct ncr53c9x_glue { /* Mandatory entry points. */ u_char (*gl_read_reg) __P((struct ncr53c9x_softc *, int)); void (*gl_write_reg) __P((struct ncr53c9x_softc *, int, u_char)); int (*gl_dma_isintr) __P((struct ncr53c9x_softc *)); void (*gl_dma_reset) __P((struct ncr53c9x_softc *)); int (*gl_dma_intr) __P((struct ncr53c9x_softc *)); int (*gl_dma_setup) __P((struct ncr53c9x_softc *, caddr_t *, size_t *, int, size_t *)); void (*gl_dma_go) __P((struct ncr53c9x_softc *)); void (*gl_dma_stop) __P((struct ncr53c9x_softc *)); int (*gl_dma_isactive) __P((struct ncr53c9x_softc *)); /* Optional entry points. */ void (*gl_clear_latched_intr) __P((struct ncr53c9x_softc *)); }; struct ncr53c9x_softc { struct device sc_dev; /* us as a device */ struct evcnt sc_intrcnt; /* intr count */ struct scsipi_link sc_link; /* scsipi link struct */ struct device *sc_child; /* attached scsibus, if any */ struct ncr53c9x_glue *sc_glue; /* glue to MD code */ int sc_cfflags; /* Copy of config flags */ /* register defaults */ u_char sc_cfg1; /* Config 1 */ u_char sc_cfg2; /* Config 2, not ESP100 */ u_char sc_cfg3; /* Config 3, only ESP200 */ u_char sc_cfg3_fscsi; /* Chip-specific FSCSI bit */ u_char sc_cfg4; /* Config 3, only ESP200 */ u_char sc_cfg5; /* Config 3, only ESP200 */ u_char sc_ccf; /* Clock Conversion */ u_char sc_timeout; /* register copies, see espreadregs() */ u_char sc_espintr; u_char sc_espstat; u_char sc_espstep; u_char sc_espfflags; /* Lists of command blocks */ TAILQ_HEAD(ecb_list, ncr53c9x_ecb) free_list, ready_list, nexus_list; struct ncr53c9x_ecb *sc_nexus; /* Current command */ struct ncr53c9x_ecb sc_ecb[3*8]; /* Three per target */ struct ncr53c9x_tinfo sc_tinfo[8]; /* Data about the current nexus (updated for every cmd switch) */ caddr_t sc_dp; /* Current data pointer */ ssize_t sc_dleft; /* Data left to transfer */ /* Adapter state */ int sc_phase; /* Copy of what bus phase we are in */ int sc_prevphase; /* Copy of what bus phase we were in */ u_char sc_state; /* State applicable to the adapter */ u_char sc_flags; /* See below */ u_char sc_selid; u_char sc_lastcmd; /* Message stuff */ u_char sc_msgpriq; /* One or more messages to send (encoded) */ u_char sc_msgout; /* What message is on its way out? */ u_char sc_msgoutq; /* What messages have been sent so far? */ u_char *sc_omess; /* MSGOUT buffer */ caddr_t sc_omp; /* Message pointer (for multibyte messages) */ size_t sc_omlen; u_char *sc_imess; /* MSGIN buffer */ caddr_t sc_imp; /* Message pointer (for multibyte messages) */ size_t sc_imlen; caddr_t sc_cmdp; /* Command pointer (for DMAed commands) */ size_t sc_cmdlen; /* Size of command in transit */ /* Hardware attributes */ int sc_freq; /* SCSI bus frequency in MHz */ int sc_id; /* Our SCSI id */ int sc_rev; /* Chip revision */ int sc_features; /* Chip features */ int sc_minsync; /* Minimum sync period / 4 */ int sc_maxxfer; /* Maximum transfer size */ }; /* values for sc_state */ #define NCR_IDLE 1 /* waiting for something to do */ #define NCR_SELECTING 2 /* SCSI command is arbiting */ #define NCR_RESELECTED 3 /* Has been reselected */ #define NCR_CONNECTED 4 /* Actively using the SCSI bus */ #define NCR_DISCONNECT 5 /* MSG_DISCONNECT received */ #define NCR_CMDCOMPLETE 6 /* MSG_CMDCOMPLETE received */ #define NCR_CLEANING 7 #define NCR_SBR 8 /* Expect a SCSI RST because we commanded it */ /* values for sc_flags */ #define NCR_DROP_MSGI 0x01 /* Discard all msgs (parity err detected) */ #define NCR_ABORTING 0x02 /* Bailing out */ #define NCR_DOINGDMA 0x04 /* The FIFO data path is active! */ #define NCR_SYNCHNEGO 0x08 /* Synch negotiation in progress. */ #define NCR_ICCS 0x10 /* Expect status phase results */ #define NCR_WAITI 0x20 /* Waiting for non-DMA data to arrive */ #define NCR_ATN 0x40 /* ATN asserted */ #define NCR_EXPECT_ILLCMD 0x80 /* Expect Illegal Command Interrupt */ /* values for sc_features */ #define NCR_F_HASCFG3 0x01 /* chip has CFG3 register */ #define NCR_F_FASTSCSI 0x02 /* chip supports Fast mode */ /* values for sc_msgout */ #define SEND_DEV_RESET 0x01 #define SEND_PARITY_ERROR 0x02 #define SEND_INIT_DET_ERR 0x04 #define SEND_REJECT 0x08 #define SEND_IDENTIFY 0x10 #define SEND_ABORT 0x20 #define SEND_SDTR 0x40 #define SEND_WDTR 0x80 /* SCSI Status codes */ #define ST_MASK 0x3e /* bit 0,6,7 is reserved */ /* phase bits */ #define IOI 0x01 #define CDI 0x02 #define MSGI 0x04 /* Information transfer phases */ #define DATA_OUT_PHASE (0) #define DATA_IN_PHASE (IOI) #define COMMAND_PHASE (CDI) #define STATUS_PHASE (CDI|IOI) #define MESSAGE_OUT_PHASE (MSGI|CDI) #define MESSAGE_IN_PHASE (MSGI|CDI|IOI) #define PHASE_MASK (MSGI|CDI|IOI) /* Some pseudo phases for getphase()*/ #define BUSFREE_PHASE 0x100 /* Re/Selection no longer valid */ #define INVALID_PHASE 0x101 /* Re/Selection valid, but no REQ yet */ #define PSEUDO_PHASE 0x100 /* "pseudo" bit */ /* * Macros to read and write the chip's registers. */ #define NCR_READ_REG(sc, reg) \ (*(sc)->sc_glue->gl_read_reg)((sc), (reg)) #define NCR_WRITE_REG(sc, reg, val) \ (*(sc)->sc_glue->gl_write_reg)((sc), (reg), (val)) #ifdef NCR53C9X_DEBUG #define NCRCMD(sc, cmd) do { \ if (ncr53c9x_debug & NCR_SHOWCCMDS) \ printf("", (unsigned)cmd); \ sc->sc_lastcmd = cmd; \ NCR_WRITE_REG(sc, NCR_CMD, cmd); \ } while (0) #else #define NCRCMD(sc, cmd) NCR_WRITE_REG(sc, NCR_CMD, cmd) #endif /* * DMA macros for NCR53c9x */ #define NCRDMA_ISINTR(sc) (*(sc)->sc_glue->gl_dma_isintr)((sc)) #define NCRDMA_RESET(sc) (*(sc)->sc_glue->gl_dma_reset)((sc)) #define NCRDMA_INTR(sc) (*(sc)->sc_glue->gl_dma_intr)((sc)) #define NCRDMA_SETUP(sc, addr, len, datain, dmasize) \ (*(sc)->sc_glue->gl_dma_setup)((sc), (addr), (len), (datain), (dmasize)) #define NCRDMA_GO(sc) (*(sc)->sc_glue->gl_dma_go)((sc)) #define NCRDMA_ISACTIVE(sc) (*(sc)->sc_glue->gl_dma_isactive)((sc)) /* * Macro to convert the chip register Clock Per Byte value to * Sunchronous Transfer Period. */ #define ncr53c9x_cpb2stp(sc, cpb) \ ((250 * (cpb)) / (sc)->sc_freq) void ncr53c9x_attach __P((struct ncr53c9x_softc *, struct scsipi_adapter *, struct scsipi_device *)); int ncr53c9x_detach __P((struct ncr53c9x_softc *, int)); int ncr53c9x_scsi_cmd __P((struct scsipi_xfer *)); void ncr53c9x_reset __P((struct ncr53c9x_softc *)); int ncr53c9x_intr __P((void *)); void ncr53c9x_init __P((struct ncr53c9x_softc *, int)); extern int ncr53c9x_dmaselect; @ 1.1.2.2 log @Ops, these shouldn't be there ! @ text @d1 1 a1 1 /* $NetBSD: ncr53c9xvar.h.orig,v 1.1.2.1 2000/11/20 11:40:49 bouyer Exp $ */ @