head 1.1; access; symbols perseant-exfatfs-base-20250801:1.1 perseant-exfatfs-base-20240630:1.1 perseant-exfatfs:1.1.0.140 perseant-exfatfs-base:1.1 bouyer-sunxi-drm:1.1.0.138 bouyer-sunxi-drm-base:1.1 cjep_sun2x:1.1.0.136 cjep_sun2x-base:1.1 cjep_staticlib_x-base1:1.1 cjep_staticlib_x:1.1.0.134 cjep_staticlib_x-base:1.1 thorpej-futex-base:1.1 bouyer-xenpvh-base2:1.1 phil-wifi-20200421:1.1 bouyer-xenpvh-base1:1.1 phil-wifi-20200411:1.1 bouyer-xenpvh:1.1.0.132 bouyer-xenpvh-base:1.1 phil-wifi-20200406:1.1 ad-namecache-base3:1.1 ad-namecache-base2:1.1 ad-namecache-base1:1.1 ad-namecache:1.1.0.130 ad-namecache-base:1.1 isaki-audio2:1.1.0.128 isaki-audio2-base:1.1 pgoyette-compat-merge-20190127:1.1 pgoyette-compat-20190127:1.1 pgoyette-compat-20190118:1.1 pgoyette-compat-1226:1.1 pgoyette-compat-1126:1.1 pgoyette-compat-1020:1.1 pgoyette-compat-0930:1.1 pgoyette-compat-0906:1.1 pgoyette-compat-0728:1.1 pgoyette-compat-0625:1.1 pgoyette-compat-0521:1.1 pgoyette-compat-0502:1.1 pgoyette-compat-0422:1.1 pgoyette-compat-0415:1.1 pgoyette-compat-0407:1.1 pgoyette-compat-0330:1.1 pgoyette-compat-0322:1.1 pgoyette-compat-0315:1.1 pgoyette-compat:1.1.0.10 pgoyette-compat-base:1.1 perseant-stdc-iso10646:1.1.0.126 perseant-stdc-iso10646-base:1.1 prg-localcount2-base3:1.1 prg-localcount2-base2:1.1 prg-localcount2-base1:1.1 prg-localcount2:1.1.0.124 prg-localcount2-base:1.1 pgoyette-localcount-20170426:1.1 bouyer-socketcan-base1:1.1 pgoyette-localcount-20170320:1.1 bouyer-socketcan:1.1.0.122 bouyer-socketcan-base:1.1 pgoyette-localcount-20170107:1.1 pgoyette-localcount-20161104:1.1 localcount-20160914:1.1 pgoyette-localcount-20160806:1.1 pgoyette-localcount-20160726:1.1 pgoyette-localcount:1.1.0.120 pgoyette-localcount-base:1.1 netbsd-5-2-3-RELEASE:1.1 netbsd-5-1-5-RELEASE:1.1 yamt-pagecache-base9:1.1 yamt-pagecache-tag8:1.1 tls-earlyentropy:1.1.0.118 tls-earlyentropy-base:1.1 riastradh-xf86-video-intel-2-7-1-pre-2-21-15:1.1 riastradh-drm2-base3:1.1 netbsd-5-2-2-RELEASE:1.1 netbsd-5-1-4-RELEASE:1.1 netbsd-5-2-1-RELEASE:1.1 netbsd-5-1-3-RELEASE:1.1 rmind-smpnet-nbase:1.1 rmind-smpnet:1.1.0.114 rmind-smpnet-base:1.1 agc-symver:1.1.0.116 agc-symver-base:1.1 tls-maxphys-base:1.1 yamt-pagecache-base8:1.1 netbsd-5-2:1.1.0.112 yamt-pagecache-base7:1.1 netbsd-5-2-RELEASE:1.1 netbsd-5-2-RC1:1.1 yamt-pagecache-base6:1.1 yamt-pagecache-base5:1.1 yamt-pagecache-base4:1.1 netbsd-5-1-2-RELEASE:1.1 netbsd-5-1-1-RELEASE:1.1 jmcneill-usbmp:1.1.0.110 jmcneill-usbmp-base:1.1 jmcneill-audiomp3:1.1.0.108 jmcneill-audiomp3-base:1.1 yamt-pagecache-base3:1.1 yamt-pagecache-base2:1.1 yamt-pagecache:1.1.0.106 yamt-pagecache-base:1.1 rmind-uvmplock-nbase:1.1 bouyer-quota2-nbase:1.1 bouyer-quota2:1.1.0.104 bouyer-quota2-base:1.1 jruoho-x86intr:1.1.0.102 jruoho-x86intr-base:1.1 matt-nb5-pq3:1.1.0.100 matt-nb5-pq3-base:1.1 netbsd-5-1:1.1.0.98 netbsd-5-1-RELEASE:1.1 yamt-nfs-mp-base11:1.1 netbsd-5-1-RC4:1.1 uebayasi-xip-base2:1.1 yamt-nfs-mp-base10:1.1 netbsd-5-1-RC3:1.1 netbsd-5-1-RC2:1.1 netbsd-5-1-RC1:1.1 rmind-uvmplock:1.1.0.96 rmind-uvmplock-base:1.1 yamt-nfs-mp-base9:1.1 uebayasi-xip:1.1.0.94 uebayasi-xip-base:1.1 netbsd-5-0-2-RELEASE:1.1 yamt-nfs-mp-base8:1.1 yamt-nfs-mp-base7:1.1 netbsd-5-0-1-RELEASE:1.1 jymxensuspend-base:1.1 yamt-nfs-mp-base6:1.1 yamt-nfs-mp-base5:1.1 yamt-nfs-mp-base4:1.1 jym-xensuspend-nbase:1.1 yamt-nfs-mp-base3:1.1 netbsd-5-0:1.1.0.92 netbsd-5-0-RELEASE:1.1 netbsd-5-0-RC4:1.1 netbsd-5-0-RC3:1.1 netbsd-5-0-RC2:1.1 jym-xensuspend:1.1.0.90 jym-xensuspend-base:1.1 netbsd-5-0-RC1:1.1 haad-dm-base2:1.1 haad-nbase2:1.1 ad-audiomp2:1.1.0.88 ad-audiomp2-base:1.1 netbsd-5:1.1.0.86 netbsd-5-base:1.1 haad-dm-base1:1.1 haad-dm:1.1.0.84 haad-dm-base:1.1 simonb-wapbl-nbase:1.1 yamt-pf42-base4:1.1 simonb-wapbl:1.1.0.82 simonb-wapbl-base:1.1 yamt-pf42-base3:1.1 hpcarm-cleanup-nbase:1.1 yamt-pf42-base2:1.1 yamt-nfs-mp-base2:1.1 yamt-nfs-mp:1.1.0.80 yamt-nfs-mp-base:1.1 yamt-pf42:1.1.0.78 yamt-pf42-base:1.1 ad-socklock-base1:1.1 yamt-lazymbuf-base15:1.1 yamt-lazymbuf-base14:1.1 keiichi-mipv6-nbase:1.1 mjf-devfs2:1.1.0.76 mjf-devfs2-base:1.1 keiichi-mipv6:1.1.0.74 keiichi-mipv6-base:1.1 bouyer-xeni386-merge1:1.1 vmlocking2-base3:1.1 bouyer-xeni386-nbase:1.1 yamt-kmem-base3:1.1 cube-autoconf:1.1.0.72 cube-autoconf-base:1.1 yamt-kmem-base2:1.1 bouyer-xeni386:1.1.0.70 bouyer-xeni386-base:1.1 yamt-kmem:1.1.0.68 yamt-kmem-base:1.1 vmlocking2-base2:1.1 reinoud-bufcleanup-nbase:1.1 vmlocking2:1.1.0.66 vmlocking2-base1:1.1 jmcneill-base:1.1 mjf-devfs:1.1.0.64 mjf-devfs-base:1.1 bouyer-xenamd64-base2:1.1 vmlocking-nbase:1.1 yamt-x86pmap-base4:1.1 bouyer-xenamd64:1.1.0.62 bouyer-xenamd64-base:1.1 yamt-x86pmap-base3:1.1 yamt-x86pmap-base2:1.1 yamt-x86pmap:1.1.0.60 yamt-x86pmap-base:1.1 jmcneill-pm:1.1.0.58 jmcneill-pm-base:1.1 hpcarm-cleanup:1.1.0.56 hpcarm-cleanup-base:1.1 mjf-ufs-trans-base:1.1 yamt-idlelwp-base8:1.1 reinoud-bufcleanup-base:1.1 vmlocking:1.1.0.54 vmlocking-base:1.1 ad-audiomp:1.1.0.52 ad-audiomp-base:1.1 yamt-idlelwp:1.1.0.50 post-newlock2-merge:1.1 newlock2-nbase:1.1 yamt-splraiseipl-base5:1.1 yamt-splraiseipl-base4:1.1 yamt-splraiseipl-base3:1.1 yamt-splraiseipl-base2:1.1 yamt-splraiseipl:1.1.0.48 yamt-splraiseipl-base:1.1 newlock2:1.1.0.46 newlock2-base:1.1 yamt-pdpolicy-base8:1.1 yamt-pdpolicy-base7:1.1 yamt-pdpolicy-base6:1.1 gdamore-uart:1.1.0.44 gdamore-uart-base:1.1 simonb-timcounters-final:1.1 yamt-pdpolicy-base5:1.1 elad-kernelauth-nbase:1.1 yamt-pdpolicy-base4:1.1 yamt-pdpolicy-base3:1.1 yamt-pdpolicy-base2:1.1 yamt-pdpolicy:1.1.0.42 yamt-pdpolicy-base:1.1 yamt-uio_vmspace-base5:1.1 simonb-timecounters:1.1.0.40 simonb-timecounters-base:1.1 rpaulo-netinet-merge-pcb:1.1.0.38 rpaulo-netinet-merge-pcb-base:1.1 yamt-uio_vmspace:1.1.0.36 yamt-readahead-base3:1.1 yamt-readahead-base2:1.1 yamt-readahead:1.1.0.34 yamt-readahead-base:1.1 yamt-vop-base3:1.1 yamt-vop-base2:1.1 thorpej-vnode-attr:1.1.0.32 thorpej-vnode-attr-base:1.1 yamt-vop:1.1.0.30 yamt-vop-base:1.1 yamt-lazymbuf:1.1.0.28 yamt-km-base4:1.1 yamt-km-base3:1.1 yamt-km-base2:1.1 yamt-km:1.1.0.26 yamt-km-base:1.1 kent-audio2:1.1.0.24 kent-audio2-base:1.1 ktrace-lwp:1.1.0.22 ktrace-lwp-base:1.1 nathanw_sa_before_merge:1.1 gmcgarry_ctxsw:1.1.0.20 gmcgarry_ctxsw_base:1.1 gmcgarry_ucred:1.1.0.18 gmcgarry_ucred_base:1.1 nathanw_sa_base:1.1 gehenna-devsw:1.1.0.16 gehenna-devsw-base:1.1 eeh-devprop:1.1.0.14 eeh-devprop-base:1.1 newlock:1.1.0.12 newlock-base:1.1 ifpoll-base:1.1 thorpej-mips-cache:1.1.0.8 thorpej-mips-cache-base:1.1 thorpej-devvp:1.1.0.6 thorpej-devvp-base:1.1 kqueue:1.1.0.4 kqueue-base:1.1 thorpej_scsipi_beforemerge:1.1 thorpej_scsipi_nbase:1.1 thorpej_scsipi_base:1.1 thorpej_scsipi:1.1.0.2; locks; strict; comment @# @; 1.1 date 2000.11.20.11.40.15; author bouyer; state dead; branches 1.1.2.1; next ; 1.1.2.1 date 2000.11.20.11.40.15; author bouyer; state Exp; branches; next 1.1.2.2; 1.1.2.2 date 2000.11.20.17.58.56; author bouyer; state dead; branches; next ; desc @@ 1.1 log @file aha.c.orig was initially added on branch thorpej_scsipi. @ text @@ 1.1.2.1 log @Update thorpej_scsipi to -current as of a month ago A i386 GENERIC kernel compiles without the siop, ahc and bha drivers (will be updated later). i386 IDE/ATAPI and ncr work, as well as sparc/esp_sbus. alpha should work as well (untested yet). siop, ahc and bha will be updated once I've updated the branch to current -current, as well as machine-dependant code. @ text @a0 1455 /* $NetBSD: aha.c,v 1.28 2000/03/30 12:45:28 augustss Exp $ */ #include "opt_ddb.h" #undef AHADIAG #ifdef DDB #define integrate #else #define integrate static inline #endif /*- * Copyright (c) 1997, 1998 The NetBSD Foundation, Inc. * All rights reserved. * * This code is derived from software contributed to The NetBSD Foundation * by Charles M. Hannum and by Jason R. Thorpe of the Numerical Aerospace * Simulation Facility, NASA Ames Research Center. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * 3. All advertising materials mentioning features or use of this software * must display the following acknowledgement: * This product includes software developed by the NetBSD * Foundation, Inc. and its contributors. * 4. Neither the name of The NetBSD Foundation nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. */ /* * Originally written by Julian Elischer (julian@@tfs.com) * for TRW Financial Systems for use under the MACH(2.5) operating system. * * TRW Financial Systems, in accordance with their agreement with Carnegie * Mellon University, makes this software available to CMU to distribute * or use in any manner that they see fit as long as this message is kept with * the software. For this reason TFS also grants any other persons or * organisations permission to use or modify this software. * * TFS supplies this software to be publicly redistributed * on the understanding that TFS is not responsible for the correct * functioning of this software in any circumstances. */ #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #ifndef DDB #define Debugger() panic("should call debugger here (aha1542.c)") #endif /* ! DDB */ #define AHA_MAXXFER ((AHA_NSEG - 1) << PGSHIFT) #ifdef AHADEBUG int aha_debug = 1; #endif /* AHADEBUG */ int aha_cmd __P((bus_space_tag_t, bus_space_handle_t, struct aha_softc *, int, u_char *, int, u_char *)); integrate void aha_finish_ccbs __P((struct aha_softc *)); integrate void aha_reset_ccb __P((struct aha_softc *, struct aha_ccb *)); void aha_free_ccb __P((struct aha_softc *, struct aha_ccb *)); integrate int aha_init_ccb __P((struct aha_softc *, struct aha_ccb *)); struct aha_ccb *aha_get_ccb __P((struct aha_softc *, int)); struct aha_ccb *aha_ccb_phys_kv __P((struct aha_softc *, u_long)); void aha_queue_ccb __P((struct aha_softc *, struct aha_ccb *)); void aha_collect_mbo __P((struct aha_softc *)); void aha_start_ccbs __P((struct aha_softc *)); void aha_done __P((struct aha_softc *, struct aha_ccb *)); int aha_init __P((struct aha_softc *)); void aha_inquire_setup_information __P((struct aha_softc *)); void ahaminphys __P((struct buf *)); int aha_scsi_cmd __P((struct scsipi_xfer *)); int aha_poll __P((struct aha_softc *, struct scsipi_xfer *, int)); void aha_timeout __P((void *arg)); int aha_create_ccbs __P((struct aha_softc *, struct aha_ccb *, int)); /* the below structure is so we have a default dev struct for out link struct */ struct scsipi_device aha_dev = { NULL, /* Use default error handler */ NULL, /* have a queue, served by this */ NULL, /* have no async handler */ NULL, /* Use default 'done' routine */ }; #define AHA_RESET_TIMEOUT 2000 /* time to wait for reset (mSec) */ #define AHA_ABORT_TIMEOUT 2000 /* time to wait for abort (mSec) */ /* * aha_cmd(iot, ioh, sc, icnt, ibuf, ocnt, obuf) * * Activate Adapter command * icnt: number of args (outbound bytes including opcode) * ibuf: argument buffer * ocnt: number of expected returned bytes * obuf: result buffer * wait: number of seconds to wait for response * * Performs an adapter command through the ports. Not to be confused with a * scsi command, which is read in via the dma; one of the adapter commands * tells it to read in a scsi command. */ int aha_cmd(iot, ioh, sc, icnt, ibuf, ocnt, obuf) bus_space_tag_t iot; bus_space_handle_t ioh; struct aha_softc *sc; int icnt, ocnt; u_char *ibuf, *obuf; { const char *name; int i; int wait; u_char sts; u_char opcode = ibuf[0]; if (sc != NULL) name = sc->sc_dev.dv_xname; else name = "(aha probe)"; /* * Calculate a reasonable timeout for the command. */ switch (opcode) { case AHA_INQUIRE_DEVICES: wait = 90 * 20000; break; default: wait = 1 * 20000; break; } /* * Wait for the adapter to go idle, unless it's one of * the commands which don't need this */ if (opcode != AHA_MBO_INTR_EN) { for (i = 20000; i; i--) { /* 1 sec? */ sts = bus_space_read_1(iot, ioh, AHA_STAT_PORT); if (sts & AHA_STAT_IDLE) break; delay(50); } if (!i) { printf("%s: aha_cmd, host not idle(0x%x)\n", name, sts); return (1); } } /* * Now that it is idle, if we expect output, preflush the * queue feeding to us. */ if (ocnt) { while ((bus_space_read_1(iot, ioh, AHA_STAT_PORT)) & AHA_STAT_DF) bus_space_read_1(iot, ioh, AHA_DATA_PORT); } /* * Output the command and the number of arguments given * for each byte, first check the port is empty. */ while (icnt--) { for (i = wait; i; i--) { sts = bus_space_read_1(iot, ioh, AHA_STAT_PORT); if (!(sts & AHA_STAT_CDF)) break; delay(50); } if (!i) { if (opcode != AHA_INQUIRE_REVISION) printf("%s: aha_cmd, cmd/data port full\n", name); bus_space_write_1(iot, ioh, AHA_CTRL_PORT, AHA_CTRL_SRST); return (1); } bus_space_write_1(iot, ioh, AHA_CMD_PORT, *ibuf++); } /* * If we expect input, loop that many times, each time, * looking for the data register to have valid data */ while (ocnt--) { for (i = wait; i; i--) { sts = bus_space_read_1(iot, ioh, AHA_STAT_PORT); if (sts & AHA_STAT_DF) break; delay(50); } if (!i) { if (opcode != AHA_INQUIRE_REVISION) printf("%s: aha_cmd, cmd/data port empty %d\n", name, ocnt); bus_space_write_1(iot, ioh, AHA_CTRL_PORT, AHA_CTRL_SRST); return (1); } *obuf++ = bus_space_read_1(iot, ioh, AHA_DATA_PORT); } /* * Wait for the board to report a finished instruction. * We may get an extra interrupt for the HACC signal, but this is * unimportant. */ if (opcode != AHA_MBO_INTR_EN) { for (i = 20000; i; i--) { /* 1 sec? */ sts = bus_space_read_1(iot, ioh, AHA_INTR_PORT); /* XXX Need to save this in the interrupt handler? */ if (sts & AHA_INTR_HACC) break; delay(50); } if (!i) { printf("%s: aha_cmd, host not finished(0x%x)\n", name, sts); return (1); } } bus_space_write_1(iot, ioh, AHA_CTRL_PORT, AHA_CTRL_IRST); return (0); } void aha_attach(sc, apd) struct aha_softc *sc; struct aha_probe_data *apd; { TAILQ_INIT(&sc->sc_free_ccb); TAILQ_INIT(&sc->sc_waiting_ccb); TAILQ_INIT(&sc->sc_queue); /* * Fill in the adapter. */ sc->sc_adapter.scsipi_cmd = aha_scsi_cmd; sc->sc_adapter.scsipi_minphys = ahaminphys; /* * fill in the prototype scsipi_link. */ sc->sc_link.scsipi_scsi.channel = SCSI_CHANNEL_ONLY_ONE; sc->sc_link.adapter_softc = sc; sc->sc_link.scsipi_scsi.adapter_target = apd->sc_scsi_dev; sc->sc_link.adapter = &sc->sc_adapter; sc->sc_link.device = &aha_dev; sc->sc_link.openings = 2; sc->sc_link.scsipi_scsi.max_target = 7; sc->sc_link.scsipi_scsi.max_lun = 7; sc->sc_link.type = BUS_SCSI; aha_inquire_setup_information(sc); if (aha_init(sc) != 0) { /* Error during initialization! */ return; } /* * ask the adapter what subunits are present */ config_found(&sc->sc_dev, &sc->sc_link, scsiprint); } integrate void aha_finish_ccbs(sc) struct aha_softc *sc; { struct aha_mbx_in *wmbi; struct aha_ccb *ccb; int i; wmbi = wmbx->tmbi; bus_dmamap_sync(sc->sc_dmat, sc->sc_dmamap_control, AHA_MBI_OFF(wmbi), sizeof(struct aha_mbx_in), BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE); if (wmbi->stat == AHA_MBI_FREE) { for (i = 0; i < AHA_MBX_SIZE; i++) { if (wmbi->stat != AHA_MBI_FREE) { printf("%s: mbi not in round-robin order\n", sc->sc_dev.dv_xname); goto AGAIN; } aha_nextmbx(wmbi, wmbx, mbi); bus_dmamap_sync(sc->sc_dmat, sc->sc_dmamap_control, AHA_MBI_OFF(wmbi), sizeof(struct aha_mbx_in), BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE); } #ifdef AHADIAGnot printf("%s: mbi interrupt with no full mailboxes\n", sc->sc_dev.dv_xname); #endif return; } AGAIN: do { ccb = aha_ccb_phys_kv(sc, phystol(wmbi->ccb_addr)); if (!ccb) { printf("%s: bad mbi ccb pointer; skipping\n", sc->sc_dev.dv_xname); goto next; } bus_dmamap_sync(sc->sc_dmat, sc->sc_dmamap_control, AHA_CCB_OFF(ccb), sizeof(struct aha_ccb), BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE); #ifdef AHADEBUG if (aha_debug) { u_char *cp = &ccb->scsi_cmd; printf("op=%x %x %x %x %x %x\n", cp[0], cp[1], cp[2], cp[3], cp[4], cp[5]); printf("stat %x for mbi addr = 0x%08x, ", wmbi->stat, wmbi); printf("ccb addr = 0x%x\n", ccb); } #endif /* AHADEBUG */ switch (wmbi->stat) { case AHA_MBI_OK: case AHA_MBI_ERROR: if ((ccb->flags & CCB_ABORT) != 0) { /* * If we already started an abort, wait for it * to complete before clearing the CCB. We * could instead just clear CCB_SENDING, but * what if the mailbox was already received? * The worst that happens here is that we clear * the CCB a bit later than we need to. BFD. */ goto next; } break; case AHA_MBI_ABORT: case AHA_MBI_UNKNOWN: /* * Even if the CCB wasn't found, we clear it anyway. * See preceeding comment. */ break; default: printf("%s: bad mbi status %02x; skipping\n", sc->sc_dev.dv_xname, wmbi->stat); goto next; } callout_stop(&ccb->xs->xs_callout); aha_done(sc, ccb); next: wmbi->stat = AHA_MBI_FREE; bus_dmamap_sync(sc->sc_dmat, sc->sc_dmamap_control, AHA_MBI_OFF(wmbi), sizeof(struct aha_mbx_in), BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); aha_nextmbx(wmbi, wmbx, mbi); bus_dmamap_sync(sc->sc_dmat, sc->sc_dmamap_control, AHA_MBI_OFF(wmbi), sizeof(struct aha_mbx_in), BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE); } while (wmbi->stat != AHA_MBI_FREE); wmbx->tmbi = wmbi; } /* * Catch an interrupt from the adaptor */ int aha_intr(arg) void *arg; { struct aha_softc *sc = arg; bus_space_tag_t iot = sc->sc_iot; bus_space_handle_t ioh = sc->sc_ioh; u_char sts; #ifdef AHADEBUG printf("%s: aha_intr ", sc->sc_dev.dv_xname); #endif /*AHADEBUG */ /* * First acknowlege the interrupt, Then if it's not telling about * a completed operation just return. */ sts = bus_space_read_1(iot, ioh, AHA_INTR_PORT); if ((sts & AHA_INTR_ANYINTR) == 0) return (0); bus_space_write_1(iot, ioh, AHA_CTRL_PORT, AHA_CTRL_IRST); #ifdef AHADIAG /* Make sure we clear CCB_SENDING before finishing a CCB. */ aha_collect_mbo(sc); #endif /* Mail box out empty? */ if (sts & AHA_INTR_MBOA) { struct aha_toggle toggle; toggle.cmd.opcode = AHA_MBO_INTR_EN; toggle.cmd.enable = 0; aha_cmd(iot, ioh, sc, sizeof(toggle.cmd), (u_char *)&toggle.cmd, 0, (u_char *)0); aha_start_ccbs(sc); } /* Mail box in full? */ if (sts & AHA_INTR_MBIF) aha_finish_ccbs(sc); return (1); } integrate void aha_reset_ccb(sc, ccb) struct aha_softc *sc; struct aha_ccb *ccb; { ccb->flags = 0; } /* * A ccb is put onto the free list. */ void aha_free_ccb(sc, ccb) struct aha_softc *sc; struct aha_ccb *ccb; { int s; s = splbio(); aha_reset_ccb(sc, ccb); TAILQ_INSERT_HEAD(&sc->sc_free_ccb, ccb, chain); /* * If there were none, wake anybody waiting for one to come free, * starting with queued entries. */ if (ccb->chain.tqe_next == 0) wakeup(&sc->sc_free_ccb); splx(s); } integrate int aha_init_ccb(sc, ccb) struct aha_softc *sc; struct aha_ccb *ccb; { bus_dma_tag_t dmat = sc->sc_dmat; int hashnum, error; /* * Create the DMA map for this CCB. */ error = bus_dmamap_create(dmat, AHA_MAXXFER, AHA_NSEG, AHA_MAXXFER, 0, BUS_DMA_NOWAIT|BUS_DMA_ALLOCNOW, &ccb->dmamap_xfer); if (error) { printf("%s: unable to create ccb DMA map, error = %d\n", sc->sc_dev.dv_xname, error); return (error); } /* * put in the phystokv hash table * Never gets taken out. */ ccb->hashkey = sc->sc_dmamap_control->dm_segs[0].ds_addr + AHA_CCB_OFF(ccb); hashnum = CCB_HASH(ccb->hashkey); ccb->nexthash = sc->sc_ccbhash[hashnum]; sc->sc_ccbhash[hashnum] = ccb; aha_reset_ccb(sc, ccb); return (0); } /* * Create a set of ccbs and add them to the free list. Called once * by aha_init(). We return the number of CCBs successfully created. */ int aha_create_ccbs(sc, ccbstore, count) struct aha_softc *sc; struct aha_ccb *ccbstore; int count; { struct aha_ccb *ccb; int i, error; bzero(ccbstore, sizeof(struct aha_ccb) * count); for (i = 0; i < count; i++) { ccb = &ccbstore[i]; if ((error = aha_init_ccb(sc, ccb)) != 0) { printf("%s: unable to initialize ccb, error = %d\n", sc->sc_dev.dv_xname, error); goto out; } TAILQ_INSERT_TAIL(&sc->sc_free_ccb, ccb, chain); } out: return (i); } /* * Get a free ccb * * If there are none, see if we can allocate a new one. If so, put it in * the hash table too otherwise either return an error or sleep. */ struct aha_ccb * aha_get_ccb(sc, flags) struct aha_softc *sc; int flags; { struct aha_ccb *ccb; int s; s = splbio(); /* * If we can and have to, sleep waiting for one to come free * but only if we can't allocate a new one. */ for (;;) { ccb = sc->sc_free_ccb.tqh_first; if (ccb) { TAILQ_REMOVE(&sc->sc_free_ccb, ccb, chain); break; } if ((flags & XS_CTL_NOSLEEP) != 0) goto out; tsleep(&sc->sc_free_ccb, PRIBIO, "ahaccb", 0); } ccb->flags |= CCB_ALLOC; out: splx(s); return (ccb); } /* * Given a physical address, find the ccb that it corresponds to. */ struct aha_ccb * aha_ccb_phys_kv(sc, ccb_phys) struct aha_softc *sc; u_long ccb_phys; { int hashnum = CCB_HASH(ccb_phys); struct aha_ccb *ccb = sc->sc_ccbhash[hashnum]; while (ccb) { if (ccb->hashkey == ccb_phys) break; ccb = ccb->nexthash; } return (ccb); } /* * Queue a CCB to be sent to the controller, and send it if possible. */ void aha_queue_ccb(sc, ccb) struct aha_softc *sc; struct aha_ccb *ccb; { TAILQ_INSERT_TAIL(&sc->sc_waiting_ccb, ccb, chain); aha_start_ccbs(sc); } /* * Garbage collect mailboxes that are no longer in use. */ void aha_collect_mbo(sc) struct aha_softc *sc; { struct aha_mbx_out *wmbo; /* Mail Box Out pointer */ #ifdef AHADIAG struct aha_ccb *ccb; #endif wmbo = wmbx->cmbo; while (sc->sc_mbofull > 0) { bus_dmamap_sync(sc->sc_dmat, sc->sc_dmamap_control, AHA_MBO_OFF(wmbo), sizeof(struct aha_mbx_out), BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE); if (wmbo->cmd != AHA_MBO_FREE) break; #ifdef AHADIAG ccb = aha_ccb_phys_kv(sc, phystol(wmbo->ccb_addr)); ccb->flags &= ~CCB_SENDING; #endif --sc->sc_mbofull; aha_nextmbx(wmbo, wmbx, mbo); } wmbx->cmbo = wmbo; } /* * Send as many CCBs as we have empty mailboxes for. */ void aha_start_ccbs(sc) struct aha_softc *sc; { bus_space_tag_t iot = sc->sc_iot; bus_space_handle_t ioh = sc->sc_ioh; struct aha_mbx_out *wmbo; /* Mail Box Out pointer */ struct aha_ccb *ccb; wmbo = wmbx->tmbo; while ((ccb = sc->sc_waiting_ccb.tqh_first) != NULL) { if (sc->sc_mbofull >= AHA_MBX_SIZE) { aha_collect_mbo(sc); if (sc->sc_mbofull >= AHA_MBX_SIZE) { struct aha_toggle toggle; toggle.cmd.opcode = AHA_MBO_INTR_EN; toggle.cmd.enable = 1; aha_cmd(iot, ioh, sc, sizeof(toggle.cmd), (u_char *)&toggle.cmd, 0, (u_char *)0); break; } } TAILQ_REMOVE(&sc->sc_waiting_ccb, ccb, chain); #ifdef AHADIAG ccb->flags |= CCB_SENDING; #endif /* Link ccb to mbo. */ ltophys(sc->sc_dmamap_control->dm_segs[0].ds_addr + AHA_CCB_OFF(ccb), wmbo->ccb_addr); if (ccb->flags & CCB_ABORT) wmbo->cmd = AHA_MBO_ABORT; else wmbo->cmd = AHA_MBO_START; bus_dmamap_sync(sc->sc_dmat, sc->sc_dmamap_control, AHA_MBO_OFF(wmbo), sizeof(struct aha_mbx_out), BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); /* Tell the card to poll immediately. */ bus_space_write_1(iot, ioh, AHA_CMD_PORT, AHA_START_SCSI); if ((ccb->xs->xs_control & XS_CTL_POLL) == 0) callout_reset(&ccb->xs->xs_callout, (ccb->timeout * hz) / 1000, aha_timeout, ccb); ++sc->sc_mbofull; aha_nextmbx(wmbo, wmbx, mbo); } wmbx->tmbo = wmbo; } /* * We have a ccb which has been processed by the * adaptor, now we look to see how the operation * went. Wake up the owner if waiting */ void aha_done(sc, ccb) struct aha_softc *sc; struct aha_ccb *ccb; { bus_dma_tag_t dmat = sc->sc_dmat; struct scsipi_sense_data *s1, *s2; struct scsipi_xfer *xs = ccb->xs; SC_DEBUG(xs->sc_link, SDEV_DB2, ("aha_done\n")); /* * If we were a data transfer, unload the map that described * the data buffer. */ if (xs->datalen) { bus_dmamap_sync(dmat, ccb->dmamap_xfer, 0, ccb->dmamap_xfer->dm_mapsize, (xs->xs_control & XS_CTL_DATA_IN) ? BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE); bus_dmamap_unload(dmat, ccb->dmamap_xfer); } /* * Otherwise, put the results of the operation * into the xfer and call whoever started it */ #ifdef AHADIAG if (ccb->flags & CCB_SENDING) { printf("%s: exiting ccb still in transit!\n", sc->sc_dev.dv_xname); Debugger(); return; } #endif if ((ccb->flags & CCB_ALLOC) == 0) { printf("%s: exiting ccb not allocated!\n", sc->sc_dev.dv_xname); Debugger(); return; } if (xs->error == XS_NOERROR) { if (ccb->host_stat != AHA_OK) { switch (ccb->host_stat) { case AHA_SEL_TIMEOUT: /* No response */ xs->error = XS_SELTIMEOUT; break; default: /* Other scsi protocol messes */ printf("%s: host_stat %x\n", sc->sc_dev.dv_xname, ccb->host_stat); xs->error = XS_DRIVER_STUFFUP; break; } } else if (ccb->target_stat != SCSI_OK) { switch (ccb->target_stat) { case SCSI_CHECK: s1 = (struct scsipi_sense_data *) (((char *) (&ccb->scsi_cmd)) + ccb->scsi_cmd_length); s2 = &xs->sense.scsi_sense; *s2 = *s1; xs->error = XS_SENSE; break; case SCSI_BUSY: xs->error = XS_BUSY; break; default: printf("%s: target_stat %x\n", sc->sc_dev.dv_xname, ccb->target_stat); xs->error = XS_DRIVER_STUFFUP; break; } } else xs->resid = 0; } aha_free_ccb(sc, ccb); xs->xs_status |= XS_STS_DONE; scsipi_done(xs); /* * If there are queue entries in the software queue, try to * run the first one. We should be more or less guaranteed * to succeed, since we just freed a CCB. * * NOTE: aha_scsi_cmd() relies on our calling it with * the first entry in the queue. */ if ((xs = TAILQ_FIRST(&sc->sc_queue)) != NULL) (void) aha_scsi_cmd(xs); } /* * Find the board and find its irq/drq */ int aha_find(iot, ioh, sc) bus_space_tag_t iot; bus_space_handle_t ioh; struct aha_probe_data *sc; { int i; u_char sts; struct aha_config config; int irq, drq; /* * reset board, If it doesn't respond, assume * that it's not there.. good for the probe */ bus_space_write_1(iot, ioh, AHA_CTRL_PORT, AHA_CTRL_HRST | AHA_CTRL_SRST); delay(100); for (i = AHA_RESET_TIMEOUT; i; i--) { sts = bus_space_read_1(iot, ioh, AHA_STAT_PORT); if (sts == (AHA_STAT_IDLE | AHA_STAT_INIT)) break; delay(1000); /* calibrated in msec */ } if (!i) { #ifdef AHADEBUG if (aha_debug) printf("aha_find: No answer from adaptec board\n"); #endif /* AHADEBUG */ return (0); } /* * setup dma channel from jumpers and save int * level */ delay(1000); /* for Bustek 545 */ config.cmd.opcode = AHA_INQUIRE_CONFIG; aha_cmd(iot, ioh, (struct aha_softc *)0, sizeof(config.cmd), (u_char *)&config.cmd, sizeof(config.reply), (u_char *)&config.reply); switch (config.reply.chan) { case EISADMA: drq = -1; break; case CHAN0: drq = 0; break; case CHAN5: drq = 5; break; case CHAN6: drq = 6; break; case CHAN7: drq = 7; break; default: printf("aha_find: illegal drq setting %x\n", config.reply.chan); return (0); } switch (config.reply.intr) { case INT9: irq = 9; break; case INT10: irq = 10; break; case INT11: irq = 11; break; case INT12: irq = 12; break; case INT14: irq = 14; break; case INT15: irq = 15; break; default: printf("aha_find: illegal irq setting %x\n", config.reply.intr); return (0); } if (sc) { sc->sc_irq = irq; sc->sc_drq = drq; sc->sc_scsi_dev = config.reply.scsi_dev; } return (1); } /* * Start the board, ready for normal operation */ int aha_init(sc) struct aha_softc *sc; { bus_space_tag_t iot = sc->sc_iot; bus_space_handle_t ioh = sc->sc_ioh; bus_dma_segment_t seg; struct aha_devices devices; struct aha_setup setup; struct aha_mailbox mailbox; int error, i, j, initial_ccbs, rseg; /* * XXX * If we are a 1542C or later, disable the extended BIOS so that the * mailbox interface is unlocked. * No need to check the extended BIOS flags as some of the * extensions that cause us problems are not flagged in that byte. */ if (!strncmp(sc->sc_model, "1542C", 5)) { struct aha_extbios extbios; struct aha_unlock unlock; printf("%s: unlocking mailbox interface\n", sc->sc_dev.dv_xname); extbios.cmd.opcode = AHA_EXT_BIOS; aha_cmd(iot, ioh, sc, sizeof(extbios.cmd), (u_char *)&extbios.cmd, sizeof(extbios.reply), (u_char *)&extbios.reply); #ifdef AHADEBUG printf("%s: flags=%02x, mailboxlock=%02x\n", sc->sc_dev.dv_xname, extbios.reply.flags, extbios.reply.mailboxlock); #endif /* AHADEBUG */ unlock.cmd.opcode = AHA_MBX_ENABLE; unlock.cmd.junk = 0; unlock.cmd.magic = extbios.reply.mailboxlock; aha_cmd(iot, ioh, sc, sizeof(unlock.cmd), (u_char *)&unlock.cmd, 0, (u_char *)0); } #if 0 /* * Change the bus on/off times to not clash with other dma users. */ aha_cmd(iot, ioh, 1, 0, 0, 0, AHA_BUS_ON_TIME_SET, 7); aha_cmd(iot, ioh, 1, 0, 0, 0, AHA_BUS_OFF_TIME_SET, 4); #endif /* Inquire Installed Devices (to force synchronous negotiation). */ devices.cmd.opcode = AHA_INQUIRE_DEVICES; aha_cmd(iot, ioh, sc, sizeof(devices.cmd), (u_char *)&devices.cmd, sizeof(devices.reply), (u_char *)&devices.reply); /* Count installed units */ initial_ccbs = 0; for (i = 0; i < 8; i++) { for (j = 0; j < 8; j++) { if (((devices.reply.lun_map[i] >> j) & 1) == 1) initial_ccbs += 1; } } initial_ccbs *= sc->sc_link.openings; if (initial_ccbs > AHA_CCB_MAX) initial_ccbs = AHA_CCB_MAX; if (initial_ccbs == 0) /* yes, this can happen */ initial_ccbs = sc->sc_link.openings; /* Obtain setup information from. */ setup.cmd.opcode = AHA_INQUIRE_SETUP; setup.cmd.len = sizeof(setup.reply); aha_cmd(iot, ioh, sc, sizeof(setup.cmd), (u_char *)&setup.cmd, sizeof(setup.reply), (u_char *)&setup.reply); printf("%s: %s, %s\n", sc->sc_dev.dv_xname, setup.reply.sync_neg ? "sync" : "async", setup.reply.parity ? "parity" : "no parity"); for (i = 0; i < 8; i++) { if (!setup.reply.sync[i].valid || (!setup.reply.sync[i].offset && !setup.reply.sync[i].period)) continue; printf("%s targ %d: sync, offset %d, period %dnsec\n", sc->sc_dev.dv_xname, i, setup.reply.sync[i].offset, setup.reply.sync[i].period * 50 + 200); } /* * Allocate the mailbox and control blocks. */ if ((error = bus_dmamem_alloc(sc->sc_dmat, sizeof(struct aha_control), NBPG, 0, &seg, 1, &rseg, BUS_DMA_NOWAIT)) != 0) { printf("%s: unable to allocate control structures, " "error = %d\n", sc->sc_dev.dv_xname, error); return (error); } if ((error = bus_dmamem_map(sc->sc_dmat, &seg, rseg, sizeof(struct aha_control), (caddr_t *)&sc->sc_control, BUS_DMA_NOWAIT|BUS_DMA_COHERENT)) != 0) { printf("%s: unable to map control structures, error = %d\n", sc->sc_dev.dv_xname, error); return (error); } /* * Create and load the DMA map used for the mailbox and * control blocks. */ if ((error = bus_dmamap_create(sc->sc_dmat, sizeof(struct aha_control), 1, sizeof(struct aha_control), 0, BUS_DMA_NOWAIT, &sc->sc_dmamap_control)) != 0) { printf("%s: unable to create control DMA map, error = %d\n", sc->sc_dev.dv_xname, error); return (error); } if ((error = bus_dmamap_load(sc->sc_dmat, sc->sc_dmamap_control, sc->sc_control, sizeof(struct aha_control), NULL, BUS_DMA_NOWAIT)) != 0) { printf("%s: unable to load control DMA map, error = %d\n", sc->sc_dev.dv_xname, error); return (error); } /* * Initialize the control blocks. */ i = aha_create_ccbs(sc, sc->sc_control->ac_ccbs, initial_ccbs); if (i == 0) { printf("%s: unable to create control blocks\n", sc->sc_dev.dv_xname); return (ENOMEM); } else if (i != initial_ccbs) { printf("%s: WARNING: only %d of %d control blocks created\n", sc->sc_dev.dv_xname, i, initial_ccbs); } /* * Set up initial mail box for round-robin operation. */ for (i = 0; i < AHA_MBX_SIZE; i++) { wmbx->mbo[i].cmd = AHA_MBO_FREE; bus_dmamap_sync(sc->sc_dmat, sc->sc_dmamap_control, AHA_MBO_OFF(&wmbx->mbo[i]), sizeof(struct aha_mbx_out), BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); wmbx->mbi[i].stat = AHA_MBI_FREE; bus_dmamap_sync(sc->sc_dmat, sc->sc_dmamap_control, AHA_MBI_OFF(&wmbx->mbi[i]), sizeof(struct aha_mbx_in), BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); } wmbx->cmbo = wmbx->tmbo = &wmbx->mbo[0]; wmbx->tmbi = &wmbx->mbi[0]; sc->sc_mbofull = 0; /* Initialize mail box. */ mailbox.cmd.opcode = AHA_MBX_INIT; mailbox.cmd.nmbx = AHA_MBX_SIZE; ltophys(sc->sc_dmamap_control->dm_segs[0].ds_addr + offsetof(struct aha_control, ac_mbx), mailbox.cmd.addr); aha_cmd(iot, ioh, sc, sizeof(mailbox.cmd), (u_char *)&mailbox.cmd, 0, (u_char *)0); return (0); } void aha_inquire_setup_information(sc) struct aha_softc *sc; { bus_space_tag_t iot = sc->sc_iot; bus_space_handle_t ioh = sc->sc_ioh; struct aha_revision revision; u_char sts; int i; char *p; strcpy(sc->sc_model, "unknown"); /* * Assume we have a board at this stage, do an adapter inquire * to find out what type of controller it is. If the command * fails, we assume it's either a crusty board or an old 1542 * clone, and skip the board-specific stuff. */ revision.cmd.opcode = AHA_INQUIRE_REVISION; if (aha_cmd(iot, ioh, sc, sizeof(revision.cmd), (u_char *)&revision.cmd, sizeof(revision.reply), (u_char *)&revision.reply)) { /* * aha_cmd() already started the reset. It's not clear we * even need to bother here. */ for (i = AHA_RESET_TIMEOUT; i; i--) { sts = bus_space_read_1(iot, ioh, AHA_STAT_PORT); if (sts == (AHA_STAT_IDLE | AHA_STAT_INIT)) break; delay(1000); } if (!i) { #ifdef AHADEBUG printf("aha_init: soft reset failed\n"); #endif /* AHADEBUG */ return; } #ifdef AHADEBUG printf("aha_init: inquire command failed\n"); #endif /* AHADEBUG */ goto noinquire; } #ifdef AHADEBUG printf("%s: inquire %x, %x, %x, %x\n", sc->sc_dev.dv_xname, revision.reply.boardid, revision.reply.spec_opts, revision.reply.revision_1, revision.reply.revision_2); #endif /* AHADEBUG */ switch (revision.reply.boardid) { case BOARD_1540_16HEAD_BIOS: case BOARD_1540_64HEAD_BIOS: case BOARD_1540: strcpy(sc->sc_model, "1540"); break; case BOARD_1542: strcpy(sc->sc_model, "1540A/1542A/1542B"); break; case BOARD_1640: strcpy(sc->sc_model, "1640"); break; case BOARD_1740: strcpy(sc->sc_model, "1740"); break; case BOARD_1542C: strcpy(sc->sc_model, "1542C"); break; case BOARD_1542CF: strcpy(sc->sc_model, "1542CF"); break; case BOARD_1542CP: strcpy(sc->sc_model, "1542CP"); break; } p = sc->sc_firmware; *p++ = revision.reply.revision_1; *p++ = '.'; *p++ = revision.reply.revision_2; *p = '\0'; noinquire: printf("%s: model AHA-%s, firmware %s\n", sc->sc_dev.dv_xname, sc->sc_model, sc->sc_firmware); } void ahaminphys(bp) struct buf *bp; { if (bp->b_bcount > AHA_MAXXFER) bp->b_bcount = AHA_MAXXFER; minphys(bp); } /* * start a scsi operation given the command and the data address. Also needs * the unit, target and lu. */ int aha_scsi_cmd(xs) struct scsipi_xfer *xs; { struct scsipi_link *sc_link = xs->sc_link; struct aha_softc *sc = sc_link->adapter_softc; bus_dma_tag_t dmat = sc->sc_dmat; struct aha_ccb *ccb; int error, seg, flags, s; int fromqueue = 0, dontqueue = 0, nowait = 0; SC_DEBUG(sc_link, SDEV_DB2, ("aha_scsi_cmd\n")); s = splbio(); /* protect the queue */ /* * If we're running the queue from aha_done(), we've been * called with the first queue entry as our argument. */ if (xs == TAILQ_FIRST(&sc->sc_queue)) { TAILQ_REMOVE(&sc->sc_queue, xs, adapter_q); fromqueue = 1; nowait = 1; goto get_ccb; } /* Polled requests can't be queued for later. */ dontqueue = xs->xs_control & XS_CTL_POLL; /* * If there are jobs in the queue, run them first. */ if (TAILQ_FIRST(&sc->sc_queue) != NULL) { /* * If we can't queue, we have to abort, since * we have to preserve order. */ if (dontqueue) { splx(s); xs->error = XS_DRIVER_STUFFUP; return (TRY_AGAIN_LATER); } /* * Swap with the first queue entry. */ TAILQ_INSERT_TAIL(&sc->sc_queue, xs, adapter_q); xs = TAILQ_FIRST(&sc->sc_queue); TAILQ_REMOVE(&sc->sc_queue, xs, adapter_q); fromqueue = 1; } get_ccb: /* * get a ccb to use. If the transfer * is from a buf (possibly from interrupt time) * then we can't allow it to sleep */ flags = xs->xs_control; if (nowait) flags |= XS_CTL_NOSLEEP; if ((ccb = aha_get_ccb(sc, flags)) == NULL) { /* * If we can't queue, we lose. */ if (dontqueue) { splx(s); xs->error = XS_DRIVER_STUFFUP; return (TRY_AGAIN_LATER); } /* * Stuff ourselves into the queue, in front * if we came off in the first place. */ if (fromqueue) TAILQ_INSERT_HEAD(&sc->sc_queue, xs, adapter_q); else TAILQ_INSERT_TAIL(&sc->sc_queue, xs, adapter_q); splx(s); return (SUCCESSFULLY_QUEUED); } splx(s); /* done playing with the queue */ ccb->xs = xs; ccb->timeout = xs->timeout; /* * Put all the arguments for the xfer in the ccb */ if (flags & XS_CTL_RESET) { ccb->opcode = AHA_RESET_CCB; ccb->scsi_cmd_length = 0; } else { /* can't use S/G if zero length */ ccb->opcode = (xs->datalen ? AHA_INIT_SCAT_GATH_CCB : AHA_INITIATOR_CCB); bcopy(xs->cmd, &ccb->scsi_cmd, ccb->scsi_cmd_length = xs->cmdlen); } if (xs->datalen) { /* * Map the DMA transfer. */ #ifdef TFS if (flags & XS_CTL_DATA_UIO) { error = bus_dmamap_load_uio(dmat, ccb->dmamap_xfer, (struct uio *)xs->data, (flags & XS_CTL_NOSLEEP) ? BUS_DMA_NOWAIT : BUS_DMA_WAITOK); } else #endif { error = bus_dmamap_load(dmat, ccb->dmamap_xfer, xs->data, xs->datalen, NULL, (flags & XS_CTL_NOSLEEP) ? BUS_DMA_NOWAIT : BUS_DMA_WAITOK); } if (error) { if (error == EFBIG) { printf("%s: aha_scsi_cmd, more than %d" " dma segments\n", sc->sc_dev.dv_xname, AHA_NSEG); } else { printf("%s: aha_scsi_cmd, error %d loading" " dma map\n", sc->sc_dev.dv_xname, error); } goto bad; } bus_dmamap_sync(dmat, ccb->dmamap_xfer, 0, ccb->dmamap_xfer->dm_mapsize, (flags & XS_CTL_DATA_IN) ? BUS_DMASYNC_PREREAD : BUS_DMASYNC_PREWRITE); /* * Load the hardware scatter/gather map with the * contents of the DMA map. */ for (seg = 0; seg < ccb->dmamap_xfer->dm_nsegs; seg++) { ltophys(ccb->dmamap_xfer->dm_segs[seg].ds_addr, ccb->scat_gath[seg].seg_addr); ltophys(ccb->dmamap_xfer->dm_segs[seg].ds_len, ccb->scat_gath[seg].seg_len); } ltophys(sc->sc_dmamap_control->dm_segs[0].ds_addr + AHA_CCB_OFF(ccb) + offsetof(struct aha_ccb, scat_gath), ccb->data_addr); ltophys(ccb->dmamap_xfer->dm_nsegs * sizeof(struct aha_scat_gath), ccb->data_length); } else { /* * No data xfer, use non S/G values. */ ltophys(0, ccb->data_addr); ltophys(0, ccb->data_length); } ccb->data_out = 0; ccb->data_in = 0; ccb->target = sc_link->scsipi_scsi.target; ccb->lun = sc_link->scsipi_scsi.lun; ccb->req_sense_length = sizeof(ccb->scsi_sense); ccb->host_stat = 0x00; ccb->target_stat = 0x00; ccb->link_id = 0; ltophys(0, ccb->link_addr); bus_dmamap_sync(sc->sc_dmat, sc->sc_dmamap_control, AHA_CCB_OFF(ccb), sizeof(struct aha_ccb), BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); s = splbio(); aha_queue_ccb(sc, ccb); splx(s); /* * Usually return SUCCESSFULLY QUEUED */ SC_DEBUG(sc_link, SDEV_DB3, ("cmd_sent\n")); if ((flags & XS_CTL_POLL) == 0) return (SUCCESSFULLY_QUEUED); /* * If we can't use interrupts, poll on completion */ if (aha_poll(sc, xs, ccb->timeout)) { aha_timeout(ccb); if (aha_poll(sc, xs, ccb->timeout)) aha_timeout(ccb); } return (COMPLETE); bad: xs->error = XS_DRIVER_STUFFUP; aha_free_ccb(sc, ccb); return (COMPLETE); } /* * Poll a particular unit, looking for a particular xs */ int aha_poll(sc, xs, count) struct aha_softc *sc; struct scsipi_xfer *xs; int count; { bus_space_tag_t iot = sc->sc_iot; bus_space_handle_t ioh = sc->sc_ioh; /* timeouts are in msec, so we loop in 1000 usec cycles */ while (count) { /* * If we had interrupts enabled, would we * have got an interrupt? */ if (bus_space_read_1(iot, ioh, AHA_INTR_PORT) & AHA_INTR_ANYINTR) aha_intr(sc); if (xs->xs_status & XS_STS_DONE) return (0); delay(1000); /* only happens in boot so ok */ count--; } return (1); } void aha_timeout(arg) void *arg; { struct aha_ccb *ccb = arg; struct scsipi_xfer *xs = ccb->xs; struct scsipi_link *sc_link = xs->sc_link; struct aha_softc *sc = sc_link->adapter_softc; int s; scsi_print_addr(sc_link); printf("timed out"); s = splbio(); #ifdef AHADIAG /* * If The ccb's mbx is not free, then the board has gone south? */ aha_collect_mbo(sc); if (ccb->flags & CCB_SENDING) { printf("%s: not taking commands!\n", sc->sc_dev.dv_xname); Debugger(); } #endif /* * If it has been through before, then * a previous abort has failed, don't * try abort again */ if (ccb->flags & CCB_ABORT) { /* abort timed out */ printf(" AGAIN\n"); /* XXX Must reset! */ } else { /* abort the operation that has timed out */ printf("\n"); ccb->xs->error = XS_TIMEOUT; ccb->timeout = AHA_ABORT_TIMEOUT; ccb->flags |= CCB_ABORT; aha_queue_ccb(sc, ccb); } splx(s); } @ 1.1.2.2 log @Ops, these shouldn't be there ! @ text @d1 1 a1 1 /* $NetBSD: aha.c.orig,v 1.1.2.1 2000/11/20 11:40:15 bouyer Exp $ */ @