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	thorpej-futex-base:1.5;
locks; strict;
comment	@# @;


1.5
date	2020.09.08.17.35.27;	author jakllsch;	state Exp;
branches;
next	1.4;
commitid	OV3IOQDxsoBWJgnC;

1.4
date	2020.09.08.17.17.32;	author jakllsch;	state Exp;
branches;
next	1.3;
commitid	H8joos18EjflFgnC;

1.3
date	2020.07.28.20.08.48;	author riastradh;	state Exp;
branches;
next	1.2;
commitid	uPoqpyAHvREMXShC;

1.2
date	2020.07.27.20.51.29;	author riastradh;	state Exp;
branches;
next	1.1;
commitid	GBRVg4JfXq6reLhC;

1.1
date	2020.07.25.22.51.57;	author riastradh;	state Exp;
branches;
next	;
commitid	6o4CSj2X4irvXvhC;


desc
@@


1.5
log
@Acknowledge clang warning for NEON cipher code on aarch64eb

We've already made the nonportable vector initializations portable; the
code works on aarch64eb.
@
text
@#	$NetBSD: files.chacha_arm,v 1.4 2020/09/08 17:17:32 jakllsch Exp $

ifdef aarch64
makeoptions	chacha	"COPTS.chacha_neon.c"+="-march=armv8-a"
makeoptions	chacha	"CWARNFLAGS.chacha_neon.c"+="${${ACTIVE_CC} == clang :? -Wno-nonportable-vector-initialization :}"
else
makeoptions	chacha	"COPTS.chacha_neon.c"+="-mfloat-abi=softfp -mfpu=neon"
endif

file	crypto/chacha/arch/arm/chacha_neon.c	chacha & (cpu_cortex | aarch64)
file	crypto/chacha/arch/arm/chacha_neon_32.S	chacha & cpu_cortex & !aarch64
file	crypto/chacha/arch/arm/chacha_neon_64.S	chacha & aarch64
file	crypto/chacha/arch/arm/chacha_neon_impl.c chacha & (cpu_cortex | aarch64)
@


1.4
log
@use correct condition
@
text
@d1 1
a1 1
#	$NetBSD: files.chacha_arm,v 1.3 2020/07/28 20:08:48 riastradh Exp $
d5 1
@


1.3
log
@Implement 4-way vectorization of ChaCha for armv7 NEON.

cgd performance is not as good as I was hoping (~4% improvement over
chacha_ref.c) but it should improve substantially more if we let the
cgd worker thread keep fpu state so we don't have to pay the cost of
isb and zero-the-fpu on every 512-byte cgd block.
@
text
@d1 1
a1 1
#	$NetBSD: files.chacha_arm,v 1.2 2020/07/27 20:51:29 riastradh Exp $
d6 1
a6 1
makeoptions	aes	"COPTS.chacha_neon.c"+="-mfloat-abi=softfp -mfpu=neon"
@


1.2
log
@Enable ChaCha NEON code on armv7 too.

The 4-blocks-at-a-time assembly helper is disabled for now; adapting
it to armv7 is going to be a little annoying with only 16 128-bit
vector registers.

(Should also do a fifth block in the integer registers for 320 bytes
at a time.)
@
text
@d1 1
a1 1
#	$NetBSD: files.chacha_arm,v 1.1 2020/07/25 22:51:57 riastradh Exp $
d10 1
@


1.1
log
@Implement ChaCha with NEON on ARM.

XXX Needs performance measurement.
XXX Needs adaptation to arm32 neon which has half the registers.
@
text
@d1 1
a1 1
#	$NetBSD$
d5 2
d9 3
a11 3
file	crypto/chacha/arch/arm/chacha_neon.c		chacha
file	crypto/chacha/arch/arm/chacha_neon_64.S		chacha & aarch64
file	crypto/chacha/arch/arm/chacha_neon_impl.c	chacha
@