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1.1
date	2026.06.27.13.28.34;	author rkujawa;	state Exp;
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commitid	DeOWreJOXyKJfrLG;


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1.1
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@Add support for MPC5200B SoC, including:
- BestComm DMA controller
- Clock Distribution Module
- Fast Ethernet Controller, utilizing BestComm DMA
- AC97 controller, utilizing BestComm DMA
- ATA controller (PIO-only, hardware DMA is too broken)
- On-chip SRAM (needed for BestComm)
- PSC UART (for console)
- PCI along with bus mater DMA support

All of this is based on previous work by Robert Swindells and would not
be possible if it wasn't for his effort.
@
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@/*	$NetBSD$	*/

/*-
 * Copyright (c) 2026 The NetBSD Foundation, Inc.
 * All rights reserved.
 *
 * This code is derived from software contributed to The NetBSD Foundation
 * by Radoslaw Kujawa and Robert Swindells.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * 1. Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 * 2. Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 *
 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
 * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
 * POSSIBILITY OF SUCH DAMAGE.
 */

#ifndef _POWERPC_MPC5200_CDMVAR_H_
#define _POWERPC_MPC5200_CDMVAR_H_

#include <sys/device.h>
#include <sys/bus.h>

struct cdm_softc {
	device_t		sc_dev;
	bus_space_tag_t		sc_iot;
	bus_space_handle_t	sc_ioh;
};

/*
 * Public interface to the MPC5200B Clock Distribution Module (CDM).
 */

uint32_t	mpc5200_cdm_get_xlb_freq(void);
uint32_t	mpc5200_cdm_get_ipb_freq(void);
uint32_t	mpc5200_cdm_get_pci_freq(void);
uint32_t	mpc5200_cdm_get_core_freq(void);

/*
 * Conservative fallback frequencies (Hz)
 */
#define MPC5200_XLB_FREQ_DEFAULT	132000000
#define MPC5200_IPB_FREQ_DEFAULT	 66000000
#define MPC5200_PCI_FREQ_DEFAULT	 33000000
#define MPC5200_CORE_FREQ_DEFAULT	396000000

#endif /* _POWERPC_MPC5200_CDMVAR_H_ */
@