head 1.5; access; symbols netbsd-11-0-RC4:1.5 netbsd-11-0-RC3:1.5 netbsd-11-0-RC2:1.5 netbsd-11-0-RC1:1.5 perseant-exfatfs-base-20250801:1.5 netbsd-11:1.5.0.2 netbsd-11-base:1.5 netbsd-10-1-RELEASE:1.4 perseant-exfatfs-base-20240630:1.4 perseant-exfatfs:1.4.0.92 perseant-exfatfs-base:1.4 netbsd-8-3-RELEASE:1.4 netbsd-9-4-RELEASE:1.4 netbsd-10-0-RELEASE:1.4 netbsd-10-0-RC6:1.4 netbsd-10-0-RC5:1.4 netbsd-10-0-RC4:1.4 netbsd-10-0-RC3:1.4 netbsd-10-0-RC2:1.4 thorpej-ifq:1.4.0.90 thorpej-ifq-base:1.4 thorpej-altq-separation:1.4.0.88 thorpej-altq-separation-base:1.4 netbsd-10-0-RC1:1.4 netbsd-10:1.4.0.86 netbsd-10-base:1.4 bouyer-sunxi-drm:1.4.0.84 bouyer-sunxi-drm-base:1.4 netbsd-9-3-RELEASE:1.4 thorpej-i2c-spi-conf2:1.4.0.82 thorpej-i2c-spi-conf2-base:1.4 thorpej-futex2:1.4.0.80 thorpej-futex2-base:1.4 thorpej-cfargs2:1.4.0.78 thorpej-cfargs2-base:1.4 cjep_sun2x-base1:1.4 cjep_sun2x:1.4.0.76 cjep_sun2x-base:1.4 cjep_staticlib_x-base1:1.4 netbsd-9-2-RELEASE:1.4 cjep_staticlib_x:1.4.0.74 cjep_staticlib_x-base:1.4 thorpej-i2c-spi-conf:1.4.0.72 thorpej-i2c-spi-conf-base:1.4 thorpej-cfargs:1.4.0.70 thorpej-cfargs-base:1.4 thorpej-futex:1.4.0.68 thorpej-futex-base:1.4 netbsd-9-1-RELEASE:1.4 bouyer-xenpvh-base2:1.4 phil-wifi-20200421:1.4 bouyer-xenpvh-base1:1.4 phil-wifi-20200411:1.4 bouyer-xenpvh:1.4.0.66 bouyer-xenpvh-base:1.4 is-mlppp:1.4.0.64 is-mlppp-base:1.4 phil-wifi-20200406:1.4 netbsd-8-2-RELEASE:1.4 ad-namecache-base3:1.4 netbsd-9-0-RELEASE:1.4 netbsd-9-0-RC2:1.4 ad-namecache-base2:1.4 ad-namecache-base1:1.4 ad-namecache:1.4.0.62 ad-namecache-base:1.4 netbsd-9-0-RC1:1.4 phil-wifi-20191119:1.4 netbsd-9:1.4.0.60 netbsd-9-base:1.4 phil-wifi-20190609:1.4 netbsd-8-1-RELEASE:1.4 netbsd-8-1-RC1:1.4 isaki-audio2:1.4.0.58 isaki-audio2-base:1.4 pgoyette-compat-merge-20190127:1.4 pgoyette-compat-20190127:1.4 pgoyette-compat-20190118:1.4 pgoyette-compat-1226:1.4 pgoyette-compat-1126:1.4 pgoyette-compat-1020:1.4 pgoyette-compat-0930:1.4 pgoyette-compat-0906:1.4 netbsd-7-2-RELEASE:1.4 pgoyette-compat-0728:1.4 netbsd-8-0-RELEASE:1.4 phil-wifi:1.4.0.56 phil-wifi-base:1.4 pgoyette-compat-0625:1.4 netbsd-8-0-RC2:1.4 pgoyette-compat-0521:1.4 pgoyette-compat-0502:1.4 pgoyette-compat-0422:1.4 netbsd-8-0-RC1:1.4 pgoyette-compat-0415:1.4 pgoyette-compat-0407:1.4 pgoyette-compat-0330:1.4 pgoyette-compat-0322:1.4 pgoyette-compat-0315:1.4 netbsd-7-1-2-RELEASE:1.4 pgoyette-compat:1.4.0.54 pgoyette-compat-base:1.4 netbsd-7-1-1-RELEASE:1.4 tls-maxphys-base-20171202:1.4 matt-nb8-mediatek:1.4.0.52 matt-nb8-mediatek-base:1.4 nick-nhusb-base-20170825:1.4 perseant-stdc-iso10646:1.4.0.50 perseant-stdc-iso10646-base:1.4 netbsd-8:1.4.0.48 netbsd-8-base:1.4 prg-localcount2-base3:1.4 prg-localcount2-base2:1.4 prg-localcount2-base1:1.4 prg-localcount2:1.4.0.46 prg-localcount2-base:1.4 pgoyette-localcount-20170426:1.4 bouyer-socketcan-base1:1.4 jdolecek-ncq:1.4.0.44 jdolecek-ncq-base:1.4 pgoyette-localcount-20170320:1.4 netbsd-7-1:1.4.0.42 netbsd-7-1-RELEASE:1.4 netbsd-7-1-RC2:1.4 nick-nhusb-base-20170204:1.4 netbsd-7-nhusb-base-20170116:1.4 bouyer-socketcan:1.4.0.40 bouyer-socketcan-base:1.4 pgoyette-localcount-20170107:1.4 netbsd-7-1-RC1:1.4 nick-nhusb-base-20161204:1.4 pgoyette-localcount-20161104:1.4 netbsd-7-0-2-RELEASE:1.4 nick-nhusb-base-20161004:1.4 localcount-20160914:1.4 netbsd-7-nhusb:1.4.0.38 netbsd-7-nhusb-base:1.4 pgoyette-localcount-20160806:1.4 pgoyette-localcount-20160726:1.4 pgoyette-localcount:1.4.0.36 pgoyette-localcount-base:1.4 nick-nhusb-base-20160907:1.4 nick-nhusb-base-20160529:1.4 netbsd-7-0-1-RELEASE:1.4 nick-nhusb-base-20160422:1.4 nick-nhusb-base-20160319:1.4 nick-nhusb-base-20151226:1.4 netbsd-7-0:1.4.0.34 netbsd-7-0-RELEASE:1.4 nick-nhusb-base-20150921:1.4 netbsd-7-0-RC3:1.4 netbsd-7-0-RC2:1.4 netbsd-7-0-RC1:1.4 nick-nhusb-base-20150606:1.4 nick-nhusb-base-20150406:1.4 nick-nhusb:1.4.0.32 nick-nhusb-base:1.4 netbsd-6-0-6-RELEASE:1.4 netbsd-6-1-5-RELEASE:1.4 netbsd-7:1.4.0.30 netbsd-7-base:1.4 yamt-pagecache-base9:1.4 yamt-pagecache-tag8:1.4 netbsd-6-1-4-RELEASE:1.4 netbsd-6-0-5-RELEASE:1.4 tls-earlyentropy:1.4.0.28 tls-earlyentropy-base:1.4 riastradh-xf86-video-intel-2-7-1-pre-2-21-15:1.4 riastradh-drm2-base3:1.4 netbsd-6-1-3-RELEASE:1.4 netbsd-6-0-4-RELEASE:1.4 netbsd-6-1-2-RELEASE:1.4 netbsd-6-0-3-RELEASE:1.4 rmind-smpnet-nbase:1.4 netbsd-6-1-1-RELEASE:1.4 riastradh-drm2-base2:1.4 riastradh-drm2-base1:1.4 riastradh-drm2:1.4.0.26 riastradh-drm2-base:1.4 rmind-smpnet:1.4.0.18 rmind-smpnet-base:1.4 netbsd-6-1:1.4.0.24 netbsd-6-0-2-RELEASE:1.4 netbsd-6-1-RELEASE:1.4 khorben-n900:1.4.0.22 netbsd-6-1-RC4:1.4 netbsd-6-1-RC3:1.4 agc-symver:1.4.0.20 agc-symver-base:1.4 netbsd-6-1-RC2:1.4 netbsd-6-1-RC1:1.4 yamt-pagecache-base8:1.4 netbsd-6-0-1-RELEASE:1.4 yamt-pagecache-base7:1.4 matt-nb6-plus-nbase:1.4 yamt-pagecache-base6:1.4 netbsd-6-0:1.4.0.16 netbsd-6-0-RELEASE:1.4 netbsd-6-0-RC2:1.4 tls-maxphys:1.4.0.14 tls-maxphys-base:1.4 matt-nb6-plus:1.4.0.12 matt-nb6-plus-base:1.4 netbsd-6-0-RC1:1.4 jmcneill-usbmp-base10:1.4 yamt-pagecache-base5:1.4 jmcneill-usbmp-base9:1.4 yamt-pagecache-base4:1.4 jmcneill-usbmp-base8:1.4 jmcneill-usbmp-base7:1.4 jmcneill-usbmp-base6:1.4 jmcneill-usbmp-base5:1.4 jmcneill-usbmp-base4:1.4 jmcneill-usbmp-base3:1.4 jmcneill-usbmp-pre-base2:1.4 jmcneill-usbmp-base2:1.4 netbsd-6:1.4.0.10 netbsd-6-base:1.4 jmcneill-usbmp:1.4.0.8 jmcneill-usbmp-base:1.4 jmcneill-audiomp3:1.4.0.6 jmcneill-audiomp3-base:1.4 yamt-pagecache-base3:1.4 yamt-pagecache-base2:1.4 yamt-pagecache:1.4.0.4 yamt-pagecache-base:1.4 rmind-uvmplock-nbase:1.4 cherry-xenmp:1.4.0.2 cherry-xenmp-base:1.4 jym-xensuspend-nbase:1.4 uebayasi-xip-base7:1.2 bouyer-quota2-nbase:1.3 bouyer-quota2:1.2.0.10 bouyer-quota2-base:1.2 jruoho-x86intr:1.2.0.8 jruoho-x86intr-base:1.2 matt-mips64-premerge-20101231:1.2 matt-nb5-mips64-premerge-20101231:1.1.2.13 uebayasi-xip-base6:1.2 uebayasi-xip-base5:1.2 uebayasi-xip-base4:1.2 jym-xensuspend-base:1.4 uebayasi-xip-base3:1.2 yamt-nfs-mp-base11:1.2 matt-nb5-mips64-k15:1.1.2.13 uebayasi-xip-base2:1.2 yamt-nfs-mp-base10:1.2 uebayasi-xip-base1:1.2 rmind-uvmplock:1.2.0.6 rmind-uvmplock-base:1.4 yamt-nfs-mp:1.2.0.4 yamt-nfs-mp-base9:1.2 uebayasi-xip:1.2.0.2 uebayasi-xip-base:1.2 matt-nb5-mips64-premerge-20091211:1.1.2.6 yamt-nfs-mp-base8:1.1 matt-nb5-mips64:1.1.0.2; locks; strict; comment @# @; 1.5 date 2024.10.07.15.04.32; author andvar; state Exp; branches; next 1.4; commitid n88EsnSuQAyf2KsF; 1.4 date 2011.03.18.02.13.46; author cliff; state Exp; branches 1.4.92.1; next 1.3; 1.3 date 2011.02.20.07.45.46; author matt; state Exp; branches; next 1.2; 1.2 date 2009.12.14.00.46.04; author matt; state Exp; branches 1.2.4.1 1.2.6.1 1.2.8.1 1.2.10.1; next 1.1; 1.1 date 2009.09.13.03.27.38; author cliff; state dead; branches 1.1.2.1; next ; 1.4.92.1 date 2025.08.02.05.55.53; author perseant; state Exp; branches; next ; commitid 23j6GFaDws3O875G; 1.2.4.1 date 2009.12.14.00.46.04; author yamt; state dead; branches; next 1.2.4.2; 1.2.4.2 date 2010.03.11.15.02.38; author yamt; state Exp; branches; next ; 1.2.6.1 date 2011.03.05.20.51.03; author rmind; state Exp; branches; next 1.2.6.2; 1.2.6.2 date 2011.04.21.01.41.10; author rmind; state Exp; branches; next ; 1.2.8.1 date 2011.06.06.09.06.03; author jruoho; state Exp; branches; next ; 1.2.10.1 date 2011.03.05.15.09.47; author bouyer; state Exp; branches; next ; 1.1.2.1 date 2009.09.13.03.27.38; author cliff; state Exp; branches; next 1.1.2.2; 1.1.2.2 date 2009.09.15.02.32.01; author cliff; state Exp; branches; next 1.1.2.3; 1.1.2.3 date 2009.09.22.06.58.20; author cliff; state Exp; branches; next 1.1.2.4; 1.1.2.4 date 2009.11.09.09.56.06; author cliff; state Exp; branches; next 1.1.2.5; 1.1.2.5 date 2009.11.14.21.59.15; author cliff; state Exp; branches; next 1.1.2.6; 1.1.2.6 date 2009.11.15.22.58.15; author cliff; state Exp; branches; next 1.1.2.7; 1.1.2.7 date 2009.12.14.07.23.07; author cliff; state Exp; branches; next 1.1.2.8; 1.1.2.8 date 2010.01.16.23.50.04; author cliff; state Exp; branches; next 1.1.2.9; 1.1.2.9 date 2010.01.20.20.48.12; author matt; state Exp; branches; next 1.1.2.10; 1.1.2.10 date 2010.03.21.21.21.41; author cliff; state Exp; branches; next 1.1.2.11; 1.1.2.11 date 2010.04.07.19.31.37; author cliff; state Exp; branches; next 1.1.2.12; 1.1.2.12 date 2010.04.12.22.00.51; author cliff; state Exp; branches; next 1.1.2.13; 1.1.2.13 date 2010.04.17.07.49.23; author cliff; state Exp; branches; next 1.1.2.14; 1.1.2.14 date 2011.12.24.01.57.53; author matt; state Exp; branches; next 1.1.2.15; 1.1.2.15 date 2011.12.27.19.58.18; author matt; state Exp; branches; next 1.1.2.16; 1.1.2.16 date 2011.12.28.05.36.10; author matt; state Exp; branches; next 1.1.2.17; 1.1.2.17 date 2011.12.30.06.43.39; author matt; state Exp; branches; next 1.1.2.18; 1.1.2.18 date 2012.01.04.16.17.53; author matt; state Exp; branches; next 1.1.2.19; 1.1.2.19 date 2012.01.19.17.37.15; author matt; state Exp; branches; next 1.1.2.20; 1.1.2.20 date 2013.11.05.18.43.31; author matt; state Exp; branches; next ; commitid LTXHx36o6ek3t7cx; desc @@ 1.5 log @s/periperal/peripheral/ in comments. @ text @# $NetBSD: files.rmixl,v 1.4 2011/03/18 02:13:46 cliff Exp $ # # Configuration info for RMI XLP, XLR, XLS # file arch/mips/rmi/rmixl_spl.S file arch/mips/rmi/rmixl_intr.c file arch/mips/rmi/rmixl_subr.S file arch/mips/rmi/rmixl_fmn.c # node is parent of one or more core device cpunode { [ core = -1] } attach cpunode at mainbus with cpunode_rmixl file arch/mips/rmi/rmixl_cpunode.c cpunode_rmixl # core is parent of one or more cpu device cpucore { [ thread = -1] } attach cpucore at cpunode with cpucore_rmixl file arch/mips/rmi/rmixl_cpucore.c cpucore_rmixl # each cpu is a RMI 'thread' or 'vCPU' device cpu attach cpu at cpucore with cpu_rmixl file arch/mips/rmi/rmixl_cpu.c cpu_rmixl # OBIO: offsets are from System Bridge Controller base define obio { [addr=-1], [size=0], [intr=-1], [tmsk=-1], [mult=1] } device obio: obio attach obio at cpunode with obio_rmixl file arch/mips/rmi/rmixl_obio.c obio_rmixl file arch/mips/rmi/rmixl_obio_eb_space.c obio_rmixl file arch/mips/rmi/rmixl_obio_el_space.c obio_rmixl file arch/mips/rmi/rmixl_pci_cfg_space.c rmixl_pcix | rmixl_pcie file arch/mips/rmi/rmixl_pci_ecfg_space.c rmixl_pcie file arch/mips/rmi/rmixl_pci_io_space.c rmixl_pcix | rmixl_pcie file arch/mips/rmi/rmixl_pci_mem_space.c rmixl_pcix | rmixl_pcie # NS16550 compatible serial ports attach com at obio with com_rmixl file arch/mips/rmi/rmixl_com.c com_rmixl defparam opt_com.h CONSADDR CONSFREQ CONSPEED CONMODE # GPIO device rmixl_gpio: gpiobus attach rmixl_gpio at obio file arch/mips/rmi/rmixl_gpio.c rmixl_gpio # PCIe device rmixl_pcie: pcibus attach rmixl_pcie at obio file arch/mips/rmi/rmixl_pcie.c rmixl_pcie needs-flag # PCI-X device rmixl_pcix: pcibus attach rmixl_pcix at obio file arch/mips/rmi/rmixl_pcix.c rmixl_pcix needs-flag # RMI Peripheral IO Bus to Flash, PCMCIA memory controllers define rmixl_iobus { [cs=-1], [addr=-1], [size=-1], [intr=-1] } device rmixl_iobus: rmixl_iobus attach rmixl_iobus at obio file arch/mips/rmi/rmixl_iobus_space.c rmixl_iobus file arch/mips/rmi/rmixl_iobus.c rmixl_iobus # NAND flash controller device rmixl_nand: nandbus attach rmixl_nand at rmixl_iobus file arch/mips/rmi/rmixl_nand.c rmixl_nand # PCMCIA controller device rmixl_pcic: pcmciabus attach rmixl_pcic at rmixl_iobus file arch/mips/rmi/rmixl_pcic.c rmixl_pcic # On-chip USB interface define rmixl_usbi { [addr=-1], [size=-1], [intr=-1] } device rmixl_usbi: rmixl_usbi attach rmixl_usbi at obio file arch/mips/rmi/rmixl_usbi.c rmixl_usbi # On-chip OHCI USB controller attach ohci at rmixl_usbi with rmixl_ohci file arch/mips/rmi/rmixl_ohci.c ohci # On-chip EHCI USB controller attach ehci at rmixl_usbi with rmixl_ehci file arch/mips/rmi/rmixl_ehci.c ehci @ 1.4 log @- add config for gpio - add config for iobus, nand, flash @ text @d1 1 a1 1 # $NetBSD: files.rmixl,v 1.3 2011/02/20 07:45:46 matt Exp $ d59 1 a59 1 # RMI Periperal IO Bus to Flash, PCMCIA memory controllers @ 1.4.92.1 log @Sync with HEAD @ text @d1 1 a1 1 # $NetBSD: files.rmixl,v 1.5 2024/10/07 15:04:32 andvar Exp $ d59 1 a59 1 # RMI Peripheral IO Bus to Flash, PCMCIA memory controllers @ 1.3 log @Major merge forward from matt-nb5-mips64. New fixup code. New common SPL code. New common interrupt code. Move related variables into structures. Cleanup locore (move MD variable into it). Kill StudlyCaps Use PCU for FPU @ text @d1 1 a1 1 # $NetBSD: files.rmixl,v 1.2 2009/12/14 00:46:04 matt Exp $ d44 5 d59 17 @ 1.2 log @Merge from matt-nb5-mips64 Merge mips-specific arch files. @ text @d1 1 a1 1 # $NetBSD$ d6 1 d9 17 d28 1 a28 1 define obio { [addr=-1], [size=0], [intr=-1], [mult=1] } d30 8 a37 7 attach obio at mainbus file arch/mips/rmi/rmixl_obio.c obio needs-count file arch/mips/rmi/rmixl_obio_space.c obio file arch/mips/rmi/rmixl_pcie_cfg_space.c pci file arch/mips/rmi/rmixl_pcie_ecfg_space.c pci file arch/mips/rmi/rmixl_pcie_io_space.c pci file arch/mips/rmi/rmixl_pcie_mem_space.c pci d40 2 a41 2 attach com at obio with rmixl_com file arch/mips/rmi/rmixl_com.c rmixl_com d44 1 a44 1 # PCI d47 20 a66 1 file arch/mips/rmi/rmixl_pcie.c rmixl_pcie @ 1.2.8.1 log @Sync with HEAD. @ text @d1 1 a1 1 # $NetBSD: files.rmixl,v 1.4 2011/03/18 02:13:46 cliff Exp $ a5 1 file arch/mips/rmi/rmixl_spl.S a7 17 file arch/mips/rmi/rmixl_fmn.c # node is parent of one or more core device cpunode { [ core = -1] } attach cpunode at mainbus with cpunode_rmixl file arch/mips/rmi/rmixl_cpunode.c cpunode_rmixl # core is parent of one or more cpu device cpucore { [ thread = -1] } attach cpucore at cpunode with cpucore_rmixl file arch/mips/rmi/rmixl_cpucore.c cpucore_rmixl # each cpu is a RMI 'thread' or 'vCPU' device cpu attach cpu at cpucore with cpu_rmixl file arch/mips/rmi/rmixl_cpu.c cpu_rmixl d10 1 a10 1 define obio { [addr=-1], [size=0], [intr=-1], [tmsk=-1], [mult=1] } d12 7 a18 8 attach obio at cpunode with obio_rmixl file arch/mips/rmi/rmixl_obio.c obio_rmixl file arch/mips/rmi/rmixl_obio_eb_space.c obio_rmixl file arch/mips/rmi/rmixl_obio_el_space.c obio_rmixl file arch/mips/rmi/rmixl_pci_cfg_space.c rmixl_pcix | rmixl_pcie file arch/mips/rmi/rmixl_pci_ecfg_space.c rmixl_pcie file arch/mips/rmi/rmixl_pci_io_space.c rmixl_pcix | rmixl_pcie file arch/mips/rmi/rmixl_pci_mem_space.c rmixl_pcix | rmixl_pcie d21 2 a22 2 attach com at obio with com_rmixl file arch/mips/rmi/rmixl_com.c com_rmixl d25 1 a25 6 # GPIO device rmixl_gpio: gpiobus attach rmixl_gpio at obio file arch/mips/rmi/rmixl_gpio.c rmixl_gpio # PCIe d28 1 a28 37 file arch/mips/rmi/rmixl_pcie.c rmixl_pcie needs-flag # PCI-X device rmixl_pcix: pcibus attach rmixl_pcix at obio file arch/mips/rmi/rmixl_pcix.c rmixl_pcix needs-flag # RMI Periperal IO Bus to Flash, PCMCIA memory controllers define rmixl_iobus { [cs=-1], [addr=-1], [size=-1], [intr=-1] } device rmixl_iobus: rmixl_iobus attach rmixl_iobus at obio file arch/mips/rmi/rmixl_iobus_space.c rmixl_iobus file arch/mips/rmi/rmixl_iobus.c rmixl_iobus # NAND flash controller device rmixl_nand: nandbus attach rmixl_nand at rmixl_iobus file arch/mips/rmi/rmixl_nand.c rmixl_nand # PCMCIA controller device rmixl_pcic: pcmciabus attach rmixl_pcic at rmixl_iobus file arch/mips/rmi/rmixl_pcic.c rmixl_pcic # On-chip USB interface define rmixl_usbi { [addr=-1], [size=-1], [intr=-1] } device rmixl_usbi: rmixl_usbi attach rmixl_usbi at obio file arch/mips/rmi/rmixl_usbi.c rmixl_usbi # On-chip OHCI USB controller attach ohci at rmixl_usbi with rmixl_ohci file arch/mips/rmi/rmixl_ohci.c ohci # On-chip EHCI USB controller attach ehci at rmixl_usbi with rmixl_ehci file arch/mips/rmi/rmixl_ehci.c ehci @ 1.2.6.1 log @sync with head @ text @a5 1 file arch/mips/rmi/rmixl_spl.S a7 17 file arch/mips/rmi/rmixl_fmn.c # node is parent of one or more core device cpunode { [ core = -1] } attach cpunode at mainbus with cpunode_rmixl file arch/mips/rmi/rmixl_cpunode.c cpunode_rmixl # core is parent of one or more cpu device cpucore { [ thread = -1] } attach cpucore at cpunode with cpucore_rmixl file arch/mips/rmi/rmixl_cpucore.c cpucore_rmixl # each cpu is a RMI 'thread' or 'vCPU' device cpu attach cpu at cpucore with cpu_rmixl file arch/mips/rmi/rmixl_cpu.c cpu_rmixl d10 1 a10 1 define obio { [addr=-1], [size=0], [intr=-1], [tmsk=-1], [mult=1] } d12 7 a18 8 attach obio at cpunode with obio_rmixl file arch/mips/rmi/rmixl_obio.c obio_rmixl file arch/mips/rmi/rmixl_obio_eb_space.c obio_rmixl file arch/mips/rmi/rmixl_obio_el_space.c obio_rmixl file arch/mips/rmi/rmixl_pci_cfg_space.c rmixl_pcix | rmixl_pcie file arch/mips/rmi/rmixl_pci_ecfg_space.c rmixl_pcie file arch/mips/rmi/rmixl_pci_io_space.c rmixl_pcix | rmixl_pcie file arch/mips/rmi/rmixl_pci_mem_space.c rmixl_pcix | rmixl_pcie d21 2 a22 2 attach com at obio with com_rmixl file arch/mips/rmi/rmixl_com.c com_rmixl d25 1 a25 1 # PCIe d28 1 a28 20 file arch/mips/rmi/rmixl_pcie.c rmixl_pcie needs-flag # PCI-X device rmixl_pcix: pcibus attach rmixl_pcix at obio file arch/mips/rmi/rmixl_pcix.c rmixl_pcix needs-flag # On-chip USB interface define rmixl_usbi { [addr=-1], [size=-1], [intr=-1] } device rmixl_usbi: rmixl_usbi attach rmixl_usbi at obio file arch/mips/rmi/rmixl_usbi.c rmixl_usbi # On-chip OHCI USB controller attach ohci at rmixl_usbi with rmixl_ohci file arch/mips/rmi/rmixl_ohci.c ohci # On-chip EHCI USB controller attach ehci at rmixl_usbi with rmixl_ehci file arch/mips/rmi/rmixl_ehci.c ehci @ 1.2.6.2 log @sync with head @ text @a43 5 # GPIO device rmixl_gpio: gpiobus attach rmixl_gpio at obio file arch/mips/rmi/rmixl_gpio.c rmixl_gpio a53 17 # RMI Periperal IO Bus to Flash, PCMCIA memory controllers define rmixl_iobus { [cs=-1], [addr=-1], [size=-1], [intr=-1] } device rmixl_iobus: rmixl_iobus attach rmixl_iobus at obio file arch/mips/rmi/rmixl_iobus_space.c rmixl_iobus file arch/mips/rmi/rmixl_iobus.c rmixl_iobus # NAND flash controller device rmixl_nand: nandbus attach rmixl_nand at rmixl_iobus file arch/mips/rmi/rmixl_nand.c rmixl_nand # PCMCIA controller device rmixl_pcic: pcmciabus attach rmixl_pcic at rmixl_iobus file arch/mips/rmi/rmixl_pcic.c rmixl_pcic @ 1.2.10.1 log @Sync with HEAD @ text @a5 1 file arch/mips/rmi/rmixl_spl.S a7 17 file arch/mips/rmi/rmixl_fmn.c # node is parent of one or more core device cpunode { [ core = -1] } attach cpunode at mainbus with cpunode_rmixl file arch/mips/rmi/rmixl_cpunode.c cpunode_rmixl # core is parent of one or more cpu device cpucore { [ thread = -1] } attach cpucore at cpunode with cpucore_rmixl file arch/mips/rmi/rmixl_cpucore.c cpucore_rmixl # each cpu is a RMI 'thread' or 'vCPU' device cpu attach cpu at cpucore with cpu_rmixl file arch/mips/rmi/rmixl_cpu.c cpu_rmixl d10 1 a10 1 define obio { [addr=-1], [size=0], [intr=-1], [tmsk=-1], [mult=1] } d12 7 a18 8 attach obio at cpunode with obio_rmixl file arch/mips/rmi/rmixl_obio.c obio_rmixl file arch/mips/rmi/rmixl_obio_eb_space.c obio_rmixl file arch/mips/rmi/rmixl_obio_el_space.c obio_rmixl file arch/mips/rmi/rmixl_pci_cfg_space.c rmixl_pcix | rmixl_pcie file arch/mips/rmi/rmixl_pci_ecfg_space.c rmixl_pcie file arch/mips/rmi/rmixl_pci_io_space.c rmixl_pcix | rmixl_pcie file arch/mips/rmi/rmixl_pci_mem_space.c rmixl_pcix | rmixl_pcie d21 2 a22 2 attach com at obio with com_rmixl file arch/mips/rmi/rmixl_com.c com_rmixl d25 1 a25 1 # PCIe d28 1 a28 20 file arch/mips/rmi/rmixl_pcie.c rmixl_pcie needs-flag # PCI-X device rmixl_pcix: pcibus attach rmixl_pcix at obio file arch/mips/rmi/rmixl_pcix.c rmixl_pcix needs-flag # On-chip USB interface define rmixl_usbi { [addr=-1], [size=-1], [intr=-1] } device rmixl_usbi: rmixl_usbi attach rmixl_usbi at obio file arch/mips/rmi/rmixl_usbi.c rmixl_usbi # On-chip OHCI USB controller attach ohci at rmixl_usbi with rmixl_ohci file arch/mips/rmi/rmixl_ohci.c ohci # On-chip EHCI USB controller attach ehci at rmixl_usbi with rmixl_ehci file arch/mips/rmi/rmixl_ehci.c ehci @ 1.2.4.1 log @file files.rmixl was added on branch yamt-nfs-mp on 2010-03-11 15:02:38 +0000 @ text @d1 29 @ 1.2.4.2 log @sync with head @ text @a0 29 # $NetBSD$ # # Configuration info for RMI XLP, XLR, XLS # file arch/mips/rmi/rmixl_intr.c file arch/mips/rmi/rmixl_subr.S # OBIO: offsets are from System Bridge Controller base define obio { [addr=-1], [size=0], [intr=-1], [mult=1] } device obio: obio attach obio at mainbus file arch/mips/rmi/rmixl_obio.c obio needs-count file arch/mips/rmi/rmixl_obio_space.c obio file arch/mips/rmi/rmixl_pcie_cfg_space.c pci file arch/mips/rmi/rmixl_pcie_ecfg_space.c pci file arch/mips/rmi/rmixl_pcie_io_space.c pci file arch/mips/rmi/rmixl_pcie_mem_space.c pci # NS16550 compatible serial ports attach com at obio with rmixl_com file arch/mips/rmi/rmixl_com.c rmixl_com defparam opt_com.h CONSADDR CONSFREQ CONSPEED CONMODE # PCI device rmixl_pcie: pcibus attach rmixl_pcie at obio file arch/mips/rmi/rmixl_pcie.c rmixl_pcie @ 1.1 log @file files.rmixl was initially added on branch matt-nb5-mips64. @ text @d1 29 @ 1.1.2.1 log @add netbsd support for RMI XLS6ATX_7A board and XL SoC family @ text @a0 19 # $NetBSD$ # # Configuration info for RMI XLP, XLR, XLS # file arch/mips/rmi/rmixl_intr.c # OBIO: offsets are from System Bridge Controller base define obio { [addr=-1], [size=0], [intr=-1], [mult=1] } device obio: obio, pcibus attach obio at mainbus file arch/mips/rmi/rmixl_obio.c obio needs-count file arch/mips/rmi/rmixl_obio_space.c obio # NS16550 compatible serial ports attach com at obio with rmixl_com file arch/mips/rmi/rmixl_com.c rmixl_com defparam opt_com.h CONSADDR CONSPEED CONMODE @ 1.1.2.2 log @obio now provides both big endian and little endian bus spaces to allow child devices to use according to access method needs also preparing for dual bus_dma methods, one for addrs <4GB, the other for all memory, including addrs >= 4GB the bulk of XLS DMA work is still TBD @ text @d1 1 a1 1 # $NetBSD: files.rmixl,v 1.1.2.1 2009/09/13 03:27:38 cliff Exp $ d13 1 a13 2 file arch/mips/rmi/rmixl_el_space.c obio file arch/mips/rmi/rmixl_eb_space.c obio @ 1.1.2.3 log @add CONSFREQ to opt_com.h options @ text @d1 1 a1 1 # $NetBSD: files.rmixl,v 1.1.2.2 2009/09/15 02:32:01 cliff Exp $ d19 1 a19 1 defparam opt_com.h CONSADDR CONSFREQ CONSPEED CONMODE @ 1.1.2.4 log @- configure MD PCI stuff: pci attches to rmixl_pcie attaches to obio - configure file arch/mips/rmi/rmixls_subr.S THIS IS TEMPORARY and should not be needed once we have mtcp/mfcp, and a better place for the xkseg &etc addrs @ text @d1 1 a1 1 # $NetBSD: files.rmixl,v 1.1.2.3 2009/09/22 06:58:20 cliff Exp $ a6 1 file arch/mips/rmi/rmixls_subr.S d10 1 a10 1 device obio: obio a14 2 file arch/mips/rmi/rmixl_pcie_io_space.c pci file arch/mips/rmi/rmixl_pcie_mem_space.c pci a20 5 # PCI device rmixl_pcie: pcibus attach rmixl_pcie at obio file arch/mips/rmi/rmixl_pcie.c rmixl_pcie @ 1.1.2.5 log @- rmixls_subr.S is replaced by rmixl_subr.S @ text @d1 1 a1 1 # $NetBSD: files.rmixl,v 1.1.2.4 2009/11/09 09:56:06 cliff Exp $ d7 1 a7 1 file arch/mips/rmi/rmixl_subr.S @ 1.1.2.6 log @- we don't need -el bus space for obio, get rid of it and clean up the naming - delete rmixl_eb_space.c, rmixl_el_space.c - add mixl_obio_space.c, provides -eb bus space for obio devices @ text @d1 1 a1 1 # $NetBSD: files.rmixl,v 1.1.2.5 2009/11/14 21:59:15 cliff Exp $ d14 2 a15 3 file arch/mips/rmi/rmixl_obio_space.c obio file arch/mips/rmi/rmixl_pcie_cfg_space.c pci file arch/mips/rmi/rmixl_pcie_ecfg_space.c pci @ 1.1.2.7 log @- replace single bus space with two (big & little endian) bus spaces for obio - configure RMI XLx USB Interface driver rmixl_usbi - attach ohci at rmixl_usbi - attach ehci at rmixl_usbi @ text @d1 1 a1 1 # $NetBSD: files.rmixl,v 1.1.2.6 2009/11/15 22:58:15 cliff Exp $ d14 1 a14 2 file arch/mips/rmi/rmixl_obio_eb_space.c obio file arch/mips/rmi/rmixl_obio_el_space.c obio a29 14 # On-chip USB interface define rmixl_usbi { [addr=-1], [size=-1], [intr=-1] } device rmixl_usbi: rmixl_usbi attach rmixl_usbi at obio file arch/mips/rmi/rmixl_usbi.c rmixl_usbi # On-chip OHCI USB controller attach ohci at rmixl_usbi with rmixl_ohci file arch/mips/rmi/rmixl_ohci.c ohci # On-chip EHCI USB controller attach ehci at rmixl_usbi with rmixl_ehci file arch/mips/rmi/rmixl_ehci.c ehci @ 1.1.2.8 log @- cpucore and cpu config info moved here from to arch/evbmips/conf/files.rmixl - obio now attaches to cpunode instead of mainbus @ text @d1 1 a1 1 # $NetBSD: files.rmixl,v 1.1.2.7 2009/12/14 07:23:07 cliff Exp $ a8 16 # node is parent of one or more core device cpunode { [ core = -1] } attach cpunode at mainbus file arch/mips/rmi/rmixl_cpunode.c cpunode # core is parent of one or more cpu device cpucore { [ thread = -1] } attach cpucore at cpunode file arch/mips/rmi/rmixl_cpucore.c cpucore # each cpu is a RMI 'thread' or 'vCPU' device cpu attach cpu at cpucore file arch/mips/rmi/rmixl_cpu.c cpu d12 1 a12 1 attach obio at cpunode @ 1.1.2.9 log @cleanup attachments so that other mips cpus can use the same scheme. @ text @d1 1 a1 1 # $NetBSD: files.rmixl,v 1.1.2.8 2010/01/16 23:50:04 cliff Exp $ d12 2 a13 2 attach cpunode at mainbus with cpunode_rmixl file arch/mips/rmi/rmixl_cpunode.c cpunode_rmixl d17 2 a18 2 attach cpucore at cpunode with cpucore_rmixl file arch/mips/rmi/rmixl_cpucore.c cpucore_rmixl d22 2 a23 2 attach cpu at cpucore with cpu_rmixl file arch/mips/rmi/rmixl_cpu.c cpu_rmixl d28 4 a31 4 attach obio at cpunode with obio_rmixl file arch/mips/rmi/rmixl_obio.c obio_rmixl file arch/mips/rmi/rmixl_obio_eb_space.c obio_rmixl file arch/mips/rmi/rmixl_obio_el_space.c obio_rmixl d38 2 a39 2 attach com at obio with com_rmixl file arch/mips/rmi/rmixl_com.c com_rmixl @ 1.1.2.10 log @- add files rmixl_spl.S, rmixl_fmn.c - add 'tmsk' locator to obio, allows specifying a thread (vCPU) mask for interrupt routing; default is -1 which means route to any @ text @d1 1 a1 1 # $NetBSD: files.rmixl,v 1.1.2.9 2010/01/20 20:48:12 matt Exp $ a5 1 file arch/mips/rmi/rmixl_spl.S a7 1 file arch/mips/rmi/rmixl_fmn.c d26 1 a26 1 define obio { [addr=-1], [size=0], [intr=-1], [tmsk=-1], [mult=1] } @ 1.1.2.11 log @- configure XLR PCI-X interface - this config can be used on XLS or XLR chip systems @ text @d1 1 a1 1 # $NetBSD: files.rmixl,v 1.1.2.10 2010/03/21 21:21:41 cliff Exp $ d34 4 a37 4 file arch/mips/rmi/rmixl_pcie_cfg_space.c rmixl_pcix | rmixl_pcie file arch/mips/rmi/rmixl_pcie_ecfg_space.c rmixl_pcie file arch/mips/rmi/rmixl_pcie_io_space.c rmixl_pcix | rmixl_pcie file arch/mips/rmi/rmixl_pcie_mem_space.c rmixl_pcix | rmixl_pcie d44 1 a44 1 # PCIe a48 5 # PCI-X device rmixl_pcix: pcibus attach rmixl_pcix at obio file arch/mips/rmi/rmixl_pcix.c rmixl_pcix @ 1.1.2.12 log @- rmixl_pcix and rmixl_pcie get 'needs-flag' @ text @d1 1 a1 1 # $NetBSD: files.rmixl,v 1.1.2.11 2010/04/07 19:31:37 cliff Exp $ d47 1 a47 1 file arch/mips/rmi/rmixl_pcie.c rmixl_pcie needs-flag d52 1 a52 1 file arch/mips/rmi/rmixl_pcix.c rmixl_pcix needs-flag @ 1.1.2.13 log @- rename "pcie" bus space files to "pci" to reflect common use by either pcie or pcix, depending on RMI chip type. @ text @d1 1 a1 1 # $NetBSD: files.rmixl,v 1.1.2.12 2010/04/12 22:00:51 cliff Exp $ d34 4 a37 4 file arch/mips/rmi/rmixl_pci_cfg_space.c rmixl_pcix | rmixl_pcie file arch/mips/rmi/rmixl_pci_ecfg_space.c rmixl_pcie file arch/mips/rmi/rmixl_pci_io_space.c rmixl_pcix | rmixl_pcie file arch/mips/rmi/rmixl_pci_mem_space.c rmixl_pcix | rmixl_pcie @ 1.1.2.14 log @Add XLP support (i2c, console, pci, sdhc works). @ text @d1 1 a1 1 # $NetBSD: files.rmixl,v 1.1.2.13 2010/04/17 07:49:23 cliff Exp $ d28 1 a28 1 define obio { [addr=-1], [size=0], [intr=-1], [mult=1] } d34 4 a37 6 file arch/mips/rmi/rmixl_pci_cfg_eb_space.c rmixlp_pcie file arch/mips/rmi/rmixl_pci_cfg_el_space.c rmixl_pcix | rmixl_pcie file arch/mips/rmi/rmixl_pci_ecfg_eb_space.c rmixlp_pcie file arch/mips/rmi/rmixl_pci_ecfg_el_space.c rmixl_pcie | rmixlp_pcie file arch/mips/rmi/rmixl_pci_io_space.c rmixl_pcix | rmixl_pcie | rmixlp_pcie file arch/mips/rmi/rmixl_pci_mem_space.c rmixl_pcix | rmixl_pcie | rmixlp_pcie a40 2 attach com at pci with com_pci file arch/mips/rmi/com_pci.c com_pci d46 1 a46 1 attach rmixl_pcie at obio # XLS a48 4 device rmixlp_pcie: pcibus attach rmixlp_pcie at mainbus # XLP file arch/mips/rmi/rmixlp_pcie.c rmixlp_pcie needs-flag d51 1 a51 1 attach rmixl_pcix at obio # XLR d62 1 a62 1 file arch/mips/rmi/rmixl_ohci.c rmixl_ohci d66 1 a66 1 file arch/mips/rmi/rmixl_ehci.c rmixl_ehci a67 24 # PCI SDHC controller device xlsdio { [slot=-1] } attach xlsdio at pci attach sdhc at xlsdio with sdhc_xlsdio file arch/mips/rmi/rmixl_sdio.c xlsdio file arch/mips/rmi/rmixl_sdhc.c sdhc_xlsdio # XL NAE controller device xlnae { [port=-1] } attach xlnae at obio with xlnae_obio attach xlnae at pci with xlnae_pci device nae: ether, ifnet, arp, mii attach nae at xlnae file arch/mips/rmi/rmixl_xlnae_obio.c xlnae_obio file arch/mips/rmi/rmixl_xlnae_pci.c xlnae_pci file arch/mips/rmi/rmixl_xlnae.c xlnae file arch/mips/rmi/rmixl_nae.c nae # XL I2C controller device xli2c: i2cbus attach xli2c at obio with xli2c_obio attach xli2c at pci with xli2c_pci file arch/mips/rmi/rmixl_i2c_obio.c xli2c_obio file arch/mips/rmi/rmixl_i2c_pci.c xli2c_pci @ 1.1.2.15 log @Add NOR/NAND (from HEAD)/SPI attachments. @ text @d1 1 a1 1 # $NetBSD: files.rmixl,v 1.1.2.14 2011/12/24 01:57:53 matt Exp $ a61 30 # XLS/XLR Periperal IO Bus to NOR, NAND, and PCMCIA memory controllers define xliobus { [cs=-1], [addr=-1], [size=-1], [intr=-1] } device xliobus: xliobus attach xliobus at obio with xliobus_obio file arch/mips/rmi/rmixl_iobus_space.c xliobus_obio file arch/mips/rmi/rmixl_iobus.c xliobus_obio # NAND flash controller device xlnand: nandbus attach xlnand at xliobus with xlnand_iobus attach xlnand at pci with xlnand_pci file arch/mips/rmi/rmixl_nand_iobus.c xlnand_iobus file arch/mips/rmi/rmixl_nand_pci.c xlnand_pci # NOR controller (XLP equiv of xliobus but for NOR only). device xlnor { [cs=-1] } attach xlnor at pci with xlnor_pci file arch/mips/rmi/rmixl_nor_pci.c xlnor_pci device cfi: norbus attach cfi at xliobus with cfi_iobus attach cfi at xlnor with cfi_xlnor file arch/mips/rmi/rmixl_cfi_iobus.c cfi_iobus file arch/mips/rmi/rmixl_cfi_xlnor.c cfi_xlnor # PCMCIA controller device xlpcic: pcmciabus attach xlpcic at xliobus file arch/mips/rmi/rmixl_pcic.c xlpcic a99 5 # XL SPI controller device xlspi: spibus attach xlspi at pci with xlspi_pci file arch/mips/rmi/rmixl_spi_pci.c xlspi_pci @ 1.1.2.16 log @Add NOR support for XLP. @ text @d1 1 a1 1 # $NetBSD: files.rmixl,v 1.1.2.15 2011/12/27 19:58:18 matt Exp $ a79 2 file arch/mips/rmi/rmixl_flash_eb_space.c xlnor_pci file arch/mips/rmi/rmixl_flash_el_space.c xlnor_pci @ 1.1.2.17 log @Change devices name from rmixl_* to xl*. @ text @d1 1 a1 1 # $NetBSD: files.rmixl,v 1.1.2.16 2011/12/28 05:36:10 matt Exp $ d49 2 a50 3 device xlpcie: pcibus attach xlpcie at obio with rmixl_pcie # XLS attach xlpcie at mainbus with rmixlp_pcie # XLP d52 3 d58 2 a59 2 device xlpcix: pcibus attach xlpcix at obio with rmixl_pcix # XLR d95 3 a97 3 define xlusbi { [addr=-1], [size=-1], [intr=-1] } device xlusbi: xlusbi attach xlusbi at obio with rmixl_usbi d101 1 a101 1 attach ohci at xlusbi with rmixl_ohci d105 1 a105 1 attach ehci at xlusbi with rmixl_ehci a136 5 # XL GPIO controller device xlgpio: gpiobus attach xlgpio at pci with xlgpio_pci file arch/mips/rmi/rmixl_gpio_pci.c xlgpio_pci @ 1.1.2.18 log @Rework Fast Messaging Network support (it's now lockless). Workaround a problem with bus 0 BAR sizing causing the registers behind the BAR to become inaccessible. Move much/most of the startup code from evbmips/rmixl/machdep to mips/rmi/rmixl_machdep.c Move the code to find the XLP variant to the early boot so it can be used early. 8bit and 16bit accessed to PCI bus 0 cause cache errors so chagne the access of pci mem to 32bits. @ text @d1 1 a1 1 # $NetBSD: files.rmixl,v 1.1.2.17 2011/12/30 06:43:39 matt Exp $ d6 1 a6 1 file arch/mips/rmi/rmixl_fmn.c a7 2 file arch/mips/rmi/rmixl_machdep.c file arch/mips/rmi/rmixl_spl.S d9 1 d39 1 a39 2 file arch/mips/rmi/rmixl_pci_el_mem_space.c rmixl_pcix | rmixl_pcie | rmixlp_pcie file arch/mips/rmi/rmixl_pci_eb_mem_space.c rmixlp_pcie d67 1 a67 1 # XL NAND flash controller d106 1 a106 1 # XL PCI SDHC controller d113 1 a113 1 # XL Network Acceleration Engine a123 43 # XL Fast Messaging Network device xlfmn attach xlfmn at obio with xlfmn_obio attach xlfmn at pci with xlfmn_pci file arch/mips/rmi/rmixl_xlfmn_obio.c xlfmn_obio file arch/mips/rmi/rmixl_xlfmn_pci.c xlfmn_pci # XL Packet Ordering Engine device xlpoe attach xlpoe at pci with xlpoe_pci file arch/mips/rmi/rmixl_xlpoe_pci.c xlpoe_pci # XL Compression/Decompression Engine device xlcde attach xlcde at obio with xlcde_obio attach xlcde at pci with xlcde_pci file arch/mips/rmi/rmixl_xlcde_obio.c xlcde_obio file arch/mips/rmi/rmixl_xlcde_pci.c xlcde_pci # XL Security Acceleration Engine (AES/etc.) device xlsae attach xlsae at obio with xlsae_obio attach xlsae at pci with xlsae_pci file arch/mips/rmi/rmixl_xlsae_obio.c xlsae_obio file arch/mips/rmi/rmixl_xlsae_pci.c xlsae_pci # XL Public Key Engine (RSA/ECC) device xlpke attach xlpke at pci with xlpke_pci file arch/mips/rmi/rmixl_xlpke_pci.c xlpke_pci # XL Regular eXpression Engine device xlrxe attach xlrxe at pci with xlrxe_pci file arch/mips/rmi/rmixl_xlrxe_pci.c xlrxe_pci # XL Serial Rapid IO controller device xlsrio attach xlsrio at obio with xlsrio_obio attach xlsrio at pci with xlsrio_pci file arch/mips/rmi/rmixl_xlsrio_obio.c xlsrio_obio file arch/mips/rmi/rmixl_xlsrio_pci.c xlsrio_pci @ 1.1.2.19 log @Cleanup/update attachments. @ text @d1 1 a1 1 # $NetBSD: files.rmixl,v 1.1.2.18 2012/01/04 16:17:53 matt Exp $ d116 1 a116 1 device xlnae { [complex=-1], [lane=-1], [kind=-1], [phy=-1] } d120 1 a120 1 attach nae at xlnae with nae_gmac d124 1 a124 1 file arch/mips/rmi/rmixl_nae.c nae_gmac d130 2 a131 2 file arch/mips/rmi/rmixl_fmn_obio.c xlfmn_obio file arch/mips/rmi/rmixl_fmn_pci.c xlfmn_pci d136 1 a136 1 file arch/mips/rmi/rmixl_poe_pci.c xlpoe_pci d142 2 a143 2 file arch/mips/rmi/rmixl_cde_obio.c xlcde_obio file arch/mips/rmi/rmixl_cde_pci.c xlcde_pci d149 2 a150 2 file arch/mips/rmi/rmixl_sae_obio.c xlsae_obio file arch/mips/rmi/rmixl_sae_pci.c xlsae_pci d155 1 a155 1 file arch/mips/rmi/rmixl_pke_pci.c xlpke_pci d160 1 a160 1 file arch/mips/rmi/rmixl_rxe_pci.c xlrxe_pci d166 2 a167 2 file arch/mips/rmi/rmixl_srio_obio.c xlsrio_obio file arch/mips/rmi/rmixl_srio_pci.c xlsrio_pci @ 1.1.2.20 log @Add XLP2XX support. @ text @d1 1 a1 1 # $NetBSD: files.rmixl,v 1.1.2.19 2012/01/19 17:37:15 matt Exp $ a55 1 file arch/mips/rmi/rmixl_pcie_subr.c rmixl_pcie | rmixlp_pcie @