head 1.2; access; symbols netbsd-11-0-RC4:1.2 netbsd-11-0-RC3:1.2 netbsd-11-0-RC2:1.2 netbsd-11-0-RC1:1.2 perseant-exfatfs-base-20250801:1.2 netbsd-11:1.2.0.34 netbsd-11-base:1.2 netbsd-10-1-RELEASE:1.2 perseant-exfatfs-base-20240630:1.2 perseant-exfatfs:1.2.0.32 perseant-exfatfs-base:1.2 netbsd-8-3-RELEASE:1.1 netbsd-9-4-RELEASE:1.1.70.1 netbsd-10-0-RELEASE:1.2 netbsd-10-0-RC6:1.2 netbsd-10-0-RC5:1.2 netbsd-10-0-RC4:1.2 netbsd-10-0-RC3:1.2 netbsd-10-0-RC2:1.2 thorpej-ifq:1.2.0.30 thorpej-ifq-base:1.2 thorpej-altq-separation:1.2.0.28 thorpej-altq-separation-base:1.2 netbsd-10-0-RC1:1.2 netbsd-10:1.2.0.26 netbsd-10-base:1.2 bouyer-sunxi-drm:1.2.0.24 bouyer-sunxi-drm-base:1.2 netbsd-9-3-RELEASE:1.1.70.1 thorpej-i2c-spi-conf2:1.2.0.22 thorpej-i2c-spi-conf2-base:1.2 thorpej-futex2:1.2.0.20 thorpej-futex2-base:1.2 thorpej-cfargs2:1.2.0.18 thorpej-cfargs2-base:1.2 cjep_sun2x-base1:1.2 cjep_sun2x:1.2.0.16 cjep_sun2x-base:1.2 cjep_staticlib_x-base1:1.2 netbsd-9-2-RELEASE:1.1.70.1 cjep_staticlib_x:1.2.0.14 cjep_staticlib_x-base:1.2 thorpej-i2c-spi-conf:1.2.0.12 thorpej-i2c-spi-conf-base:1.2 thorpej-cfargs:1.2.0.10 thorpej-cfargs-base:1.2 thorpej-futex:1.2.0.8 thorpej-futex-base:1.2 netbsd-9-1-RELEASE:1.1.70.1 bouyer-xenpvh-base2:1.2 phil-wifi-20200421:1.2 bouyer-xenpvh-base1:1.2 phil-wifi-20200411:1.2 bouyer-xenpvh:1.2.0.6 bouyer-xenpvh-base:1.2 is-mlppp:1.2.0.4 is-mlppp-base:1.2 phil-wifi-20200406:1.2 netbsd-8-2-RELEASE:1.1 ad-namecache-base3:1.2 netbsd-9-0-RELEASE:1.1.70.1 netbsd-9-0-RC2:1.1.70.1 ad-namecache-base2:1.2 ad-namecache-base1:1.2 ad-namecache:1.2.0.2 ad-namecache-base:1.2 netbsd-9-0-RC1:1.1 phil-wifi-20191119:1.1 netbsd-9:1.1.0.70 netbsd-9-base:1.1 phil-wifi-20190609:1.1 netbsd-8-1-RELEASE:1.1 netbsd-8-1-RC1:1.1 isaki-audio2:1.1.0.68 isaki-audio2-base:1.1 pgoyette-compat-merge-20190127:1.1 pgoyette-compat-20190127:1.1 pgoyette-compat-20190118:1.1 pgoyette-compat-1226:1.1 pgoyette-compat-1126:1.1 pgoyette-compat-1020:1.1 pgoyette-compat-0930:1.1 pgoyette-compat-0906:1.1 netbsd-7-2-RELEASE:1.1 pgoyette-compat-0728:1.1 netbsd-8-0-RELEASE:1.1 phil-wifi:1.1.0.66 phil-wifi-base:1.1 pgoyette-compat-0625:1.1 netbsd-8-0-RC2:1.1 pgoyette-compat-0521:1.1 pgoyette-compat-0502:1.1 pgoyette-compat-0422:1.1 netbsd-8-0-RC1:1.1 pgoyette-compat-0415:1.1 pgoyette-compat-0407:1.1 pgoyette-compat-0330:1.1 pgoyette-compat-0322:1.1 pgoyette-compat-0315:1.1 netbsd-7-1-2-RELEASE:1.1 pgoyette-compat:1.1.0.64 pgoyette-compat-base:1.1 netbsd-7-1-1-RELEASE:1.1 tls-maxphys-base-20171202:1.1 matt-nb8-mediatek:1.1.0.62 matt-nb8-mediatek-base:1.1 nick-nhusb-base-20170825:1.1 perseant-stdc-iso10646:1.1.0.60 perseant-stdc-iso10646-base:1.1 netbsd-8:1.1.0.58 netbsd-8-base:1.1 prg-localcount2-base3:1.1 prg-localcount2-base2:1.1 prg-localcount2-base1:1.1 prg-localcount2:1.1.0.56 prg-localcount2-base:1.1 pgoyette-localcount-20170426:1.1 bouyer-socketcan-base1:1.1 jdolecek-ncq:1.1.0.54 jdolecek-ncq-base:1.1 pgoyette-localcount-20170320:1.1 netbsd-7-1:1.1.0.52 netbsd-7-1-RELEASE:1.1 netbsd-7-1-RC2:1.1 nick-nhusb-base-20170204:1.1 netbsd-7-nhusb-base-20170116:1.1 bouyer-socketcan:1.1.0.50 bouyer-socketcan-base:1.1 pgoyette-localcount-20170107:1.1 netbsd-7-1-RC1:1.1 nick-nhusb-base-20161204:1.1 pgoyette-localcount-20161104:1.1 netbsd-7-0-2-RELEASE:1.1 nick-nhusb-base-20161004:1.1 localcount-20160914:1.1 netbsd-7-nhusb:1.1.0.48 netbsd-7-nhusb-base:1.1 pgoyette-localcount-20160806:1.1 pgoyette-localcount-20160726:1.1 pgoyette-localcount:1.1.0.46 pgoyette-localcount-base:1.1 nick-nhusb-base-20160907:1.1 nick-nhusb-base-20160529:1.1 netbsd-7-0-1-RELEASE:1.1 nick-nhusb-base-20160422:1.1 nick-nhusb-base-20160319:1.1 nick-nhusb-base-20151226:1.1 netbsd-7-0:1.1.0.44 netbsd-7-0-RELEASE:1.1 nick-nhusb-base-20150921:1.1 netbsd-7-0-RC3:1.1 netbsd-7-0-RC2:1.1 netbsd-7-0-RC1:1.1 nick-nhusb-base-20150606:1.1 nick-nhusb-base-20150406:1.1 nick-nhusb:1.1.0.42 nick-nhusb-base:1.1 netbsd-6-0-6-RELEASE:1.1 netbsd-6-1-5-RELEASE:1.1 netbsd-7:1.1.0.40 netbsd-7-base:1.1 yamt-pagecache-base9:1.1 yamt-pagecache-tag8:1.1 netbsd-6-1-4-RELEASE:1.1 netbsd-6-0-5-RELEASE:1.1 tls-earlyentropy:1.1.0.38 tls-earlyentropy-base:1.1 riastradh-xf86-video-intel-2-7-1-pre-2-21-15:1.1 riastradh-drm2-base3:1.1 netbsd-6-1-3-RELEASE:1.1 netbsd-6-0-4-RELEASE:1.1 netbsd-6-1-2-RELEASE:1.1 netbsd-6-0-3-RELEASE:1.1 rmind-smpnet-nbase:1.1 netbsd-6-1-1-RELEASE:1.1 riastradh-drm2-base2:1.1 riastradh-drm2-base1:1.1 riastradh-drm2:1.1.0.36 riastradh-drm2-base:1.1 rmind-smpnet:1.1.0.28 rmind-smpnet-base:1.1 netbsd-6-1:1.1.0.34 netbsd-6-0-2-RELEASE:1.1 netbsd-6-1-RELEASE:1.1 khorben-n900:1.1.0.32 netbsd-6-1-RC4:1.1 netbsd-6-1-RC3:1.1 agc-symver:1.1.0.30 agc-symver-base:1.1 netbsd-6-1-RC2:1.1 netbsd-6-1-RC1:1.1 yamt-pagecache-base8:1.1 netbsd-6-0-1-RELEASE:1.1 yamt-pagecache-base7:1.1 matt-nb6-plus-nbase:1.1 yamt-pagecache-base6:1.1 netbsd-6-0:1.1.0.26 netbsd-6-0-RELEASE:1.1 netbsd-6-0-RC2:1.1 tls-maxphys:1.1.0.24 tls-maxphys-base:1.1 matt-nb6-plus:1.1.0.22 matt-nb6-plus-base:1.1 netbsd-6-0-RC1:1.1 jmcneill-usbmp-base10:1.1 yamt-pagecache-base5:1.1 jmcneill-usbmp-base9:1.1 yamt-pagecache-base4:1.1 jmcneill-usbmp-base8:1.1 jmcneill-usbmp-base7:1.1 jmcneill-usbmp-base6:1.1 jmcneill-usbmp-base5:1.1 jmcneill-usbmp-base4:1.1 jmcneill-usbmp-base3:1.1 jmcneill-usbmp-pre-base2:1.1 jmcneill-usbmp-base2:1.1 netbsd-6:1.1.0.20 netbsd-6-base:1.1 jmcneill-usbmp:1.1.0.18 jmcneill-usbmp-base:1.1 jmcneill-audiomp3:1.1.0.16 jmcneill-audiomp3-base:1.1 yamt-pagecache-base3:1.1 yamt-pagecache-base2:1.1 yamt-pagecache:1.1.0.14 yamt-pagecache-base:1.1 rmind-uvmplock-nbase:1.1 cherry-xenmp:1.1.0.12 cherry-xenmp-base:1.1 jym-xensuspend-nbase:1.1 uebayasi-xip-base7:1.1 bouyer-quota2-nbase:1.1 bouyer-quota2:1.1.0.10 bouyer-quota2-base:1.1 jruoho-x86intr:1.1.0.8 jruoho-x86intr-base:1.1 matt-mips64-premerge-20101231:1.1 uebayasi-xip-base6:1.1 uebayasi-xip-base5:1.1 uebayasi-xip-base4:1.1 jym-xensuspend-base:1.1 uebayasi-xip-base3:1.1 yamt-nfs-mp-base11:1.1 uebayasi-xip-base2:1.1 yamt-nfs-mp:1.1.0.6 yamt-nfs-mp-base10:1.1 rmind-uvmplock-base:1.1 rmind-uvmplock:1.1.0.4 uebayasi-xip:1.1.0.2 uebayasi-xip-base1:1.1; locks; strict; comment @;; @; 1.2 date 2019.12.15.16.48.25; author tsutsui; state Exp; branches; next 1.1; commitid iYco3wt0pd8t7POB; 1.1 date 2010.04.06.16.20.28; author nonaka; state Exp; branches 1.1.2.1 1.1.4.1 1.1.6.1 1.1.66.1 1.1.70.1; next ; 1.1.2.1 date 2010.04.06.16.20.28; author uebayasi; state dead; branches; next 1.1.2.2; 1.1.2.2 date 2010.04.30.14.39.24; author uebayasi; state Exp; branches; next ; 1.1.4.1 date 2010.04.06.16.20.28; author rmind; state dead; branches; next 1.1.4.2; 1.1.4.2 date 2010.05.30.05.16.50; author rmind; state Exp; branches; next ; 1.1.6.1 date 2010.04.06.16.20.28; author yamt; state dead; branches; next 1.1.6.2; 1.1.6.2 date 2010.08.11.22.52.04; author yamt; state Exp; branches; next ; 1.1.66.1 date 2020.04.08.14.07.38; author martin; state Exp; branches; next ; commitid Qli2aW9E74UFuA3C; 1.1.70.1 date 2019.12.18.20.04.33; author martin; state Exp; branches; next ; commitid D4AzN7y6jrPK6ePB; desc @@ 1.2 log @Remove clause 3 and 4 leftovers from TNF licenses in more sources. Confirmed by martin@@ in PR/54760. @ text @; $NetBSD: arm_pxa2x0_asm.asm,v 1.1 2010/04/06 16:20:28 nonaka Exp $ ; ; Copyright (c) 2001 The NetBSD Foundation, Inc. ; All rights reserved. ; ; This code is derived from software contributed to The NetBSD Foundation ; by UCHIYAMA Yasushi. ; ; Redistribution and use in source and binary forms, with or without ; modification, are permitted provided that the following conditions ; are met: ; 1. Redistributions of source code must retain the above copyright ; notice, this list of conditions and the following disclaimer. ; 2. Redistributions in binary form must reproduce the above copyright ; notice, this list of conditions and the following disclaimer in the ; documentation and/or other materials provided with the distribution. ; ; THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS ; ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED ; TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR ; PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS ; BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR ; CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF ; SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS ; INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN ; CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ; ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE ; POSSIBILITY OF SUCH DAMAGE. ; AREA |.text|, CODE, PIC ; ;armasm.exe $(InputPath) ;arm.obj ; ; FlatJump_pxa2x0 (kaddr_t bootinfo, kaddr_t pvec, kaddr_t stack ; kaddr_t jump) ; bootinfo boot information block address. ; pvec page vector of kernel. ; stack physical address of stack ; jump physical address of boot function EXPORT |FlatJump_pxa2x0| |FlatJump_pxa2x0| PROC ; disable interrupt mrs r4, cpsr orr r4, r4, #0xc0 msr cpsr, r4 ; Invalidate I/D-cache. mcr p15, 0, r4, c7, c7, 0 mov r4, r4 sub pc, pc, #4 ; disable MMU, I/D-Cache, Writebuffer. ; interrupt vector address is 0xffff0000 ; 32bit exception handler/address range. ldr r4, [pc, #20] ; Disable WB/Cache/MMU mcr p15, 0, r4, c1, c0, 0 ; Invalidate TLB entries. mcr p15, 0, r4, c8, c7, 0 mov r4, r4 ; wait for it to complete sub pc, pc, #4 ; branch to next insn mov pc, r3 ; NOTREACHED mov pc, lr DCD 0x00002030 ENDP ; |FlatJump_pxa2x0| ; ; UART test ; ; boot_func (uint32_t mapaddr, uint32_t bootinfo, uint32_t flags) ; EXPORT |boot_func_pxa2x0| |boot_func_pxa2x0| PROC nop ; cop15 hazard nop ; cop15 hazard nop ; cop15 hazard mov sp, r2 ; set bootloader stack bl boot_pxa2x0 nop ; NOTREACHED nop ENDP ; |boot_func_pxa2x0| EXPORT |boot_pxa2x0| |boot_pxa2x0| PROC mov r4, r0 mov r5, r1 ; ; UART test code ; ; ; print boot_info address (r0) and page_vector start address (r1). ; mov r0, #'I' ; bl btputc ; mov r0, r4 ; bl hexdump ; mov r0, #'P' ; bl btputc ; mov r0, r5 ; bl hexdump mov r7, r4 mov r2, r5 ; start |page_loop| mvn r0, #0 ; ~0 cmp r2, r0 beq |page_end| ; if (next == ~0) goto page_end mov r1, r2 ; p = next ldr r2, [r1] ; next ldr r3, [r1, #4] ; src ldr r4, [r1, #8] ; dst ldr r5, [r1, #12] ; sz bic r4, r4, #0xff000000 orr r4, r4, #0xa0000000 cmp r3, r0 add r6, r4, r5 ; end address bne |page_memcpy4| ; if (src != ~0) goto page_memcpy4 mov r0, #0 |page_memset| ; memset (dst, 0, sz) uncached. str r0, [r4], #4 cmp r4, r6 blt |page_memset| b |page_loop| |page_memcpy4| ; memcpy (dst, src, sz) uncached. ldr r0, [r3], #4 ldr r5, [r3], #4 str r0, [r4], #4 cmp r4, r6 strlt r5, [r4], #4 cmplt r4, r6 blt |page_memcpy4| b |page_loop| |page_end| ; ; jump to kernel ; ; mov r0, #'E' ; bl btputc ; ldr r0, [r7] ; bl hexdump ; set stack pointer mov r5, #4096 add r6, r6, #8192 sub r5, r5, #1 bic sp, r6, r5 ; set bootargs ldr r4, [r7] ldr r0, [r7, #4] ldr r1, [r7, #8] ldr r2, [r7, #12] bic r4, r4, #0xff000000 orr r4, r4, #0xa0000000 mov pc, r4 ; NOTREACHED |infinite_loop| nop nop nop nop nop b |infinite_loop| ENDP ; |boot| |btputc| PROC adr r1, |$UARTTXBSY| ldr r1, [r1] |btputc_busy| ldr r2, [r1] ands r2, r2, #0x20 beq |btputc_busy| adr r1, |$UARTTXADR| ldr r1, [r1] str r0, [r1] adr r1, |$UARTINTR| ldr r1, [r1] mov pc, lr ENDP ;|btputc| |hexdump| PROC stmfd sp!, {r4-r5, lr} mov r4, r0 mov r0, #0x30 bl btputc mov r0, #0x78 bl btputc mov r0, r4 ; Transmit register address adr r1, |$UARTTXADR| ldr r1, [r1] ; Transmit busy register address adr r2, |$UARTTXBSY| ldr r2, [r2] mov r5, #8 |hex_loop| mov r3, r0, LSR #28 cmp r3, #9 addgt r3, r3, #0x41 - 10 addle r3, r3, #0x30 |hex_busyloop| ldr r4, [r2] ands r4, r4, #0x20 beq |hex_busyloop| str r3, [r1] adr r4, |$UARTINTR| ldr r4, [r4] mov r0, r0, LSL #4 subs r5, r5, #1 bne |hex_loop| mov r0, #0x0d bl btputc mov r0, #0x0a bl btputc ldmfd sp!, {r4-r5, pc} ENDP ;|hexdump| ; FFUART |$UARTTXADR| DCD 0x40100000 |$UARTTXBSY| DCD 0x40100014 |$UARTINTR| DCD 0x40100008 EXPORT |boot_func_end_pxa2x0| [ DATA ] |boot_func_end_pxa2x0| DCD 0x0 END @ 1.1 log @Added support PXA270. @ text @d1 1 a1 1 ; $NetBSD$ a16 7 ; 3. All advertising materials mentioning features or use of this software ; must display the following acknowledgement: ; This product includes software developed by the NetBSD ; Foundation, Inc. and its contributors. ; 4. Neither the name of The NetBSD Foundation nor the names of its ; contributors may be used to endorse or promote products derived ; from this software without specific prior written permission. @ 1.1.66.1 log @Merge changes from current as of 20200406 @ text @d17 7 @ 1.1.70.1 log @Pull up following revision(s) (requested by tsutsui in ticket #570): sys/compat/netbsd32/netbsd32_compat_50_sysv.c: revision 1.3 sys/dev/raidframe/rf_compat50.h: revision 1.6 sys/arch/emips/emips/bus_space.c: revision 1.3 sys/compat/net/if.h: revision 1.5 sys/arch/emips/stand/common/bootinfo.c: revision 1.2 sys/compat/common/sysv_msg_50.c: revision 1.5 sys/compat/common/kern_time_30.c: revision 1.8 sys/arch/emips/stand/common/bootinfo.h: revision 1.2 sys/arch/ia64/include/bus.h: revision 1.4 sys/arch/ia64/ia64/bus_space.c: revision 1.2 sys/compat/common/sysv_shm_50.c: revision 1.5 sys/dev/ic/adw.h: revision 1.15 sys/compat/common/uipc_syscalls_50.c: revision 1.10 sys/arch/emips/ebus/flash_ebus.c: revision 1.22 sys/dev/ic/adv.h: revision 1.15 sys/dev/ic/adwmcode.c: revision 1.18 sys/dev/ic/advlib.c: revision 1.29 sys/arch/hpcarm/include/kloader.h: revision 1.3 sys/dev/usb/uberry.c: revision 1.16 sys/compat/common/sysv_sem_50.c: revision 1.5 sys/compat/netbsd32/netbsd32_compat_50.c: revision 1.43 sys/dev/ic/advlib.h: revision 1.21 sys/dev/ic/adv.c: revision 1.50 sys/compat/netinet6/in6_var.h: revision 1.5 sys/arch/hpc/stand/hpcboot/arm/arm_sa1100_asm.asm: revision 1.2 sys/arch/emips/include/loadfile_machdep.h: revision 1.3 sys/arch/emips/stand/common/prom_iface.c: revision 1.7 sys/dev/ic/adw.c: revision 1.56 sys/dev/ic/adwmcode.h: revision 1.12 sys/dev/ic/advmcode.c: revision 1.10 sys/arch/emips/ebus/ace_ebus.c: revision 1.22 sys/compat/netbsd32/netbsd32_compat_60.c: revision 1.5 sys/dev/raidframe/rf_compat50.c: revision 1.13 sys/arch/x68k/dev/intiovar.h: revision 1.15 sys/dev/usb/uipad.c: revision 1.8 sys/arch/zaurus/include/kloader.h: revision 1.3 sys/arch/emips/stand/common/bootxx.c: revision 1.2 sys/dev/ic/adwlib.h: revision 1.23 sys/dev/ic/adwlib.c: revision 1.44 sys/compat/netbsd32/netbsd32_compat_16.c: revision 1.3 sys/arch/amigappc/include/intr.h: revision 1.27 sys/arch/x68k/dev/mfp.c: revision 1.27 sys/arch/arm/at91/at91dbgu.c: revision 1.17 sys/dev/ic/advmcode.h: revision 1.7 sys/compat/ultrix/ultrix_exec.h: revision 1.7 sys/compat/common/vfs_syscalls_50.c: revision 1.24 sys/arch/mips/cavium/octeon_dma.c: revision 1.3 sys/arch/hpc/stand/hpcboot/arm/arm_pxa2x0_asm.asm: revision 1.2 Remove clause 3 and 4 from TNF licenses. Ok'ed by martin@@ in PR/54760. Remove clause 3 and 4 leftovers from TNF licenses in more sources. Confirmed by martin@@ in PR/54760. @ text @d1 1 a1 1 ; $NetBSD: arm_pxa2x0_asm.asm,v 1.1 2010/04/06 16:20:28 nonaka Exp $ d17 7 @ 1.1.6.1 log @file arm_pxa2x0_asm.asm was added on branch yamt-nfs-mp on 2010-08-11 22:52:04 +0000 @ text @d1 243 @ 1.1.6.2 log @sync with head. @ text @a0 243 ; $NetBSD$ ; ; Copyright (c) 2001 The NetBSD Foundation, Inc. ; All rights reserved. ; ; This code is derived from software contributed to The NetBSD Foundation ; by UCHIYAMA Yasushi. ; ; Redistribution and use in source and binary forms, with or without ; modification, are permitted provided that the following conditions ; are met: ; 1. Redistributions of source code must retain the above copyright ; notice, this list of conditions and the following disclaimer. ; 2. Redistributions in binary form must reproduce the above copyright ; notice, this list of conditions and the following disclaimer in the ; documentation and/or other materials provided with the distribution. ; 3. All advertising materials mentioning features or use of this software ; must display the following acknowledgement: ; This product includes software developed by the NetBSD ; Foundation, Inc. and its contributors. ; 4. Neither the name of The NetBSD Foundation nor the names of its ; contributors may be used to endorse or promote products derived ; from this software without specific prior written permission. ; ; THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS ; ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED ; TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR ; PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS ; BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR ; CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF ; SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS ; INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN ; CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ; ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE ; POSSIBILITY OF SUCH DAMAGE. ; AREA |.text|, CODE, PIC ; ;armasm.exe $(InputPath) ;arm.obj ; ; FlatJump_pxa2x0 (kaddr_t bootinfo, kaddr_t pvec, kaddr_t stack ; kaddr_t jump) ; bootinfo boot information block address. ; pvec page vector of kernel. ; stack physical address of stack ; jump physical address of boot function EXPORT |FlatJump_pxa2x0| |FlatJump_pxa2x0| PROC ; disable interrupt mrs r4, cpsr orr r4, r4, #0xc0 msr cpsr, r4 ; Invalidate I/D-cache. mcr p15, 0, r4, c7, c7, 0 mov r4, r4 sub pc, pc, #4 ; disable MMU, I/D-Cache, Writebuffer. ; interrupt vector address is 0xffff0000 ; 32bit exception handler/address range. ldr r4, [pc, #20] ; Disable WB/Cache/MMU mcr p15, 0, r4, c1, c0, 0 ; Invalidate TLB entries. mcr p15, 0, r4, c8, c7, 0 mov r4, r4 ; wait for it to complete sub pc, pc, #4 ; branch to next insn mov pc, r3 ; NOTREACHED mov pc, lr DCD 0x00002030 ENDP ; |FlatJump_pxa2x0| ; ; UART test ; ; boot_func (uint32_t mapaddr, uint32_t bootinfo, uint32_t flags) ; EXPORT |boot_func_pxa2x0| |boot_func_pxa2x0| PROC nop ; cop15 hazard nop ; cop15 hazard nop ; cop15 hazard mov sp, r2 ; set bootloader stack bl boot_pxa2x0 nop ; NOTREACHED nop ENDP ; |boot_func_pxa2x0| EXPORT |boot_pxa2x0| |boot_pxa2x0| PROC mov r4, r0 mov r5, r1 ; ; UART test code ; ; ; print boot_info address (r0) and page_vector start address (r1). ; mov r0, #'I' ; bl btputc ; mov r0, r4 ; bl hexdump ; mov r0, #'P' ; bl btputc ; mov r0, r5 ; bl hexdump mov r7, r4 mov r2, r5 ; start |page_loop| mvn r0, #0 ; ~0 cmp r2, r0 beq |page_end| ; if (next == ~0) goto page_end mov r1, r2 ; p = next ldr r2, [r1] ; next ldr r3, [r1, #4] ; src ldr r4, [r1, #8] ; dst ldr r5, [r1, #12] ; sz bic r4, r4, #0xff000000 orr r4, r4, #0xa0000000 cmp r3, r0 add r6, r4, r5 ; end address bne |page_memcpy4| ; if (src != ~0) goto page_memcpy4 mov r0, #0 |page_memset| ; memset (dst, 0, sz) uncached. str r0, [r4], #4 cmp r4, r6 blt |page_memset| b |page_loop| |page_memcpy4| ; memcpy (dst, src, sz) uncached. ldr r0, [r3], #4 ldr r5, [r3], #4 str r0, [r4], #4 cmp r4, r6 strlt r5, [r4], #4 cmplt r4, r6 blt |page_memcpy4| b |page_loop| |page_end| ; ; jump to kernel ; ; mov r0, #'E' ; bl btputc ; ldr r0, [r7] ; bl hexdump ; set stack pointer mov r5, #4096 add r6, r6, #8192 sub r5, r5, #1 bic sp, r6, r5 ; set bootargs ldr r4, [r7] ldr r0, [r7, #4] ldr r1, [r7, #8] ldr r2, [r7, #12] bic r4, r4, #0xff000000 orr r4, r4, #0xa0000000 mov pc, r4 ; NOTREACHED |infinite_loop| nop nop nop nop nop b |infinite_loop| ENDP ; |boot| |btputc| PROC adr r1, |$UARTTXBSY| ldr r1, [r1] |btputc_busy| ldr r2, [r1] ands r2, r2, #0x20 beq |btputc_busy| adr r1, |$UARTTXADR| ldr r1, [r1] str r0, [r1] adr r1, |$UARTINTR| ldr r1, [r1] mov pc, lr ENDP ;|btputc| |hexdump| PROC stmfd sp!, {r4-r5, lr} mov r4, r0 mov r0, #0x30 bl btputc mov r0, #0x78 bl btputc mov r0, r4 ; Transmit register address adr r1, |$UARTTXADR| ldr r1, [r1] ; Transmit busy register address adr r2, |$UARTTXBSY| ldr r2, [r2] mov r5, #8 |hex_loop| mov r3, r0, LSR #28 cmp r3, #9 addgt r3, r3, #0x41 - 10 addle r3, r3, #0x30 |hex_busyloop| ldr r4, [r2] ands r4, r4, #0x20 beq |hex_busyloop| str r3, [r1] adr r4, |$UARTINTR| ldr r4, [r4] mov r0, r0, LSL #4 subs r5, r5, #1 bne |hex_loop| mov r0, #0x0d bl btputc mov r0, #0x0a bl btputc ldmfd sp!, {r4-r5, pc} ENDP ;|hexdump| ; FFUART |$UARTTXADR| DCD 0x40100000 |$UARTTXBSY| DCD 0x40100014 |$UARTINTR| DCD 0x40100008 EXPORT |boot_func_end_pxa2x0| [ DATA ] |boot_func_end_pxa2x0| DCD 0x0 END @ 1.1.4.1 log @file arm_pxa2x0_asm.asm was added on branch rmind-uvmplock on 2010-05-30 05:16:50 +0000 @ text @d1 243 @ 1.1.4.2 log @sync with head @ text @a0 243 ; $NetBSD$ ; ; Copyright (c) 2001 The NetBSD Foundation, Inc. ; All rights reserved. ; ; This code is derived from software contributed to The NetBSD Foundation ; by UCHIYAMA Yasushi. ; ; Redistribution and use in source and binary forms, with or without ; modification, are permitted provided that the following conditions ; are met: ; 1. Redistributions of source code must retain the above copyright ; notice, this list of conditions and the following disclaimer. ; 2. Redistributions in binary form must reproduce the above copyright ; notice, this list of conditions and the following disclaimer in the ; documentation and/or other materials provided with the distribution. ; 3. All advertising materials mentioning features or use of this software ; must display the following acknowledgement: ; This product includes software developed by the NetBSD ; Foundation, Inc. and its contributors. ; 4. Neither the name of The NetBSD Foundation nor the names of its ; contributors may be used to endorse or promote products derived ; from this software without specific prior written permission. ; ; THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS ; ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED ; TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR ; PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS ; BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR ; CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF ; SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS ; INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN ; CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ; ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE ; POSSIBILITY OF SUCH DAMAGE. ; AREA |.text|, CODE, PIC ; ;armasm.exe $(InputPath) ;arm.obj ; ; FlatJump_pxa2x0 (kaddr_t bootinfo, kaddr_t pvec, kaddr_t stack ; kaddr_t jump) ; bootinfo boot information block address. ; pvec page vector of kernel. ; stack physical address of stack ; jump physical address of boot function EXPORT |FlatJump_pxa2x0| |FlatJump_pxa2x0| PROC ; disable interrupt mrs r4, cpsr orr r4, r4, #0xc0 msr cpsr, r4 ; Invalidate I/D-cache. mcr p15, 0, r4, c7, c7, 0 mov r4, r4 sub pc, pc, #4 ; disable MMU, I/D-Cache, Writebuffer. ; interrupt vector address is 0xffff0000 ; 32bit exception handler/address range. ldr r4, [pc, #20] ; Disable WB/Cache/MMU mcr p15, 0, r4, c1, c0, 0 ; Invalidate TLB entries. mcr p15, 0, r4, c8, c7, 0 mov r4, r4 ; wait for it to complete sub pc, pc, #4 ; branch to next insn mov pc, r3 ; NOTREACHED mov pc, lr DCD 0x00002030 ENDP ; |FlatJump_pxa2x0| ; ; UART test ; ; boot_func (uint32_t mapaddr, uint32_t bootinfo, uint32_t flags) ; EXPORT |boot_func_pxa2x0| |boot_func_pxa2x0| PROC nop ; cop15 hazard nop ; cop15 hazard nop ; cop15 hazard mov sp, r2 ; set bootloader stack bl boot_pxa2x0 nop ; NOTREACHED nop ENDP ; |boot_func_pxa2x0| EXPORT |boot_pxa2x0| |boot_pxa2x0| PROC mov r4, r0 mov r5, r1 ; ; UART test code ; ; ; print boot_info address (r0) and page_vector start address (r1). ; mov r0, #'I' ; bl btputc ; mov r0, r4 ; bl hexdump ; mov r0, #'P' ; bl btputc ; mov r0, r5 ; bl hexdump mov r7, r4 mov r2, r5 ; start |page_loop| mvn r0, #0 ; ~0 cmp r2, r0 beq |page_end| ; if (next == ~0) goto page_end mov r1, r2 ; p = next ldr r2, [r1] ; next ldr r3, [r1, #4] ; src ldr r4, [r1, #8] ; dst ldr r5, [r1, #12] ; sz bic r4, r4, #0xff000000 orr r4, r4, #0xa0000000 cmp r3, r0 add r6, r4, r5 ; end address bne |page_memcpy4| ; if (src != ~0) goto page_memcpy4 mov r0, #0 |page_memset| ; memset (dst, 0, sz) uncached. str r0, [r4], #4 cmp r4, r6 blt |page_memset| b |page_loop| |page_memcpy4| ; memcpy (dst, src, sz) uncached. ldr r0, [r3], #4 ldr r5, [r3], #4 str r0, [r4], #4 cmp r4, r6 strlt r5, [r4], #4 cmplt r4, r6 blt |page_memcpy4| b |page_loop| |page_end| ; ; jump to kernel ; ; mov r0, #'E' ; bl btputc ; ldr r0, [r7] ; bl hexdump ; set stack pointer mov r5, #4096 add r6, r6, #8192 sub r5, r5, #1 bic sp, r6, r5 ; set bootargs ldr r4, [r7] ldr r0, [r7, #4] ldr r1, [r7, #8] ldr r2, [r7, #12] bic r4, r4, #0xff000000 orr r4, r4, #0xa0000000 mov pc, r4 ; NOTREACHED |infinite_loop| nop nop nop nop nop b |infinite_loop| ENDP ; |boot| |btputc| PROC adr r1, |$UARTTXBSY| ldr r1, [r1] |btputc_busy| ldr r2, [r1] ands r2, r2, #0x20 beq |btputc_busy| adr r1, |$UARTTXADR| ldr r1, [r1] str r0, [r1] adr r1, |$UARTINTR| ldr r1, [r1] mov pc, lr ENDP ;|btputc| |hexdump| PROC stmfd sp!, {r4-r5, lr} mov r4, r0 mov r0, #0x30 bl btputc mov r0, #0x78 bl btputc mov r0, r4 ; Transmit register address adr r1, |$UARTTXADR| ldr r1, [r1] ; Transmit busy register address adr r2, |$UARTTXBSY| ldr r2, [r2] mov r5, #8 |hex_loop| mov r3, r0, LSR #28 cmp r3, #9 addgt r3, r3, #0x41 - 10 addle r3, r3, #0x30 |hex_busyloop| ldr r4, [r2] ands r4, r4, #0x20 beq |hex_busyloop| str r3, [r1] adr r4, |$UARTINTR| ldr r4, [r4] mov r0, r0, LSL #4 subs r5, r5, #1 bne |hex_loop| mov r0, #0x0d bl btputc mov r0, #0x0a bl btputc ldmfd sp!, {r4-r5, pc} ENDP ;|hexdump| ; FFUART |$UARTTXADR| DCD 0x40100000 |$UARTTXBSY| DCD 0x40100014 |$UARTINTR| DCD 0x40100008 EXPORT |boot_func_end_pxa2x0| [ DATA ] |boot_func_end_pxa2x0| DCD 0x0 END @ 1.1.2.1 log @file arm_pxa2x0_asm.asm was added on branch uebayasi-xip on 2010-04-30 14:39:24 +0000 @ text @d1 243 @ 1.1.2.2 log @Sync with HEAD. @ text @a0 243 ; $NetBSD$ ; ; Copyright (c) 2001 The NetBSD Foundation, Inc. ; All rights reserved. ; ; This code is derived from software contributed to The NetBSD Foundation ; by UCHIYAMA Yasushi. ; ; Redistribution and use in source and binary forms, with or without ; modification, are permitted provided that the following conditions ; are met: ; 1. Redistributions of source code must retain the above copyright ; notice, this list of conditions and the following disclaimer. ; 2. Redistributions in binary form must reproduce the above copyright ; notice, this list of conditions and the following disclaimer in the ; documentation and/or other materials provided with the distribution. ; 3. All advertising materials mentioning features or use of this software ; must display the following acknowledgement: ; This product includes software developed by the NetBSD ; Foundation, Inc. and its contributors. ; 4. Neither the name of The NetBSD Foundation nor the names of its ; contributors may be used to endorse or promote products derived ; from this software without specific prior written permission. ; ; THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS ; ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED ; TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR ; PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS ; BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR ; CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF ; SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS ; INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN ; CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ; ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE ; POSSIBILITY OF SUCH DAMAGE. ; AREA |.text|, CODE, PIC ; ;armasm.exe $(InputPath) ;arm.obj ; ; FlatJump_pxa2x0 (kaddr_t bootinfo, kaddr_t pvec, kaddr_t stack ; kaddr_t jump) ; bootinfo boot information block address. ; pvec page vector of kernel. ; stack physical address of stack ; jump physical address of boot function EXPORT |FlatJump_pxa2x0| |FlatJump_pxa2x0| PROC ; disable interrupt mrs r4, cpsr orr r4, r4, #0xc0 msr cpsr, r4 ; Invalidate I/D-cache. mcr p15, 0, r4, c7, c7, 0 mov r4, r4 sub pc, pc, #4 ; disable MMU, I/D-Cache, Writebuffer. ; interrupt vector address is 0xffff0000 ; 32bit exception handler/address range. ldr r4, [pc, #20] ; Disable WB/Cache/MMU mcr p15, 0, r4, c1, c0, 0 ; Invalidate TLB entries. mcr p15, 0, r4, c8, c7, 0 mov r4, r4 ; wait for it to complete sub pc, pc, #4 ; branch to next insn mov pc, r3 ; NOTREACHED mov pc, lr DCD 0x00002030 ENDP ; |FlatJump_pxa2x0| ; ; UART test ; ; boot_func (uint32_t mapaddr, uint32_t bootinfo, uint32_t flags) ; EXPORT |boot_func_pxa2x0| |boot_func_pxa2x0| PROC nop ; cop15 hazard nop ; cop15 hazard nop ; cop15 hazard mov sp, r2 ; set bootloader stack bl boot_pxa2x0 nop ; NOTREACHED nop ENDP ; |boot_func_pxa2x0| EXPORT |boot_pxa2x0| |boot_pxa2x0| PROC mov r4, r0 mov r5, r1 ; ; UART test code ; ; ; print boot_info address (r0) and page_vector start address (r1). ; mov r0, #'I' ; bl btputc ; mov r0, r4 ; bl hexdump ; mov r0, #'P' ; bl btputc ; mov r0, r5 ; bl hexdump mov r7, r4 mov r2, r5 ; start |page_loop| mvn r0, #0 ; ~0 cmp r2, r0 beq |page_end| ; if (next == ~0) goto page_end mov r1, r2 ; p = next ldr r2, [r1] ; next ldr r3, [r1, #4] ; src ldr r4, [r1, #8] ; dst ldr r5, [r1, #12] ; sz bic r4, r4, #0xff000000 orr r4, r4, #0xa0000000 cmp r3, r0 add r6, r4, r5 ; end address bne |page_memcpy4| ; if (src != ~0) goto page_memcpy4 mov r0, #0 |page_memset| ; memset (dst, 0, sz) uncached. str r0, [r4], #4 cmp r4, r6 blt |page_memset| b |page_loop| |page_memcpy4| ; memcpy (dst, src, sz) uncached. ldr r0, [r3], #4 ldr r5, [r3], #4 str r0, [r4], #4 cmp r4, r6 strlt r5, [r4], #4 cmplt r4, r6 blt |page_memcpy4| b |page_loop| |page_end| ; ; jump to kernel ; ; mov r0, #'E' ; bl btputc ; ldr r0, [r7] ; bl hexdump ; set stack pointer mov r5, #4096 add r6, r6, #8192 sub r5, r5, #1 bic sp, r6, r5 ; set bootargs ldr r4, [r7] ldr r0, [r7, #4] ldr r1, [r7, #8] ldr r2, [r7, #12] bic r4, r4, #0xff000000 orr r4, r4, #0xa0000000 mov pc, r4 ; NOTREACHED |infinite_loop| nop nop nop nop nop b |infinite_loop| ENDP ; |boot| |btputc| PROC adr r1, |$UARTTXBSY| ldr r1, [r1] |btputc_busy| ldr r2, [r1] ands r2, r2, #0x20 beq |btputc_busy| adr r1, |$UARTTXADR| ldr r1, [r1] str r0, [r1] adr r1, |$UARTINTR| ldr r1, [r1] mov pc, lr ENDP ;|btputc| |hexdump| PROC stmfd sp!, {r4-r5, lr} mov r4, r0 mov r0, #0x30 bl btputc mov r0, #0x78 bl btputc mov r0, r4 ; Transmit register address adr r1, |$UARTTXADR| ldr r1, [r1] ; Transmit busy register address adr r2, |$UARTTXBSY| ldr r2, [r2] mov r5, #8 |hex_loop| mov r3, r0, LSR #28 cmp r3, #9 addgt r3, r3, #0x41 - 10 addle r3, r3, #0x30 |hex_busyloop| ldr r4, [r2] ands r4, r4, #0x20 beq |hex_busyloop| str r3, [r1] adr r4, |$UARTINTR| ldr r4, [r4] mov r0, r0, LSL #4 subs r5, r5, #1 bne |hex_loop| mov r0, #0x0d bl btputc mov r0, #0x0a bl btputc ldmfd sp!, {r4-r5, pc} ENDP ;|hexdump| ; FFUART |$UARTTXADR| DCD 0x40100000 |$UARTTXBSY| DCD 0x40100014 |$UARTINTR| DCD 0x40100008 EXPORT |boot_func_end_pxa2x0| [ DATA ] |boot_func_end_pxa2x0| DCD 0x0 END @