head	1.6;
access;
symbols
	netbsd-11-0-RC4:1.5
	netbsd-11-0-RC3:1.5
	netbsd-11-0-RC2:1.5
	netbsd-11-0-RC1:1.5
	perseant-exfatfs-base-20250801:1.5
	netbsd-11:1.5.0.10
	netbsd-11-base:1.5
	netbsd-10-1-RELEASE:1.5
	perseant-exfatfs-base-20240630:1.5
	perseant-exfatfs:1.5.0.8
	perseant-exfatfs-base:1.5
	netbsd-9-4-RELEASE:1.1
	netbsd-10-0-RELEASE:1.5
	netbsd-10-0-RC6:1.5
	netbsd-10-0-RC5:1.5
	netbsd-10-0-RC4:1.5
	netbsd-10-0-RC3:1.5
	netbsd-10-0-RC2:1.5
	thorpej-ifq:1.5.0.6
	thorpej-ifq-base:1.5
	thorpej-altq-separation:1.5.0.4
	thorpej-altq-separation-base:1.5
	netbsd-10-0-RC1:1.5
	netbsd-10:1.5.0.2
	netbsd-10-base:1.5
	bouyer-sunxi-drm:1.1.0.28
	bouyer-sunxi-drm-base:1.1
	netbsd-9-3-RELEASE:1.1
	thorpej-i2c-spi-conf2:1.1.0.26
	thorpej-i2c-spi-conf2-base:1.1
	thorpej-futex2:1.1.0.24
	thorpej-futex2-base:1.1
	thorpej-cfargs2:1.1.0.22
	thorpej-cfargs2-base:1.1
	cjep_sun2x-base1:1.1
	cjep_sun2x:1.1.0.20
	cjep_sun2x-base:1.1
	cjep_staticlib_x-base1:1.1
	netbsd-9-2-RELEASE:1.1
	cjep_staticlib_x:1.1.0.18
	cjep_staticlib_x-base:1.1
	thorpej-i2c-spi-conf:1.1.0.16
	thorpej-i2c-spi-conf-base:1.1
	thorpej-cfargs:1.1.0.14
	thorpej-cfargs-base:1.1
	thorpej-futex:1.1.0.12
	thorpej-futex-base:1.1
	netbsd-9-1-RELEASE:1.1
	bouyer-xenpvh-base2:1.1
	phil-wifi-20200421:1.1
	bouyer-xenpvh-base1:1.1
	phil-wifi:1.1.0.10
	phil-wifi-20200411:1.1
	bouyer-xenpvh:1.1.0.8
	bouyer-xenpvh-base:1.1
	is-mlppp:1.1.0.6
	is-mlppp-base:1.1
	phil-wifi-20200406:1.1
	ad-namecache-base3:1.1
	netbsd-9-0-RELEASE:1.1
	netbsd-9-0-RC2:1.1
	ad-namecache-base2:1.1
	ad-namecache-base1:1.1
	ad-namecache:1.1.0.4
	ad-namecache-base:1.1
	netbsd-9-0-RC1:1.1
	phil-wifi-20191119:1.1
	netbsd-9:1.1.0.2
	netbsd-9-base:1.1;
locks; strict;
comment	@# @;


1.6
date	2025.09.06.15.44.03;	author thorpej;	state Exp;
branches;
next	1.5;
commitid	9V4ybx31NXy5wF9G;

1.5
date	2022.11.11.20.31.30;	author jmcneill;	state Exp;
branches;
next	1.4;
commitid	g8HbLjRNktN8dk1E;

1.4
date	2022.10.27.09.41.28;	author jmcneill;	state Exp;
branches;
next	1.3;
commitid	me1PeVM7qweo6lZD;

1.3
date	2022.10.26.10.55.23;	author jmcneill;	state Exp;
branches;
next	1.2;
commitid	G59PO2wMRTaIxdZD;

1.2
date	2022.10.25.22.27.49;	author jmcneill;	state Exp;
branches;
next	1.1;
commitid	UySR7SHKtdvYo9ZD;

1.1
date	2019.06.11.13.01.48;	author skrll;	state Exp;
branches
	1.1.10.1;
next	;
commitid	uEyxtibbQqNERLqB;

1.1.10.1
date	2019.06.11.13.01.48;	author martin;	state dead;
branches;
next	1.1.10.2;
commitid	X01YhRUPVUDaec4C;

1.1.10.2
date	2020.04.13.08.03.38;	author martin;	state Exp;
branches;
next	;
commitid	X01YhRUPVUDaec4C;


desc
@@


1.6
log
@Step towards modularizing the Flattened Device Tree code.

Define attributes for each of the specific device bindings: clock,
dai, dma, gpio, i2c, iommu, mbox, mmc_pwrseq, phy, power, power domain,
pwm, regulator, reset controller, spi, system controller, pin
controller.  Include these support files only if either a provider
or consumer with one of these attributes is present in the kernel
config.

Add the necessary attributes to the device / attach declarations for
each provider and consumer.

There are some bindings that are consumed by generic code (iommu, pinctrl,
power, power domain).  Provide weak stubs for these routines to handle
situations where there is no provider.

No actual code changed; NFCI.
@
text
@#	$NetBSD: files.zynq,v 1.5 2022/11/11 20:31:30 jmcneill Exp $
#
# Configuration info for Xilinx Zynq-7000 SoC
#
#

file	arch/arm/xilinx/zynq_platform.c		soc_zynq

# SOC parameters
defflag	opt_soc.h				SOC_ZYNQ
defflag	opt_soc.h				SOC_ZYNQ7000: SOC_ZYNQ

# PS clock subsystem
device	zynqclk: fdt_clock, fdt_syscon
attach	zynqclk at fdt with zynq7000_clkc
file	arch/arm/xilinx/zynq7000_clkc.c		zynq7000_clkc

# GPIO
device	zynqgpio: fdt_gpio, gpiobus
attach	zynqgpio at fdt
file	arch/arm/xilinx/zynq_gpio.c		zynqgpio

# UART
device	zynquart
attach	zynquart at fdt
file	arch/arm/xilinx/zynq_uart.c		zynquart needs-flag
file	arch/arm/xilinx/zynq7000_uart.c		zynquart
defflag	opt_zynquart.h				ZYNQUARTCONSOLE

# Gigabit Ethernet Controller
device	cemac: ether, ifnet, arp, mii, bus_dma_generic
attach	cemac at fdt
file	dev/cadence/if_cemac.c			cemac
file	arch/arm/xilinx/zynq_cemac.c		cemac

# USB controller
attach	ehci at fdt with zynqusb
file	arch/arm/xilinx/zynq_usb.c		zynqusb
file	arch/arm/xilinx/zynq7000_usb.c		zynqusb

# Xilinx 7 series ADC
device	zynqxadc: fdt_clock, sysmon_envsys
attach	zynqxadc at fdt
file	arch/arm/xilinx/zynq_xadc.c		zynqxadc
@


1.5
log
@Add support for Xilinx 7-series ADC.

The temperature and voltage sensors are exposed with sysmon:

# envstat -d zynqxadc0
               Current  CritMax  WarnMax  WarnMin  CritMin  Unit
temperature:    67.426                                      degC
     vccint:     1.010                                         V
     vccaux:     1.801                                         V
      vp/vn:     0.011                                         V
      vrefp:     1.250                                         V
      vrefn:     0.004                                         V
    vccbram:     1.009                                         V
    vccpint:     1.009                                         V
    vccpaux:     1.799                                         V
   vcco_ddr:     1.500                                         V
@
text
@d1 1
a1 1
#	$NetBSD: files.zynq,v 1.4 2022/10/27 09:41:28 jmcneill Exp $
d14 1
a14 1
device	zynqclk
d19 1
a19 1
device	zynqgpio: gpiobus
d42 1
a42 1
device	zynqxadc: sysmon_envsys
@


1.4
log
@Add driver for Zynq GPIO controller.
@
text
@d1 1
a1 1
#	$NetBSD: files.zynq,v 1.3 2022/10/26 10:55:23 jmcneill Exp $
d40 5
@


1.3
log
@Use generic Arasan SDHCI driver for Zynq-7000.
@
text
@d1 1
a1 1
#	$NetBSD: files.zynq,v 1.2 2022/10/25 22:27:49 jmcneill Exp $
a12 5
# System Level Control Module
#device	zynqslcr
#attach	zynqslcr at fdt
#file	arch/arm/xilinx/zynq_slcr.c		zynqslcr needs-flag

d18 5
@


1.2
log
@Add basic Zynq-7000 PS clock subsystem driver.

PR# kern/57068
@
text
@d1 1
a1 1
#	$NetBSD: files.zynq,v 1.1 2019/06/11 13:01:48 skrll Exp $
a39 5

# SD host controller for SD/MMC
attach	sdhc at fdt with sdhc_fdt
file	arch/arm/xilinx/zynq7000_sdhc.c		sdhc_fdt

@


1.1
log
@Initial commit of FDTised Xilinx Zynq-7000 support.  Tested with

qemu-system-arm -M xilinx-zynq-a9 -dtb zynq-zed.dtb -kernel netbsd.ub \
    -serial /dev/null -serial stdio

Based on a set of diffs/files from rjs@@

sys/arch/arm/zynq is kept in place to allow existing kernels (e.g.
ZEDBOARD and PARALLELLA) to continue to build/work during the transition,
but eventually sys/arch/arm/zynq will be deleted.
@
text
@d1 1
a1 1
#	$NetBSD$
d18 5
@


1.1.10.1
log
@file files.zynq was added on branch phil-wifi on 2020-04-13 08:03:38 +0000
@
text
@d1 39
@


1.1.10.2
log
@Mostly merge changes from HEAD upto 20200411
@
text
@a0 39
#	$NetBSD: files.zynq,v 1.1 2019/06/11 13:01:48 skrll Exp $
#
# Configuration info for Xilinx Zynq-7000 SoC
#
#

file	arch/arm/xilinx/zynq_platform.c		soc_zynq

# SOC parameters
defflag	opt_soc.h				SOC_ZYNQ
defflag	opt_soc.h				SOC_ZYNQ7000: SOC_ZYNQ

# System Level Control Module
#device	zynqslcr
#attach	zynqslcr at fdt
#file	arch/arm/xilinx/zynq_slcr.c		zynqslcr needs-flag

# UART
device	zynquart
attach	zynquart at fdt
file	arch/arm/xilinx/zynq_uart.c		zynquart needs-flag
file	arch/arm/xilinx/zynq7000_uart.c		zynquart
defflag	opt_zynquart.h				ZYNQUARTCONSOLE

# Gigabit Ethernet Controller
device	cemac: ether, ifnet, arp, mii, bus_dma_generic
attach	cemac at fdt
file	dev/cadence/if_cemac.c			cemac
file	arch/arm/xilinx/zynq_cemac.c		cemac

# USB controller
attach	ehci at fdt with zynqusb
file	arch/arm/xilinx/zynq_usb.c		zynqusb
file	arch/arm/xilinx/zynq7000_usb.c		zynqusb

# SD host controller for SD/MMC
attach	sdhc at fdt with sdhc_fdt
file	arch/arm/xilinx/zynq7000_sdhc.c		sdhc_fdt

@