head	1.1;
branch	1.1.1;
access;
symbols
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	gmp:1.1.1;
locks; strict;
comment	@;; @;


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desc
@@


1.1
log
@Initial revision
@
text
@dnl  AMD64 mpn_mod_34lsub1 -- remainder modulo 2^48-1.

dnl  Copyright 2000, 2001, 2002, 2004, 2005, 2007 Free Software Foundation,
dnl  Inc.
dnl
dnl  This file is part of the GNU MP Library.
dnl
dnl  The GNU MP Library is free software; you can redistribute it and/or
dnl  modify it under the terms of the GNU Lesser General Public License as
dnl  published by the Free Software Foundation; either version 3 of the
dnl  License, or (at your option) any later version.
dnl
dnl  The GNU MP Library is distributed in the hope that it will be useful,
dnl  but WITHOUT ANY WARRANTY; without even the implied warranty of
dnl  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
dnl  Lesser General Public License for more details.
dnl
dnl  You should have received a copy of the GNU Lesser General Public License
dnl  along with the GNU MP Library.  If not, see http://www.gnu.org/licenses/.

include(`../config.m4')


C	     cycles/limb
C K8,K9:	 1.0
C K10:		 1.12
C P4:		 3.25
C P6-15 (Core2): 1.5
C P6-28 (Atom):	 2.5


C INPUT PARAMETERS
C up	rdi
C n	rsi

C mp_limb_t mpn_mod_34lsub1 (mp_srcptr up, mp_size_t n)

C TODO
C  * Apply the movzwl tricks to the x86/k7 code
C  * Review feed-in and wind-down code.  In particular, try to avoid adc and
C    sbb to placate Pentium4.
C  * More unrolling and/or index addressing could bring time to under 1 c/l
C    for Athlon64, approaching 0.67 c/l seems possible.
C  * There are recurrencies on the carry registers (r8, r9, r10) that might
C    be the limiting factor for the Pentium4 speed.  Splitting these into 6
C    registers would help.
C  * For ultimate Athlon64 performance, a sequence like this might be best.
C    It should reach 0.5 c/l (limited by L1 cache bandwidth).
C
C	add	(%rdi), %rax
C	adc	8(%rdi), %rcx
C	adc	16(%rdi), %rdx
C	adc	$0, %r8
C	add	24(%rdi), %rax
C	adc	32(%rdi), %rcx
C	adc	40(%rdi), %rdx
C	adc	$0, %r8
C	...


ASM_START()
	TEXT
	ALIGN(32)
PROLOGUE(mpn_mod_34lsub1)

	mov	$0x0000FFFFFFFFFFFF, %r11

	sub	$2, %rsi
	ja	L(gt2)

	mov	(%rdi), %rax
	nop
	jb	L(1)

	mov	8(%rdi), %rsi
	mov	%rax, %rdx
	shr	$48, %rax		C src[0] low

	and	%r11, %rdx		C src[0] high
	add	%rdx, %rax
	mov	%esi, %edx

	shr	$32, %rsi		C src[1] high
	add	%rsi, %rax

	shl	$16, %rdx		C src[1] low
	add	%rdx, %rax

L(1):	ret


	ALIGN(16)
L(gt2):	xor	%eax, %eax
	xor	%ecx, %ecx
	xor	%edx, %edx
	xor	%r8, %r8
	xor	%r9, %r9
	xor	%r10, %r10

L(top):	add	(%rdi), %rax
	adc	$0, %r10
	add	8(%rdi), %rcx
	adc	$0, %r8
	add	16(%rdi), %rdx
	adc	$0, %r9

	sub	$3,%rsi
	jng	L(end)

	add	24(%rdi), %rax
	adc	$0, %r10
	add	32(%rdi), %rcx
	adc	$0, %r8
	add	40(%rdi), %rdx
	lea	48(%rdi), %rdi
	adc	$0, %r9

	sub	$3,%rsi
	jg	L(top)


	add	$-24, %rdi
L(end):	add	%r9, %rax
	adc	%r10, %rcx
	adc	%r8, %rdx

	inc	%rsi
	mov	$0x1, %r10d
	js	L(combine)

	mov	$0x10000, %r10d
	adc	24(%rdi), %rax
	dec	%rsi
	js	L(combine)

	adc	32(%rdi), %rcx
	mov	$0x100000000, %r10

L(combine):
	sbb	%rsi, %rsi		C carry
	mov	%rax, %rdi		C 0mod3
	shr	$48, %rax		C 0mod3 high

	and	%r10, %rsi		C carry masked
	and	%r11, %rdi		C 0mod3 low
	mov	%ecx, %r10d		C 1mod3

	add	%rsi, %rax		C apply carry
	shr	$32, %rcx		C 1mod3 high

	add	%rdi, %rax		C apply 0mod3 low
	movzwl	%dx, %edi		C 2mod3
	shl	$16, %r10		C 1mod3 low

	add	%rcx, %rax		C apply 1mod3 high
	shr	$16, %rdx		C 2mod3 high

	add	%r10, %rax		C apply 1mod3 low
	shl	$32, %rdi		C 2mod3 low

	add	%rdx, %rax		C apply 2mod3 high
	add	%rdi, %rax		C apply 2mod3 low

	ret
EPILOGUE()
@


1.1.1.1
log
@initial import of GMP 5.0.2.

GNU MP is a library for arbitrary precision arithmetic, operating on signed
integers, rational numbers, and floating point numbers.  It has a rich set
of functions, and the functions have a regular interface.

GMP is necessary for GCC >= 4.2.
@
text
@@


1.1.1.1.8.1
log
@Rebase to HEAD as of a few days ago.
@
text
@d3 3
a5 3
dnl  Copyright 2000, 2001, 2002, 2004, 2005, 2007, 2009, 2010, 2011, 2012 Free
dnl  Software Foundation, Inc.

d7 11
a17 11

dnl  The GNU MP Library is free software; you can redistribute it and/or modify
dnl  it under the terms of the GNU Lesser General Public License as published
dnl  by the Free Software Foundation; either version 3 of the License, or (at
dnl  your option) any later version.

dnl  The GNU MP Library is distributed in the hope that it will be useful, but
dnl  WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
dnl  or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU Lesser General Public
dnl  License for more details.

d24 7
a30 11
C	    cycles/limb
C AMD K8,K9	 0.67	   0.583 is possible with zero-reg instead of $0, 4-way
C AMD K10	 0.67	   this seems hard to beat
C AMD bd1	 1
C AMD bobcat	 1.07
C Intel P4	 7.35	   terrible, use old code
C Intel core2	 1.25	   1+epsilon with huge unrolling
C Intel NHM	 1.15	   this seems hard to beat
C Intel SBR	 0.93
C Intel atom	 2.5
C VIA nano	 1.25	   this seems hard to beat
d33 2
a34 2
define(`ap',	%rdi)
define(`n',	%rsi)
d39 20
a58 1
C  * Review feed-in and wind-down code.
a59 2
ABI_SUPPORT(DOS64)
ABI_SUPPORT(STD64)
a64 1
	FUNC_ENTRY(2)
d68 1
a68 3
	mov	(ap), %rax

	cmp	$2, %rsi
d71 3
a73 1
	jb	L(one)
d75 1
a75 1
	mov	8(ap), %rsi
d81 1
a81 1
	mov	R32(%rsi), R32(%rdx)
a87 2
L(one):	FUNC_EXIT()
	ret
d89 1
a90 2
C Don't change this, the wind-down code is not able to handle greater values
define(UNROLL,3)
d92 5
a96 2
L(gt2):	mov	8(ap), %rcx
	mov	16(ap), %rdx
d98 7
a104 8
	add	$24, ap
	sub	$eval(UNROLL*3+3), %rsi
	jc	L(end)
	ALIGN(16)
L(top):
	add	(ap), %rax
	adc	8(ap), %rcx
	adc	16(ap), %rdx
d106 10
a115 4
forloop(i,1,UNROLL-1,`dnl
	add	eval(i*24)(ap), %rax
	adc	eval(i*24+8)(ap), %rcx
	adc	eval(i*24+16)(ap), %rdx
a116 26
')dnl
	add	$eval(UNROLL*24), ap
	sub	$eval(UNROLL*3), %rsi
	jnc	L(top)

L(end):
	lea	L(tab)(%rip), %r8
ifdef(`PIC',
`	movslq	36(%r8,%rsi,4), %r10
	add	%r10, %r8
	jmp	*%r8
',`
	jmp	*72(%r8,%rsi,8)
')
	JUMPTABSECT
	ALIGN(8)
L(tab):	JMPENT(	L(0), L(tab))
	JMPENT(	L(1), L(tab))
	JMPENT(	L(2), L(tab))
	JMPENT(	L(3), L(tab))
	JMPENT(	L(4), L(tab))
	JMPENT(	L(5), L(tab))
	JMPENT(	L(6), L(tab))
	JMPENT(	L(7), L(tab))
	JMPENT(	L(8), L(tab))
	TEXT
d118 20
a137 43
L(6):	add	(ap), %rax
	adc	8(ap), %rcx
	adc	16(ap), %rdx
	adc	$0, %r9
	add	$24, ap
L(3):	add	(ap), %rax
	adc	8(ap), %rcx
	adc	16(ap), %rdx
	jmp	L(cj1)

L(7):	add	(ap), %rax
	adc	8(ap), %rcx
	adc	16(ap), %rdx
	adc	$0, %r9
	add	$24, ap
L(4):	add	(ap), %rax
	adc	8(ap), %rcx
	adc	16(ap), %rdx
	adc	$0, %r9
	add	$24, ap
L(1):	add	(ap), %rax
	adc	$0, %rcx
	jmp	L(cj2)

L(8):	add	(ap), %rax
	adc	8(ap), %rcx
	adc	16(ap), %rdx
	adc	$0, %r9
	add	$24, ap
L(5):	add	(ap), %rax
	adc	8(ap), %rcx
	adc	16(ap), %rdx
	adc	$0, %r9
	add	$24, ap
L(2):	add	(ap), %rax
	adc	8(ap), %rcx

L(cj2):	adc	$0, %rdx
L(cj1):	adc	$0, %r9
L(0):	add	%r9, %rax
	adc	$0, %rcx
	adc	$0, %rdx
	adc	$0, %rax
d139 2
d144 1
d146 1
a146 1
	mov	R32(%rcx), R32(%r10)	C 1mod3
d148 1
d152 1
a152 1
	movzwl	%dx, R32(%rdi)		C 2mod3
a163 1
	FUNC_EXIT()
@


1.1.1.1.2.1
log
@sync with head.

for a reference, the tree before this commit was tagged
as yamt-pagecache-tag8.

this commit was splitted into small chunks to avoid
a limitation of cvs.  ("Protocol error: too many arguments")
@
text
@d3 3
a5 3
dnl  Copyright 2000, 2001, 2002, 2004, 2005, 2007, 2009, 2010, 2011, 2012 Free
dnl  Software Foundation, Inc.

d7 11
a17 11

dnl  The GNU MP Library is free software; you can redistribute it and/or modify
dnl  it under the terms of the GNU Lesser General Public License as published
dnl  by the Free Software Foundation; either version 3 of the License, or (at
dnl  your option) any later version.

dnl  The GNU MP Library is distributed in the hope that it will be useful, but
dnl  WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
dnl  or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU Lesser General Public
dnl  License for more details.

d24 7
a30 11
C	    cycles/limb
C AMD K8,K9	 0.67	   0.583 is possible with zero-reg instead of $0, 4-way
C AMD K10	 0.67	   this seems hard to beat
C AMD bd1	 1
C AMD bobcat	 1.07
C Intel P4	 7.35	   terrible, use old code
C Intel core2	 1.25	   1+epsilon with huge unrolling
C Intel NHM	 1.15	   this seems hard to beat
C Intel SBR	 0.93
C Intel atom	 2.5
C VIA nano	 1.25	   this seems hard to beat
d33 2
a34 2
define(`ap',	%rdi)
define(`n',	%rsi)
d39 20
a58 1
C  * Review feed-in and wind-down code.
a59 2
ABI_SUPPORT(DOS64)
ABI_SUPPORT(STD64)
a64 1
	FUNC_ENTRY(2)
d68 1
a68 3
	mov	(ap), %rax

	cmp	$2, %rsi
d71 3
a73 1
	jb	L(one)
d75 1
a75 1
	mov	8(ap), %rsi
d81 1
a81 1
	mov	R32(%rsi), R32(%rdx)
a87 2
L(one):	FUNC_EXIT()
	ret
d89 1
a90 2
C Don't change this, the wind-down code is not able to handle greater values
define(UNROLL,3)
d92 5
a96 2
L(gt2):	mov	8(ap), %rcx
	mov	16(ap), %rdx
d98 7
a104 8
	add	$24, ap
	sub	$eval(UNROLL*3+3), %rsi
	jc	L(end)
	ALIGN(16)
L(top):
	add	(ap), %rax
	adc	8(ap), %rcx
	adc	16(ap), %rdx
d106 10
a115 4
forloop(i,1,UNROLL-1,`dnl
	add	eval(i*24)(ap), %rax
	adc	eval(i*24+8)(ap), %rcx
	adc	eval(i*24+16)(ap), %rdx
a116 26
')dnl
	add	$eval(UNROLL*24), ap
	sub	$eval(UNROLL*3), %rsi
	jnc	L(top)

L(end):
	lea	L(tab)(%rip), %r8
ifdef(`PIC',
`	movslq	36(%r8,%rsi,4), %r10
	add	%r10, %r8
	jmp	*%r8
',`
	jmp	*72(%r8,%rsi,8)
')
	JUMPTABSECT
	ALIGN(8)
L(tab):	JMPENT(	L(0), L(tab))
	JMPENT(	L(1), L(tab))
	JMPENT(	L(2), L(tab))
	JMPENT(	L(3), L(tab))
	JMPENT(	L(4), L(tab))
	JMPENT(	L(5), L(tab))
	JMPENT(	L(6), L(tab))
	JMPENT(	L(7), L(tab))
	JMPENT(	L(8), L(tab))
	TEXT
d118 20
a137 43
L(6):	add	(ap), %rax
	adc	8(ap), %rcx
	adc	16(ap), %rdx
	adc	$0, %r9
	add	$24, ap
L(3):	add	(ap), %rax
	adc	8(ap), %rcx
	adc	16(ap), %rdx
	jmp	L(cj1)

L(7):	add	(ap), %rax
	adc	8(ap), %rcx
	adc	16(ap), %rdx
	adc	$0, %r9
	add	$24, ap
L(4):	add	(ap), %rax
	adc	8(ap), %rcx
	adc	16(ap), %rdx
	adc	$0, %r9
	add	$24, ap
L(1):	add	(ap), %rax
	adc	$0, %rcx
	jmp	L(cj2)

L(8):	add	(ap), %rax
	adc	8(ap), %rcx
	adc	16(ap), %rdx
	adc	$0, %r9
	add	$24, ap
L(5):	add	(ap), %rax
	adc	8(ap), %rcx
	adc	16(ap), %rdx
	adc	$0, %r9
	add	$24, ap
L(2):	add	(ap), %rax
	adc	8(ap), %rcx

L(cj2):	adc	$0, %rdx
L(cj1):	adc	$0, %r9
L(0):	add	%r9, %rax
	adc	$0, %rcx
	adc	$0, %rdx
	adc	$0, %rax
d139 2
d144 1
d146 1
a146 1
	mov	R32(%rcx), R32(%r10)	C 1mod3
d148 1
d152 1
a152 1
	movzwl	%dx, R32(%rdi)		C 2mod3
a163 1
	FUNC_EXIT()
@


1.1.1.2
log
@initial import GMP 5.1.3 sources.  changes include:

fixes for:
- mpn_sbpi1_div_qr_sec and mpn_sbpi1_div_r_sec
- mpz_powm_ui
- AMD family 11h
- mpz_powm_sec and mpn_powm_sec
- ASSERT() fixes
- gcd, gcdext, and invert function fixes
- some PPC division operations
@
text
@d3 3
a5 3
dnl  Copyright 2000, 2001, 2002, 2004, 2005, 2007, 2009, 2010, 2011, 2012 Free
dnl  Software Foundation, Inc.

d7 11
a17 11

dnl  The GNU MP Library is free software; you can redistribute it and/or modify
dnl  it under the terms of the GNU Lesser General Public License as published
dnl  by the Free Software Foundation; either version 3 of the License, or (at
dnl  your option) any later version.

dnl  The GNU MP Library is distributed in the hope that it will be useful, but
dnl  WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
dnl  or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU Lesser General Public
dnl  License for more details.

d24 7
a30 11
C	    cycles/limb
C AMD K8,K9	 0.67	   0.583 is possible with zero-reg instead of $0, 4-way
C AMD K10	 0.67	   this seems hard to beat
C AMD bd1	 1
C AMD bobcat	 1.07
C Intel P4	 7.35	   terrible, use old code
C Intel core2	 1.25	   1+epsilon with huge unrolling
C Intel NHM	 1.15	   this seems hard to beat
C Intel SBR	 0.93
C Intel atom	 2.5
C VIA nano	 1.25	   this seems hard to beat
d33 2
a34 2
define(`ap',	%rdi)
define(`n',	%rsi)
d39 20
a58 1
C  * Review feed-in and wind-down code.
a59 2
ABI_SUPPORT(DOS64)
ABI_SUPPORT(STD64)
a64 1
	FUNC_ENTRY(2)
d68 1
a68 3
	mov	(ap), %rax

	cmp	$2, %rsi
d71 3
a73 1
	jb	L(one)
d75 1
a75 1
	mov	8(ap), %rsi
d81 1
a81 1
	mov	R32(%rsi), R32(%rdx)
a87 2
L(one):	FUNC_EXIT()
	ret
d89 1
a90 2
C Don't change this, the wind-down code is not able to handle greater values
define(UNROLL,3)
d92 5
a96 2
L(gt2):	mov	8(ap), %rcx
	mov	16(ap), %rdx
d98 7
a104 8
	add	$24, ap
	sub	$eval(UNROLL*3+3), %rsi
	jc	L(end)
	ALIGN(16)
L(top):
	add	(ap), %rax
	adc	8(ap), %rcx
	adc	16(ap), %rdx
d106 10
a115 4
forloop(i,1,UNROLL-1,`dnl
	add	eval(i*24)(ap), %rax
	adc	eval(i*24+8)(ap), %rcx
	adc	eval(i*24+16)(ap), %rdx
a116 26
')dnl
	add	$eval(UNROLL*24), ap
	sub	$eval(UNROLL*3), %rsi
	jnc	L(top)

L(end):
	lea	L(tab)(%rip), %r8
ifdef(`PIC',
`	movslq	36(%r8,%rsi,4), %r10
	add	%r10, %r8
	jmp	*%r8
',`
	jmp	*72(%r8,%rsi,8)
')
	JUMPTABSECT
	ALIGN(8)
L(tab):	JMPENT(	L(0), L(tab))
	JMPENT(	L(1), L(tab))
	JMPENT(	L(2), L(tab))
	JMPENT(	L(3), L(tab))
	JMPENT(	L(4), L(tab))
	JMPENT(	L(5), L(tab))
	JMPENT(	L(6), L(tab))
	JMPENT(	L(7), L(tab))
	JMPENT(	L(8), L(tab))
	TEXT
d118 20
a137 43
L(6):	add	(ap), %rax
	adc	8(ap), %rcx
	adc	16(ap), %rdx
	adc	$0, %r9
	add	$24, ap
L(3):	add	(ap), %rax
	adc	8(ap), %rcx
	adc	16(ap), %rdx
	jmp	L(cj1)

L(7):	add	(ap), %rax
	adc	8(ap), %rcx
	adc	16(ap), %rdx
	adc	$0, %r9
	add	$24, ap
L(4):	add	(ap), %rax
	adc	8(ap), %rcx
	adc	16(ap), %rdx
	adc	$0, %r9
	add	$24, ap
L(1):	add	(ap), %rax
	adc	$0, %rcx
	jmp	L(cj2)

L(8):	add	(ap), %rax
	adc	8(ap), %rcx
	adc	16(ap), %rdx
	adc	$0, %r9
	add	$24, ap
L(5):	add	(ap), %rax
	adc	8(ap), %rcx
	adc	16(ap), %rdx
	adc	$0, %r9
	add	$24, ap
L(2):	add	(ap), %rax
	adc	8(ap), %rcx

L(cj2):	adc	$0, %rdx
L(cj1):	adc	$0, %r9
L(0):	add	%r9, %rax
	adc	$0, %rcx
	adc	$0, %rdx
	adc	$0, %rax
d139 2
d144 1
d146 1
a146 1
	mov	R32(%rcx), R32(%r10)	C 1mod3
d148 1
d152 1
a152 1
	movzwl	%dx, R32(%rdi)		C 2mod3
a163 1
	FUNC_EXIT()
@


1.1.1.3
log
@initial import of GMP 6.1.2.  main changes from 5.1.3 below.

notes:
 - support for thumb-less ARM chips was in our port of 5.1.3, but a
   similar method has been provided upstream now
 - someone should look at the AVX failure reports, and fix them

Changes between GMP version 6.1.0 and 6.1.1

  FEATURES
  * Work around faulty cpuid on some recent Intel chips (this allows GMP to run
    on Skylake Pentiums).
  * Support thumb-less ARM chips.

Changes between GMP version 6.0.* and 6.1.0

  BUGS FIXED
  * The public function mpn_com is now correctly declared in gmp.h.
  * Healed possible failures of mpn_sec_sqr for non-cryptographic sizes for
    some obsolete CPUs.
  * Various problems related to precision for mpf have been fixed.
  * Fixed ABI incompatible stack alignment in calls from assembly code.
  * Fixed PIC bug in popcount affecting Intel processors using the 32-bit ABI.
  SPEEDUPS
  * Speedup for Intel Broadwell and Skylake through assembly code making use of
    new ADX instructions.
  * Square root is now faster when the remainder is not needed. Also the speed
    to compute the k-th root improved, for small sizes.
  FEATURES
  * New C++ functions gcd and lcm for mpz_class.
  * New public mpn functions mpn_divexact_1, mpn_zero_p, and mpn_cnd_swap.
  * New public mpq_cmp_z function, to efficiently compare rationals with
    integers.
  * Support for more 32-bit arm processors.
  * Support for AVX-less modern x86 CPUs. (Such support might be missing either
    because the CPU vendor chose to disable AVX, or because the running kernel
    lacks AVX context switch support.)
  * Support for NetBSD under Xen; we switch off AVX unconditionally under
    NetBSD since a bug in NetBSD makes AVX fail under Xen.
  MISC
  * Tuned values for FFT multiplications are provided for larger number on
    many platforms.

Changes between GMP version 5.1.* and 6.0.0
  BUGS FIXED
  * The function mpz_invert now considers any number invertible in Z/1Z.
  * The mpn multiply code now handles operands of more than 2^31 limbs
    correctly.  (Note however that the mpz code is limited to 2^32 bits on
    32-bit hosts and 2^37 bits on 64-bit hosts.)
  SPEEDUPS
  * Plain division of large operands is faster and more monotonous in operand
    size.
  * Major speedup for ARM, in particular ARM Cortex-A15, thanks to improved
    assembly.
  * Speedup for Intel Sandy Bridge, Ivy Bridge, Haswell, thanks to rewritten
    and vastly expanded assembly support.  Speedup also for the older Core 2
    and Nehalem.
  * Faster mixed arithmetic between mpq_class and double.
  FEATURES
  * Support for new Intel and AMD CPUs.
  * New public functions mpn_sec_mul and mpn_sec_sqr, implementing side-channel
    silent multiplication and squaring.
  * New public functions mpn_sec_div_qr and mpn_sec_div_r, implementing
    side-channel silent division.
  * New public functions mpn_cnd_add_n and mpn_cnd_sub_n.  Side-channel silent
    conditional addition and subtraction.
  * New public function mpn_sec_powm, implementing side-channel silent modexp.
  * New public function mpn_sec_invert, implementing side-channel silent
    modular inversion.
  * Better support for applications which use the mpz_t type, but nevertheless
    need to call some of the lower-level mpn functions.  See the documentation
    for mpz_limbs_read and related functions.
@
text
@d3 2
a4 2
dnl  Copyright 2000-2002, 2004, 2005, 2007, 2009-2012 Free Software Foundation,
dnl  Inc.
d7 1
a7 1
dnl
d9 4
a12 14
dnl  it under the terms of either:
dnl
dnl    * the GNU Lesser General Public License as published by the Free
dnl      Software Foundation; either version 3 of the License, or (at your
dnl      option) any later version.
dnl
dnl  or
dnl
dnl    * the GNU General Public License as published by the Free Software
dnl      Foundation; either version 2 of the License, or (at your option) any
dnl      later version.
dnl
dnl  or both in parallel, as here.
dnl
d15 5
a19 6
dnl  or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
dnl  for more details.
dnl
dnl  You should have received copies of the GNU General Public License and the
dnl  GNU Lesser General Public License along with the GNU MP Library.  If not,
dnl  see https://www.gnu.org/licenses/.
@


1.1.1.4
log
@initial import of GMP 6.2.0.  changes include:

- Bug fixes to gmp_snprintf, conversion to double, mpz_powm,
  and mpf_set_str.
- New functions for factorial, primorial, fibonacci, mpz_2fac_ui,
  and mpz_mfac_uiui.
- MIPS r6 cores are now supported.
- Various speeds ups.
@
text
@a38 4
C AMD bd2	 1
C AMD bd3	 ?
C AMD bd4	 ?
C AMD zen	 0.62
a39 1
C AMD jaguar	 1
a43 4
C Intel IBR	 0.93
C Intel HWL	 0.82
C Intel BWL	 0.64
C Intel SKY	 0.60
a44 1
C Intel SLM      1.59
@