head 1.1; branch 1.1.1; access; symbols netbsd-11-0-RC4:1.1.1.2 netbsd-11-0-RC3:1.1.1.2 netbsd-11-0-RC2:1.1.1.2 netbsd-11-0-RC1:1.1.1.2 perseant-exfatfs-base-20250801:1.1.1.2 netbsd-11:1.1.1.2.0.18 netbsd-11-base:1.1.1.2 netbsd-10-1-RELEASE:1.1.1.2 perseant-exfatfs-base-20240630:1.1.1.2 perseant-exfatfs:1.1.1.2.0.16 perseant-exfatfs-base:1.1.1.2 netbsd-8-3-RELEASE:1.1.1.1 netbsd-9-4-RELEASE:1.1.1.2 netbsd-10-0-RELEASE:1.1.1.2 netbsd-10-0-RC6:1.1.1.2 netbsd-10-0-RC5:1.1.1.2 netbsd-10-0-RC4:1.1.1.2 netbsd-10-0-RC3:1.1.1.2 netbsd-10-0-RC2:1.1.1.2 netbsd-10-0-RC1:1.1.1.2 netbsd-10:1.1.1.2.0.14 netbsd-10-base:1.1.1.2 netbsd-9-3-RELEASE:1.1.1.2 gmp-6-2-1:1.1.1.2 cjep_sun2x-base1:1.1.1.2 cjep_sun2x:1.1.1.2.0.12 cjep_sun2x-base:1.1.1.2 cjep_staticlib_x-base1:1.1.1.2 netbsd-9-2-RELEASE:1.1.1.2 cjep_staticlib_x:1.1.1.2.0.10 cjep_staticlib_x-base:1.1.1.2 netbsd-9-1-RELEASE:1.1.1.2 gmp-6-2-0:1.1.1.2 phil-wifi-20200421:1.1.1.2 phil-wifi-20200411:1.1.1.2 is-mlppp:1.1.1.2.0.8 is-mlppp-base:1.1.1.2 phil-wifi-20200406:1.1.1.2 netbsd-8-2-RELEASE:1.1.1.1 netbsd-9-0-RELEASE:1.1.1.2 netbsd-9-0-RC2:1.1.1.2 netbsd-9-0-RC1:1.1.1.2 phil-wifi-20191119:1.1.1.2 netbsd-9:1.1.1.2.0.6 netbsd-9-base:1.1.1.2 phil-wifi-20190609:1.1.1.2 netbsd-8-1-RELEASE:1.1.1.1 netbsd-8-1-RC1:1.1.1.1 pgoyette-compat-merge-20190127:1.1.1.2 pgoyette-compat-20190127:1.1.1.2 pgoyette-compat-20190118:1.1.1.2 pgoyette-compat-1226:1.1.1.2 pgoyette-compat-1126:1.1.1.2 pgoyette-compat-1020:1.1.1.2 pgoyette-compat-0930:1.1.1.2 pgoyette-compat-0906:1.1.1.2 netbsd-7-2-RELEASE:1.1.1.1 pgoyette-compat-0728:1.1.1.2 netbsd-8-0-RELEASE:1.1.1.1 phil-wifi:1.1.1.2.0.4 phil-wifi-base:1.1.1.2 pgoyette-compat-0625:1.1.1.2 netbsd-8-0-RC2:1.1.1.1 pgoyette-compat-0521:1.1.1.2 pgoyette-compat-0502:1.1.1.2 pgoyette-compat-0422:1.1.1.2 netbsd-8-0-RC1:1.1.1.1 pgoyette-compat-0415:1.1.1.2 pgoyette-compat-0407:1.1.1.2 pgoyette-compat-0330:1.1.1.2 pgoyette-compat-0322:1.1.1.2 pgoyette-compat-0315:1.1.1.2 netbsd-7-1-2-RELEASE:1.1.1.1 pgoyette-compat:1.1.1.2.0.2 pgoyette-compat-base:1.1.1.2 netbsd-7-1-1-RELEASE:1.1.1.1 matt-nb8-mediatek:1.1.1.1.0.26 matt-nb8-mediatek-base:1.1.1.1 gmp-6-1-2:1.1.1.2 perseant-stdc-iso10646:1.1.1.1.0.24 perseant-stdc-iso10646-base:1.1.1.1 netbsd-8:1.1.1.1.0.22 netbsd-8-base:1.1.1.1 prg-localcount2-base3:1.1.1.1 prg-localcount2-base2:1.1.1.1 prg-localcount2-base1:1.1.1.1 prg-localcount2:1.1.1.1.0.20 prg-localcount2-base:1.1.1.1 pgoyette-localcount-20170426:1.1.1.1 bouyer-socketcan-base1:1.1.1.1 pgoyette-localcount-20170320:1.1.1.1 netbsd-7-1:1.1.1.1.0.18 netbsd-7-1-RELEASE:1.1.1.1 netbsd-7-1-RC2:1.1.1.1 netbsd-7-nhusb-base-20170116:1.1.1.1 bouyer-socketcan:1.1.1.1.0.16 bouyer-socketcan-base:1.1.1.1 pgoyette-localcount-20170107:1.1.1.1 netbsd-7-1-RC1:1.1.1.1 pgoyette-localcount-20161104:1.1.1.1 netbsd-7-0-2-RELEASE:1.1.1.1 localcount-20160914:1.1.1.1 netbsd-7-nhusb:1.1.1.1.0.14 netbsd-7-nhusb-base:1.1.1.1 pgoyette-localcount-20160806:1.1.1.1 pgoyette-localcount-20160726:1.1.1.1 pgoyette-localcount:1.1.1.1.0.12 pgoyette-localcount-base:1.1.1.1 netbsd-7-0-1-RELEASE:1.1.1.1 netbsd-7-0:1.1.1.1.0.10 netbsd-7-0-RELEASE:1.1.1.1 netbsd-7-0-RC3:1.1.1.1 netbsd-7-0-RC2:1.1.1.1 netbsd-7-0-RC1:1.1.1.1 tls-maxphys-base:1.1.1.1 tls-maxphys:1.1.1.1.0.8 netbsd-7:1.1.1.1.0.6 netbsd-7-base:1.1.1.1 yamt-pagecache:1.1.1.1.0.4 yamt-pagecache-base9:1.1.1.1 tls-earlyentropy:1.1.1.1.0.2 tls-earlyentropy-base:1.1.1.1 riastradh-xf86-video-intel-2-7-1-pre-2-21-15:1.1.1.1 riastradh-drm2-base3:1.1.1.1 gmp-5-1-3:1.1.1.1 gmp:1.1.1; locks; strict; comment @;; @; 1.1 date 2013.11.29.07.49.49; author mrg; state Exp; branches 1.1.1.1; next ; commitid L2Av4PuGmdoL39fx; 1.1.1.1 date 2013.11.29.07.49.49; author mrg; state Exp; branches 1.1.1.1.4.1 1.1.1.1.8.1; next 1.1.1.2; commitid L2Av4PuGmdoL39fx; 1.1.1.2 date 2017.08.22.09.40.49; author mrg; state Exp; branches; next ; commitid W5kmAIk8hwVpSb4A; 1.1.1.1.4.1 date 2013.11.29.07.49.49; author yamt; state dead; branches; next 1.1.1.1.4.2; commitid nx2BSsHy0NPeAxBx; 1.1.1.1.4.2 date 2014.05.22.14.09.06; author yamt; state Exp; branches; next ; commitid nx2BSsHy0NPeAxBx; 1.1.1.1.8.1 date 2013.11.29.07.49.49; author tls; state dead; branches; next 1.1.1.1.8.2; commitid jTnpym9Qu0o4R1Nx; 1.1.1.1.8.2 date 2014.08.19.23.59.55; author tls; state Exp; branches; next ; commitid jTnpym9Qu0o4R1Nx; desc @@ 1.1 log @Initial revision @ text @dnl Intel Pentium mpn_divexact_1 -- mpn by limb exact division. dnl Copyright 2001, 2002, 2011 Free Software Foundation, Inc. dnl dnl This file is part of the GNU MP Library. dnl dnl Rearranged from mpn/x86/pentium/dive_1.asm by Marco Bodrato. dnl dnl The GNU MP Library is free software; you can redistribute it and/or dnl modify it under the terms of the GNU Lesser General Public License as dnl published by the Free Software Foundation; either version 3 of the dnl License, or (at your option) any later version. dnl dnl The GNU MP Library is distributed in the hope that it will be useful, dnl but WITHOUT ANY WARRANTY; without even the implied warranty of dnl MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU dnl Lesser General Public License for more details. dnl dnl You should have received a copy of the GNU Lesser General Public License dnl along with the GNU MP Library. If not, see http://www.gnu.org/licenses/. include(`../config.m4') C divisor C odd even C P54: 24.5 30.5 cycles/limb C P55: 23.0 28.0 MULFUNC_PROLOGUE(mpn_bdiv_q_1 mpn_pi1_bdiv_q_1) C The P55 speeds noted above, 23 cycles odd or 28 cycles even, are as C expected. On P54 in the even case the shrdl pairing nonsense (see C mpn/x86/pentium/README) costs 1 cycle, but it's not clear why there's a C further 1.5 slowdown for both odd and even. defframe(PARAM_SHIFT, 24) defframe(PARAM_INVERSE,20) defframe(PARAM_DIVISOR,16) defframe(PARAM_SIZE, 12) defframe(PARAM_SRC, 8) defframe(PARAM_DST, 4) dnl re-use parameter space define(VAR_INVERSE,`PARAM_DST') TEXT ALIGN(32) C mp_limb_t mpn_bdiv_q_1 (mp_ptr dst, mp_srcptr src, mp_size_t size, C mp_limb_t divisor); C PROLOGUE(mpn_bdiv_q_1) deflit(`FRAME',0) movl $-1, %ecx movl PARAM_DIVISOR, %eax L(strip_twos): ASSERT(nz, `orl %eax, %eax') shrl %eax incl %ecx C shift count jnc L(strip_twos) leal 1(%eax,%eax), %edx C d andl $127, %eax C d/2, 7 bits pushl %ebx FRAME_pushl() pushl %ebp FRAME_pushl() ifdef(`PIC',` call L(here) L(here): popl %ebp C eip addl $_GLOBAL_OFFSET_TABLE_+[.-L(here)], %ebp C AGI movl binvert_limb_table@@GOT(%ebp), %ebp C AGI movzbl (%eax,%ebp), %eax ',` dnl non-PIC movzbl binvert_limb_table(%eax), %eax C inv 8 bits ') movl %eax, %ebp C inv addl %eax, %eax C 2*inv imull %ebp, %ebp C inv*inv imull %edx, %ebp C inv*inv*d subl %ebp, %eax C inv = 2*inv - inv*inv*d movl PARAM_SIZE, %ebx movl %eax, %ebp addl %eax, %eax C 2*inv imull %ebp, %ebp C inv*inv imull %edx, %ebp C inv*inv*d subl %ebp, %eax C inv = 2*inv - inv*inv*d movl %edx, PARAM_DIVISOR C d without twos ASSERT(e,` C expect d*inv == 1 mod 2^GMP_LIMB_BITS pushl %eax FRAME_pushl() imull PARAM_DIVISOR, %eax cmpl $1, %eax popl %eax FRAME_popl()') jmp L(common) EPILOGUE() C mp_limb_t C mpn_pi1_bdiv_q_1 (mp_ptr dst, mp_srcptr src, mp_size_t size, mp_limb_t divisor, C mp_limb_t inverse, int shift) ALIGN(32) PROLOGUE(mpn_pi1_bdiv_q_1) deflit(`FRAME',0) movl PARAM_SHIFT, %ecx pushl %ebx FRAME_pushl() pushl %ebp FRAME_pushl() movl PARAM_SIZE, %ebx movl PARAM_INVERSE, %eax L(common): pushl %esi FRAME_pushl() push %edi FRAME_pushl() movl PARAM_SRC, %esi movl PARAM_DST, %edi movl %eax, VAR_INVERSE leal (%esi,%ebx,4), %esi C src end leal (%edi,%ebx,4), %edi C dst end negl %ebx C -size xorl %ebp, %ebp C initial carry bit orl %ecx, %ecx C shift movl (%esi,%ebx,4), %eax C src low limb jz L(odd_entry) xorl %edx, %edx C initial carry limb (for even, if one) incl %ebx jz L(one) movl (%esi,%ebx,4), %edx C src second limb (for even) shrdl( %cl, %edx, %eax) jmp L(even_entry) ALIGN(8) L(odd_top): C eax scratch C ebx counter, limbs, negative C ecx C edx C esi src end C edi dst end C ebp carry bit, 0 or -1 mull PARAM_DIVISOR movl (%esi,%ebx,4), %eax subl %ebp, %edx subl %edx, %eax sbbl %ebp, %ebp L(odd_entry): imull VAR_INVERSE, %eax movl %eax, (%edi,%ebx,4) incl %ebx jnz L(odd_top) popl %edi popl %esi popl %ebp popl %ebx ret L(even_top): C eax scratch C ebx counter, limbs, negative C ecx twos C edx C esi src end C edi dst end C ebp carry bit, 0 or -1 mull PARAM_DIVISOR subl %ebp, %edx C carry bit movl -4(%esi,%ebx,4), %eax C src limb movl (%esi,%ebx,4), %ebp C and one above it shrdl( %cl, %ebp, %eax) subl %edx, %eax C carry limb sbbl %ebp, %ebp L(even_entry): imull VAR_INVERSE, %eax movl %eax, -4(%edi,%ebx,4) incl %ebx jnz L(even_top) mull PARAM_DIVISOR movl -4(%esi), %eax C src high limb subl %ebp, %edx L(one): shrl %cl, %eax subl %edx, %eax C no carry if division is exact imull VAR_INVERSE, %eax movl %eax, -4(%edi) C dst high limb nop C protect against cache bank clash popl %edi popl %esi popl %ebp popl %ebx ret EPILOGUE() @ 1.1.1.1 log @initial import GMP 5.1.3 sources. changes include: fixes for: - mpn_sbpi1_div_qr_sec and mpn_sbpi1_div_r_sec - mpz_powm_ui - AMD family 11h - mpz_powm_sec and mpn_powm_sec - ASSERT() fixes - gcd, gcdext, and invert function fixes - some PPC division operations @ text @@ 1.1.1.2 log @initial import of GMP 6.1.2. main changes from 5.1.3 below. notes: - support for thumb-less ARM chips was in our port of 5.1.3, but a similar method has been provided upstream now - someone should look at the AVX failure reports, and fix them Changes between GMP version 6.1.0 and 6.1.1 FEATURES * Work around faulty cpuid on some recent Intel chips (this allows GMP to run on Skylake Pentiums). * Support thumb-less ARM chips. Changes between GMP version 6.0.* and 6.1.0 BUGS FIXED * The public function mpn_com is now correctly declared in gmp.h. * Healed possible failures of mpn_sec_sqr for non-cryptographic sizes for some obsolete CPUs. * Various problems related to precision for mpf have been fixed. * Fixed ABI incompatible stack alignment in calls from assembly code. * Fixed PIC bug in popcount affecting Intel processors using the 32-bit ABI. SPEEDUPS * Speedup for Intel Broadwell and Skylake through assembly code making use of new ADX instructions. * Square root is now faster when the remainder is not needed. Also the speed to compute the k-th root improved, for small sizes. FEATURES * New C++ functions gcd and lcm for mpz_class. * New public mpn functions mpn_divexact_1, mpn_zero_p, and mpn_cnd_swap. * New public mpq_cmp_z function, to efficiently compare rationals with integers. * Support for more 32-bit arm processors. * Support for AVX-less modern x86 CPUs. (Such support might be missing either because the CPU vendor chose to disable AVX, or because the running kernel lacks AVX context switch support.) * Support for NetBSD under Xen; we switch off AVX unconditionally under NetBSD since a bug in NetBSD makes AVX fail under Xen. MISC * Tuned values for FFT multiplications are provided for larger number on many platforms. Changes between GMP version 5.1.* and 6.0.0 BUGS FIXED * The function mpz_invert now considers any number invertible in Z/1Z. * The mpn multiply code now handles operands of more than 2^31 limbs correctly. (Note however that the mpz code is limited to 2^32 bits on 32-bit hosts and 2^37 bits on 64-bit hosts.) SPEEDUPS * Plain division of large operands is faster and more monotonous in operand size. * Major speedup for ARM, in particular ARM Cortex-A15, thanks to improved assembly. * Speedup for Intel Sandy Bridge, Ivy Bridge, Haswell, thanks to rewritten and vastly expanded assembly support. Speedup also for the older Core 2 and Nehalem. * Faster mixed arithmetic between mpq_class and double. FEATURES * Support for new Intel and AMD CPUs. * New public functions mpn_sec_mul and mpn_sec_sqr, implementing side-channel silent multiplication and squaring. * New public functions mpn_sec_div_qr and mpn_sec_div_r, implementing side-channel silent division. * New public functions mpn_cnd_add_n and mpn_cnd_sub_n. Side-channel silent conditional addition and subtraction. * New public function mpn_sec_powm, implementing side-channel silent modexp. * New public function mpn_sec_invert, implementing side-channel silent modular inversion. * Better support for applications which use the mpz_t type, but nevertheless need to call some of the lower-level mpn functions. See the documentation for mpz_limbs_read and related functions. @ text @d3 2 a4 4 dnl Rearranged from mpn/x86/pentium/dive_1.asm by Marco Bodrato. dnl Copyright 2001, 2002, 2011, 2014 Free Software Foundation, Inc. d7 1 a7 6 dnl The GNU MP Library is free software; you can redistribute it and/or modify dnl it under the terms of either: dnl dnl * the GNU Lesser General Public License as published by the Free dnl Software Foundation; either version 3 of the License, or (at your dnl option) any later version. d9 9 a17 1 dnl or d19 2 a20 14 dnl * the GNU General Public License as published by the Free Software dnl Foundation; either version 2 of the License, or (at your option) any dnl later version. dnl dnl or both in parallel, as here. dnl dnl The GNU MP Library is distributed in the hope that it will be useful, but dnl WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY dnl or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License dnl for more details. dnl dnl You should have received copies of the GNU General Public License and the dnl GNU Lesser General Public License along with the GNU MP Library. If not, dnl see https://www.gnu.org/licenses/. a72 4 ifdef(`DARWIN',` LEA( binvert_limb_table, %ebp) movzbl (%eax,%ebp), %eax ',` a81 1 ') a249 1 ASM_END() @ 1.1.1.1.8.1 log @file bdiv_q_1.asm was added on branch tls-maxphys on 2014-08-19 23:59:55 +0000 @ text @d1 249 @ 1.1.1.1.8.2 log @Rebase to HEAD as of a few days ago. @ text @a0 249 dnl Intel Pentium mpn_divexact_1 -- mpn by limb exact division. dnl Copyright 2001, 2002, 2011 Free Software Foundation, Inc. dnl dnl This file is part of the GNU MP Library. dnl dnl Rearranged from mpn/x86/pentium/dive_1.asm by Marco Bodrato. dnl dnl The GNU MP Library is free software; you can redistribute it and/or dnl modify it under the terms of the GNU Lesser General Public License as dnl published by the Free Software Foundation; either version 3 of the dnl License, or (at your option) any later version. dnl dnl The GNU MP Library is distributed in the hope that it will be useful, dnl but WITHOUT ANY WARRANTY; without even the implied warranty of dnl MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU dnl Lesser General Public License for more details. dnl dnl You should have received a copy of the GNU Lesser General Public License dnl along with the GNU MP Library. If not, see http://www.gnu.org/licenses/. include(`../config.m4') C divisor C odd even C P54: 24.5 30.5 cycles/limb C P55: 23.0 28.0 MULFUNC_PROLOGUE(mpn_bdiv_q_1 mpn_pi1_bdiv_q_1) C The P55 speeds noted above, 23 cycles odd or 28 cycles even, are as C expected. On P54 in the even case the shrdl pairing nonsense (see C mpn/x86/pentium/README) costs 1 cycle, but it's not clear why there's a C further 1.5 slowdown for both odd and even. defframe(PARAM_SHIFT, 24) defframe(PARAM_INVERSE,20) defframe(PARAM_DIVISOR,16) defframe(PARAM_SIZE, 12) defframe(PARAM_SRC, 8) defframe(PARAM_DST, 4) dnl re-use parameter space define(VAR_INVERSE,`PARAM_DST') TEXT ALIGN(32) C mp_limb_t mpn_bdiv_q_1 (mp_ptr dst, mp_srcptr src, mp_size_t size, C mp_limb_t divisor); C PROLOGUE(mpn_bdiv_q_1) deflit(`FRAME',0) movl $-1, %ecx movl PARAM_DIVISOR, %eax L(strip_twos): ASSERT(nz, `orl %eax, %eax') shrl %eax incl %ecx C shift count jnc L(strip_twos) leal 1(%eax,%eax), %edx C d andl $127, %eax C d/2, 7 bits pushl %ebx FRAME_pushl() pushl %ebp FRAME_pushl() ifdef(`PIC',` call L(here) L(here): popl %ebp C eip addl $_GLOBAL_OFFSET_TABLE_+[.-L(here)], %ebp C AGI movl binvert_limb_table@@GOT(%ebp), %ebp C AGI movzbl (%eax,%ebp), %eax ',` dnl non-PIC movzbl binvert_limb_table(%eax), %eax C inv 8 bits ') movl %eax, %ebp C inv addl %eax, %eax C 2*inv imull %ebp, %ebp C inv*inv imull %edx, %ebp C inv*inv*d subl %ebp, %eax C inv = 2*inv - inv*inv*d movl PARAM_SIZE, %ebx movl %eax, %ebp addl %eax, %eax C 2*inv imull %ebp, %ebp C inv*inv imull %edx, %ebp C inv*inv*d subl %ebp, %eax C inv = 2*inv - inv*inv*d movl %edx, PARAM_DIVISOR C d without twos ASSERT(e,` C expect d*inv == 1 mod 2^GMP_LIMB_BITS pushl %eax FRAME_pushl() imull PARAM_DIVISOR, %eax cmpl $1, %eax popl %eax FRAME_popl()') jmp L(common) EPILOGUE() C mp_limb_t C mpn_pi1_bdiv_q_1 (mp_ptr dst, mp_srcptr src, mp_size_t size, mp_limb_t divisor, C mp_limb_t inverse, int shift) ALIGN(32) PROLOGUE(mpn_pi1_bdiv_q_1) deflit(`FRAME',0) movl PARAM_SHIFT, %ecx pushl %ebx FRAME_pushl() pushl %ebp FRAME_pushl() movl PARAM_SIZE, %ebx movl PARAM_INVERSE, %eax L(common): pushl %esi FRAME_pushl() push %edi FRAME_pushl() movl PARAM_SRC, %esi movl PARAM_DST, %edi movl %eax, VAR_INVERSE leal (%esi,%ebx,4), %esi C src end leal (%edi,%ebx,4), %edi C dst end negl %ebx C -size xorl %ebp, %ebp C initial carry bit orl %ecx, %ecx C shift movl (%esi,%ebx,4), %eax C src low limb jz L(odd_entry) xorl %edx, %edx C initial carry limb (for even, if one) incl %ebx jz L(one) movl (%esi,%ebx,4), %edx C src second limb (for even) shrdl( %cl, %edx, %eax) jmp L(even_entry) ALIGN(8) L(odd_top): C eax scratch C ebx counter, limbs, negative C ecx C edx C esi src end C edi dst end C ebp carry bit, 0 or -1 mull PARAM_DIVISOR movl (%esi,%ebx,4), %eax subl %ebp, %edx subl %edx, %eax sbbl %ebp, %ebp L(odd_entry): imull VAR_INVERSE, %eax movl %eax, (%edi,%ebx,4) incl %ebx jnz L(odd_top) popl %edi popl %esi popl %ebp popl %ebx ret L(even_top): C eax scratch C ebx counter, limbs, negative C ecx twos C edx C esi src end C edi dst end C ebp carry bit, 0 or -1 mull PARAM_DIVISOR subl %ebp, %edx C carry bit movl -4(%esi,%ebx,4), %eax C src limb movl (%esi,%ebx,4), %ebp C and one above it shrdl( %cl, %ebp, %eax) subl %edx, %eax C carry limb sbbl %ebp, %ebp L(even_entry): imull VAR_INVERSE, %eax movl %eax, -4(%edi,%ebx,4) incl %ebx jnz L(even_top) mull PARAM_DIVISOR movl -4(%esi), %eax C src high limb subl %ebp, %edx L(one): shrl %cl, %eax subl %edx, %eax C no carry if division is exact imull VAR_INVERSE, %eax movl %eax, -4(%edi) C dst high limb nop C protect against cache bank clash popl %edi popl %esi popl %ebp popl %ebx ret EPILOGUE() @ 1.1.1.1.4.1 log @file bdiv_q_1.asm was added on branch yamt-pagecache on 2014-05-22 14:09:06 +0000 @ text @d1 249 @ 1.1.1.1.4.2 log @sync with head. for a reference, the tree before this commit was tagged as yamt-pagecache-tag8. this commit was splitted into small chunks to avoid a limitation of cvs. ("Protocol error: too many arguments") @ text @a0 249 dnl Intel Pentium mpn_divexact_1 -- mpn by limb exact division. dnl Copyright 2001, 2002, 2011 Free Software Foundation, Inc. dnl dnl This file is part of the GNU MP Library. dnl dnl Rearranged from mpn/x86/pentium/dive_1.asm by Marco Bodrato. dnl dnl The GNU MP Library is free software; you can redistribute it and/or dnl modify it under the terms of the GNU Lesser General Public License as dnl published by the Free Software Foundation; either version 3 of the dnl License, or (at your option) any later version. dnl dnl The GNU MP Library is distributed in the hope that it will be useful, dnl but WITHOUT ANY WARRANTY; without even the implied warranty of dnl MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU dnl Lesser General Public License for more details. dnl dnl You should have received a copy of the GNU Lesser General Public License dnl along with the GNU MP Library. If not, see http://www.gnu.org/licenses/. include(`../config.m4') C divisor C odd even C P54: 24.5 30.5 cycles/limb C P55: 23.0 28.0 MULFUNC_PROLOGUE(mpn_bdiv_q_1 mpn_pi1_bdiv_q_1) C The P55 speeds noted above, 23 cycles odd or 28 cycles even, are as C expected. On P54 in the even case the shrdl pairing nonsense (see C mpn/x86/pentium/README) costs 1 cycle, but it's not clear why there's a C further 1.5 slowdown for both odd and even. defframe(PARAM_SHIFT, 24) defframe(PARAM_INVERSE,20) defframe(PARAM_DIVISOR,16) defframe(PARAM_SIZE, 12) defframe(PARAM_SRC, 8) defframe(PARAM_DST, 4) dnl re-use parameter space define(VAR_INVERSE,`PARAM_DST') TEXT ALIGN(32) C mp_limb_t mpn_bdiv_q_1 (mp_ptr dst, mp_srcptr src, mp_size_t size, C mp_limb_t divisor); C PROLOGUE(mpn_bdiv_q_1) deflit(`FRAME',0) movl $-1, %ecx movl PARAM_DIVISOR, %eax L(strip_twos): ASSERT(nz, `orl %eax, %eax') shrl %eax incl %ecx C shift count jnc L(strip_twos) leal 1(%eax,%eax), %edx C d andl $127, %eax C d/2, 7 bits pushl %ebx FRAME_pushl() pushl %ebp FRAME_pushl() ifdef(`PIC',` call L(here) L(here): popl %ebp C eip addl $_GLOBAL_OFFSET_TABLE_+[.-L(here)], %ebp C AGI movl binvert_limb_table@@GOT(%ebp), %ebp C AGI movzbl (%eax,%ebp), %eax ',` dnl non-PIC movzbl binvert_limb_table(%eax), %eax C inv 8 bits ') movl %eax, %ebp C inv addl %eax, %eax C 2*inv imull %ebp, %ebp C inv*inv imull %edx, %ebp C inv*inv*d subl %ebp, %eax C inv = 2*inv - inv*inv*d movl PARAM_SIZE, %ebx movl %eax, %ebp addl %eax, %eax C 2*inv imull %ebp, %ebp C inv*inv imull %edx, %ebp C inv*inv*d subl %ebp, %eax C inv = 2*inv - inv*inv*d movl %edx, PARAM_DIVISOR C d without twos ASSERT(e,` C expect d*inv == 1 mod 2^GMP_LIMB_BITS pushl %eax FRAME_pushl() imull PARAM_DIVISOR, %eax cmpl $1, %eax popl %eax FRAME_popl()') jmp L(common) EPILOGUE() C mp_limb_t C mpn_pi1_bdiv_q_1 (mp_ptr dst, mp_srcptr src, mp_size_t size, mp_limb_t divisor, C mp_limb_t inverse, int shift) ALIGN(32) PROLOGUE(mpn_pi1_bdiv_q_1) deflit(`FRAME',0) movl PARAM_SHIFT, %ecx pushl %ebx FRAME_pushl() pushl %ebp FRAME_pushl() movl PARAM_SIZE, %ebx movl PARAM_INVERSE, %eax L(common): pushl %esi FRAME_pushl() push %edi FRAME_pushl() movl PARAM_SRC, %esi movl PARAM_DST, %edi movl %eax, VAR_INVERSE leal (%esi,%ebx,4), %esi C src end leal (%edi,%ebx,4), %edi C dst end negl %ebx C -size xorl %ebp, %ebp C initial carry bit orl %ecx, %ecx C shift movl (%esi,%ebx,4), %eax C src low limb jz L(odd_entry) xorl %edx, %edx C initial carry limb (for even, if one) incl %ebx jz L(one) movl (%esi,%ebx,4), %edx C src second limb (for even) shrdl( %cl, %edx, %eax) jmp L(even_entry) ALIGN(8) L(odd_top): C eax scratch C ebx counter, limbs, negative C ecx C edx C esi src end C edi dst end C ebp carry bit, 0 or -1 mull PARAM_DIVISOR movl (%esi,%ebx,4), %eax subl %ebp, %edx subl %edx, %eax sbbl %ebp, %ebp L(odd_entry): imull VAR_INVERSE, %eax movl %eax, (%edi,%ebx,4) incl %ebx jnz L(odd_top) popl %edi popl %esi popl %ebp popl %ebx ret L(even_top): C eax scratch C ebx counter, limbs, negative C ecx twos C edx C esi src end C edi dst end C ebp carry bit, 0 or -1 mull PARAM_DIVISOR subl %ebp, %edx C carry bit movl -4(%esi,%ebx,4), %eax C src limb movl (%esi,%ebx,4), %ebp C and one above it shrdl( %cl, %ebp, %eax) subl %edx, %eax C carry limb sbbl %ebp, %ebp L(even_entry): imull VAR_INVERSE, %eax movl %eax, -4(%edi,%ebx,4) incl %ebx jnz L(even_top) mull PARAM_DIVISOR movl -4(%esi), %eax C src high limb subl %ebp, %edx L(one): shrl %cl, %eax subl %edx, %eax C no carry if division is exact imull VAR_INVERSE, %eax movl %eax, -4(%edi) C dst high limb nop C protect against cache bank clash popl %edi popl %esi popl %ebp popl %ebx ret EPILOGUE() @