head 1.1; branch 1.1.1; access; symbols netbsd-11-0-RC4:1.1.1.2 netbsd-11-0-RC3:1.1.1.2 netbsd-11-0-RC2:1.1.1.2 netbsd-11-0-RC1:1.1.1.2 perseant-exfatfs-base-20250801:1.1.1.2 netbsd-11:1.1.1.2.0.18 netbsd-11-base:1.1.1.2 netbsd-10-1-RELEASE:1.1.1.2 perseant-exfatfs-base-20240630:1.1.1.2 perseant-exfatfs:1.1.1.2.0.16 perseant-exfatfs-base:1.1.1.2 netbsd-8-3-RELEASE:1.1.1.1 netbsd-9-4-RELEASE:1.1.1.2 netbsd-10-0-RELEASE:1.1.1.2 netbsd-10-0-RC6:1.1.1.2 netbsd-10-0-RC5:1.1.1.2 netbsd-10-0-RC4:1.1.1.2 netbsd-10-0-RC3:1.1.1.2 netbsd-10-0-RC2:1.1.1.2 netbsd-10-0-RC1:1.1.1.2 netbsd-10:1.1.1.2.0.14 netbsd-10-base:1.1.1.2 netbsd-9-3-RELEASE:1.1.1.2 gmp-6-2-1:1.1.1.2 cjep_sun2x-base1:1.1.1.2 cjep_sun2x:1.1.1.2.0.12 cjep_sun2x-base:1.1.1.2 cjep_staticlib_x-base1:1.1.1.2 netbsd-9-2-RELEASE:1.1.1.2 cjep_staticlib_x:1.1.1.2.0.10 cjep_staticlib_x-base:1.1.1.2 netbsd-9-1-RELEASE:1.1.1.2 gmp-6-2-0:1.1.1.2 phil-wifi-20200421:1.1.1.2 phil-wifi-20200411:1.1.1.2 is-mlppp:1.1.1.2.0.8 is-mlppp-base:1.1.1.2 phil-wifi-20200406:1.1.1.2 netbsd-8-2-RELEASE:1.1.1.1 netbsd-9-0-RELEASE:1.1.1.2 netbsd-9-0-RC2:1.1.1.2 netbsd-9-0-RC1:1.1.1.2 phil-wifi-20191119:1.1.1.2 netbsd-9:1.1.1.2.0.6 netbsd-9-base:1.1.1.2 phil-wifi-20190609:1.1.1.2 netbsd-8-1-RELEASE:1.1.1.1 netbsd-8-1-RC1:1.1.1.1 pgoyette-compat-merge-20190127:1.1.1.2 pgoyette-compat-20190127:1.1.1.2 pgoyette-compat-20190118:1.1.1.2 pgoyette-compat-1226:1.1.1.2 pgoyette-compat-1126:1.1.1.2 pgoyette-compat-1020:1.1.1.2 pgoyette-compat-0930:1.1.1.2 pgoyette-compat-0906:1.1.1.2 netbsd-7-2-RELEASE:1.1.1.1 pgoyette-compat-0728:1.1.1.2 netbsd-8-0-RELEASE:1.1.1.1 phil-wifi:1.1.1.2.0.4 phil-wifi-base:1.1.1.2 pgoyette-compat-0625:1.1.1.2 netbsd-8-0-RC2:1.1.1.1 pgoyette-compat-0521:1.1.1.2 pgoyette-compat-0502:1.1.1.2 pgoyette-compat-0422:1.1.1.2 netbsd-8-0-RC1:1.1.1.1 pgoyette-compat-0415:1.1.1.2 pgoyette-compat-0407:1.1.1.2 pgoyette-compat-0330:1.1.1.2 pgoyette-compat-0322:1.1.1.2 pgoyette-compat-0315:1.1.1.2 netbsd-7-1-2-RELEASE:1.1.1.1 pgoyette-compat:1.1.1.2.0.2 pgoyette-compat-base:1.1.1.2 netbsd-7-1-1-RELEASE:1.1.1.1 matt-nb8-mediatek:1.1.1.1.0.26 matt-nb8-mediatek-base:1.1.1.1 gmp-6-1-2:1.1.1.2 perseant-stdc-iso10646:1.1.1.1.0.24 perseant-stdc-iso10646-base:1.1.1.1 netbsd-8:1.1.1.1.0.22 netbsd-8-base:1.1.1.1 prg-localcount2-base3:1.1.1.1 prg-localcount2-base2:1.1.1.1 prg-localcount2-base1:1.1.1.1 prg-localcount2:1.1.1.1.0.20 prg-localcount2-base:1.1.1.1 pgoyette-localcount-20170426:1.1.1.1 bouyer-socketcan-base1:1.1.1.1 pgoyette-localcount-20170320:1.1.1.1 netbsd-7-1:1.1.1.1.0.18 netbsd-7-1-RELEASE:1.1.1.1 netbsd-7-1-RC2:1.1.1.1 netbsd-7-nhusb-base-20170116:1.1.1.1 bouyer-socketcan:1.1.1.1.0.16 bouyer-socketcan-base:1.1.1.1 pgoyette-localcount-20170107:1.1.1.1 netbsd-7-1-RC1:1.1.1.1 pgoyette-localcount-20161104:1.1.1.1 netbsd-7-0-2-RELEASE:1.1.1.1 localcount-20160914:1.1.1.1 netbsd-7-nhusb:1.1.1.1.0.14 netbsd-7-nhusb-base:1.1.1.1 pgoyette-localcount-20160806:1.1.1.1 pgoyette-localcount-20160726:1.1.1.1 pgoyette-localcount:1.1.1.1.0.12 pgoyette-localcount-base:1.1.1.1 netbsd-7-0-1-RELEASE:1.1.1.1 netbsd-7-0:1.1.1.1.0.10 netbsd-7-0-RELEASE:1.1.1.1 netbsd-7-0-RC3:1.1.1.1 netbsd-7-0-RC2:1.1.1.1 netbsd-7-0-RC1:1.1.1.1 tls-maxphys-base:1.1.1.1 tls-maxphys:1.1.1.1.0.8 netbsd-7:1.1.1.1.0.6 netbsd-7-base:1.1.1.1 yamt-pagecache:1.1.1.1.0.4 yamt-pagecache-base9:1.1.1.1 tls-earlyentropy:1.1.1.1.0.2 tls-earlyentropy-base:1.1.1.1 riastradh-xf86-video-intel-2-7-1-pre-2-21-15:1.1.1.1 riastradh-drm2-base3:1.1.1.1 gmp-5-1-3:1.1.1.1 gmp:1.1.1; locks; strict; comment @;; @; 1.1 date 2013.11.29.07.49.49; author mrg; state Exp; branches 1.1.1.1; next ; commitid L2Av4PuGmdoL39fx; 1.1.1.1 date 2013.11.29.07.49.49; author mrg; state Exp; branches 1.1.1.1.4.1 1.1.1.1.8.1; next 1.1.1.2; commitid L2Av4PuGmdoL39fx; 1.1.1.2 date 2017.08.22.09.40.49; author mrg; state Exp; branches; next ; commitid W5kmAIk8hwVpSb4A; 1.1.1.1.4.1 date 2013.11.29.07.49.49; author yamt; state dead; branches; next 1.1.1.1.4.2; commitid nx2BSsHy0NPeAxBx; 1.1.1.1.4.2 date 2014.05.22.14.09.05; author yamt; state Exp; branches; next ; commitid nx2BSsHy0NPeAxBx; 1.1.1.1.8.1 date 2013.11.29.07.49.49; author tls; state dead; branches; next 1.1.1.1.8.2; commitid jTnpym9Qu0o4R1Nx; 1.1.1.1.8.2 date 2014.08.19.23.59.54; author tls; state Exp; branches; next ; commitid jTnpym9Qu0o4R1Nx; desc @@ 1.1 log @Initial revision @ text @dnl x86 mpn_mul_basecase -- Multiply two limb vectors and store the result in dnl a third limb vector. dnl Contributed to the GNU project by Torbjorn Granlund and Marco Bodrato. dnl dnl Copyright 2011 Free Software Foundation, Inc. dnl dnl This file is part of the GNU MP Library. dnl dnl The GNU MP Library is free software; you can redistribute it and/or modify dnl it under the terms of the GNU Lesser General Public License as published dnl by the Free Software Foundation; either version 3 of the License, or (at dnl your option) any later version. dnl dnl The GNU MP Library is distributed in the hope that it will be useful, but dnl WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY dnl or FITNESS FOR A PARTICULAR PURPOSE. See the GNU Lesser General Public dnl License for more details. dnl dnl You should have received a copy of the GNU Lesser General Public License dnl along with the GNU MP Library. If not, see http://www.gnu.org/licenses/. include(`../config.m4') C TODO C * Check if 'jmp N(%esp)' is well-predicted enough to allow us to combine the C 4 large loops into one; we could use it for the outer loop branch. C * Optimise code outside of inner loops. C * Write combined addmul_1 feed-in a wind-down code, and use when iterating C outer each loop. ("Overlapping software pipelining") C * Postpone push of ebx until we know vn > 1. Perhaps use caller-saves regs C for inlined mul_1, allowing us to postpone all pushes. C * Perhaps write special code for vn <= un < M, for some small M. C void mpn_mul_basecase (mp_ptr wp, C mp_srcptr xp, mp_size_t xn, C mp_srcptr yp, mp_size_t yn); C define(`rp', `%edi') define(`up', `%esi') define(`un', `%ecx') define(`vp', `%ebp') define(`vn', `36(%esp)') TEXT ALIGN(16) PROLOGUE(mpn_mul_basecase) push %edi push %esi push %ebx push %ebp mov 20(%esp), rp mov 24(%esp), up mov 28(%esp), un mov 32(%esp), vp movd (up), %mm0 movd (vp), %mm7 pmuludq %mm7, %mm0 pxor %mm6, %mm6 mov un, %eax and $3, %eax jz L(of0) cmp $2, %eax jc L(of1) jz L(of2) C ================================================================ jmp L(m3) ALIGN(16) L(lm3): movd -4(up), %mm0 pmuludq %mm7, %mm0 psrlq $32, %mm6 lea 16(rp), rp paddq %mm0, %mm6 movd (up), %mm0 pmuludq %mm7, %mm0 movd %mm6, -4(rp) psrlq $32, %mm6 L(m3): paddq %mm0, %mm6 movd 4(up), %mm0 pmuludq %mm7, %mm0 movd %mm6, (rp) psrlq $32, %mm6 paddq %mm0, %mm6 movd 8(up), %mm0 pmuludq %mm7, %mm0 movd %mm6, 4(rp) psrlq $32, %mm6 paddq %mm0, %mm6 sub $4, un movd %mm6, 8(rp) lea 16(up), up ja L(lm3) psrlq $32, %mm6 movd %mm6, 12(rp) decl vn jz L(done) lea -8(rp), rp L(ol3): mov 28(%esp), un neg un lea 4(vp), vp movd (vp), %mm7 C read next V limb mov 24(%esp), up lea 16(rp,un,4), rp movd (up), %mm0 pmuludq %mm7, %mm0 sar $2, un movd 4(up), %mm1 movd %mm0, %ebx pmuludq %mm7, %mm1 lea -8(up), up xor %edx, %edx C zero edx and CF jmp L(a3) L(la3): movd 4(up), %mm1 adc $0, %edx add %eax, 12(rp) movd %mm0, %ebx pmuludq %mm7, %mm1 lea 16(rp), rp psrlq $32, %mm0 adc %edx, %ebx movd %mm0, %edx movd %mm1, %eax movd 8(up), %mm0 pmuludq %mm7, %mm0 adc $0, %edx add %ebx, (rp) psrlq $32, %mm1 adc %edx, %eax movd %mm1, %edx movd %mm0, %ebx movd 12(up), %mm1 pmuludq %mm7, %mm1 adc $0, %edx add %eax, 4(rp) L(a3): psrlq $32, %mm0 adc %edx, %ebx movd %mm0, %edx movd %mm1, %eax lea 16(up), up movd (up), %mm0 adc $0, %edx add %ebx, 8(rp) psrlq $32, %mm1 adc %edx, %eax movd %mm1, %edx pmuludq %mm7, %mm0 inc un jnz L(la3) adc un, %edx C un is zero here add %eax, 12(rp) movd %mm0, %ebx psrlq $32, %mm0 adc %edx, %ebx movd %mm0, %eax adc un, %eax add %ebx, 16(rp) adc un, %eax mov %eax, 20(rp) decl vn jnz L(ol3) jmp L(done) C ================================================================ ALIGN(16) L(lm0): movd (up), %mm0 pmuludq %mm7, %mm0 psrlq $32, %mm6 lea 16(rp), rp L(of0): paddq %mm0, %mm6 movd 4(up), %mm0 pmuludq %mm7, %mm0 movd %mm6, (rp) psrlq $32, %mm6 paddq %mm0, %mm6 movd 8(up), %mm0 pmuludq %mm7, %mm0 movd %mm6, 4(rp) psrlq $32, %mm6 paddq %mm0, %mm6 movd 12(up), %mm0 pmuludq %mm7, %mm0 movd %mm6, 8(rp) psrlq $32, %mm6 paddq %mm0, %mm6 sub $4, un movd %mm6, 12(rp) lea 16(up), up ja L(lm0) psrlq $32, %mm6 movd %mm6, 16(rp) decl vn jz L(done) lea -4(rp), rp L(ol0): mov 28(%esp), un neg un lea 4(vp), vp movd (vp), %mm7 C read next V limb mov 24(%esp), up lea 20(rp,un,4), rp movd (up), %mm1 pmuludq %mm7, %mm1 sar $2, un movd 4(up), %mm0 lea -4(up), up movd %mm1, %eax pmuludq %mm7, %mm0 xor %edx, %edx C zero edx and CF jmp L(a0) L(la0): movd 4(up), %mm1 adc $0, %edx add %eax, 12(rp) movd %mm0, %ebx pmuludq %mm7, %mm1 lea 16(rp), rp psrlq $32, %mm0 adc %edx, %ebx movd %mm0, %edx movd %mm1, %eax movd 8(up), %mm0 pmuludq %mm7, %mm0 adc $0, %edx add %ebx, (rp) L(a0): psrlq $32, %mm1 adc %edx, %eax movd %mm1, %edx movd %mm0, %ebx movd 12(up), %mm1 pmuludq %mm7, %mm1 adc $0, %edx add %eax, 4(rp) psrlq $32, %mm0 adc %edx, %ebx movd %mm0, %edx movd %mm1, %eax lea 16(up), up movd (up), %mm0 adc $0, %edx add %ebx, 8(rp) psrlq $32, %mm1 adc %edx, %eax movd %mm1, %edx pmuludq %mm7, %mm0 inc un jnz L(la0) adc un, %edx C un is zero here add %eax, 12(rp) movd %mm0, %ebx psrlq $32, %mm0 adc %edx, %ebx movd %mm0, %eax adc un, %eax add %ebx, 16(rp) adc un, %eax mov %eax, 20(rp) decl vn jnz L(ol0) jmp L(done) C ================================================================ ALIGN(16) L(lm1): movd -12(up), %mm0 pmuludq %mm7, %mm0 psrlq $32, %mm6 lea 16(rp), rp paddq %mm0, %mm6 movd -8(up), %mm0 pmuludq %mm7, %mm0 movd %mm6, -12(rp) psrlq $32, %mm6 paddq %mm0, %mm6 movd -4(up), %mm0 pmuludq %mm7, %mm0 movd %mm6, -8(rp) psrlq $32, %mm6 paddq %mm0, %mm6 movd (up), %mm0 pmuludq %mm7, %mm0 movd %mm6, -4(rp) psrlq $32, %mm6 L(of1): paddq %mm0, %mm6 sub $4, un movd %mm6, (rp) lea 16(up), up ja L(lm1) psrlq $32, %mm6 movd %mm6, 4(rp) decl vn jz L(done) lea -16(rp), rp L(ol1): mov 28(%esp), un neg un lea 4(vp), vp movd (vp), %mm7 C read next V limb mov 24(%esp), up lea 24(rp,un,4), rp movd (up), %mm0 pmuludq %mm7, %mm0 sar $2, un movd %mm0, %ebx movd 4(up), %mm1 pmuludq %mm7, %mm1 xor %edx, %edx C zero edx and CF inc un jmp L(a1) L(la1): movd 4(up), %mm1 adc $0, %edx add %eax, 12(rp) movd %mm0, %ebx pmuludq %mm7, %mm1 lea 16(rp), rp L(a1): psrlq $32, %mm0 adc %edx, %ebx movd %mm0, %edx movd %mm1, %eax movd 8(up), %mm0 pmuludq %mm7, %mm0 adc $0, %edx add %ebx, (rp) psrlq $32, %mm1 adc %edx, %eax movd %mm1, %edx movd %mm0, %ebx movd 12(up), %mm1 pmuludq %mm7, %mm1 adc $0, %edx add %eax, 4(rp) psrlq $32, %mm0 adc %edx, %ebx movd %mm0, %edx movd %mm1, %eax lea 16(up), up movd (up), %mm0 adc $0, %edx add %ebx, 8(rp) psrlq $32, %mm1 adc %edx, %eax movd %mm1, %edx pmuludq %mm7, %mm0 inc un jnz L(la1) adc un, %edx C un is zero here add %eax, 12(rp) movd %mm0, %ebx psrlq $32, %mm0 adc %edx, %ebx movd %mm0, %eax adc un, %eax add %ebx, 16(rp) adc un, %eax mov %eax, 20(rp) decl vn jnz L(ol1) jmp L(done) C ================================================================ ALIGN(16) L(lm2): movd -8(up), %mm0 pmuludq %mm7, %mm0 psrlq $32, %mm6 lea 16(rp), rp paddq %mm0, %mm6 movd -4(up), %mm0 pmuludq %mm7, %mm0 movd %mm6, -8(rp) psrlq $32, %mm6 paddq %mm0, %mm6 movd (up), %mm0 pmuludq %mm7, %mm0 movd %mm6, -4(rp) psrlq $32, %mm6 L(of2): paddq %mm0, %mm6 movd 4(up), %mm0 pmuludq %mm7, %mm0 movd %mm6, (rp) psrlq $32, %mm6 paddq %mm0, %mm6 sub $4, un movd %mm6, 4(rp) lea 16(up), up ja L(lm2) psrlq $32, %mm6 movd %mm6, 8(rp) decl vn jz L(done) lea -12(rp), rp L(ol2): mov 28(%esp), un neg un lea 4(vp), vp movd (vp), %mm7 C read next V limb mov 24(%esp), up lea 12(rp,un,4), rp movd (up), %mm1 pmuludq %mm7, %mm1 sar $2, un movd 4(up), %mm0 lea 4(up), up movd %mm1, %eax xor %edx, %edx C zero edx and CF jmp L(lo2) L(la2): movd 4(up), %mm1 adc $0, %edx add %eax, 12(rp) movd %mm0, %ebx pmuludq %mm7, %mm1 lea 16(rp), rp psrlq $32, %mm0 adc %edx, %ebx movd %mm0, %edx movd %mm1, %eax movd 8(up), %mm0 pmuludq %mm7, %mm0 adc $0, %edx add %ebx, (rp) psrlq $32, %mm1 adc %edx, %eax movd %mm1, %edx movd %mm0, %ebx movd 12(up), %mm1 pmuludq %mm7, %mm1 adc $0, %edx add %eax, 4(rp) psrlq $32, %mm0 adc %edx, %ebx movd %mm0, %edx movd %mm1, %eax lea 16(up), up movd (up), %mm0 adc $0, %edx add %ebx, 8(rp) L(lo2): psrlq $32, %mm1 adc %edx, %eax movd %mm1, %edx pmuludq %mm7, %mm0 inc un jnz L(la2) adc un, %edx C un is zero here add %eax, 12(rp) movd %mm0, %ebx psrlq $32, %mm0 adc %edx, %ebx movd %mm0, %eax adc un, %eax add %ebx, 16(rp) adc un, %eax mov %eax, 20(rp) decl vn jnz L(ol2) C jmp L(done) C ================================================================ L(done): emms pop %ebp pop %ebx pop %esi pop %edi ret EPILOGUE() @ 1.1.1.1 log @initial import GMP 5.1.3 sources. changes include: fixes for: - mpn_sbpi1_div_qr_sec and mpn_sbpi1_div_r_sec - mpz_powm_ui - AMD family 11h - mpz_powm_sec and mpn_powm_sec - ASSERT() fixes - gcd, gcdext, and invert function fixes - some PPC division operations @ text @@ 1.1.1.2 log @initial import of GMP 6.1.2. main changes from 5.1.3 below. notes: - support for thumb-less ARM chips was in our port of 5.1.3, but a similar method has been provided upstream now - someone should look at the AVX failure reports, and fix them Changes between GMP version 6.1.0 and 6.1.1 FEATURES * Work around faulty cpuid on some recent Intel chips (this allows GMP to run on Skylake Pentiums). * Support thumb-less ARM chips. Changes between GMP version 6.0.* and 6.1.0 BUGS FIXED * The public function mpn_com is now correctly declared in gmp.h. * Healed possible failures of mpn_sec_sqr for non-cryptographic sizes for some obsolete CPUs. * Various problems related to precision for mpf have been fixed. * Fixed ABI incompatible stack alignment in calls from assembly code. * Fixed PIC bug in popcount affecting Intel processors using the 32-bit ABI. SPEEDUPS * Speedup for Intel Broadwell and Skylake through assembly code making use of new ADX instructions. * Square root is now faster when the remainder is not needed. Also the speed to compute the k-th root improved, for small sizes. FEATURES * New C++ functions gcd and lcm for mpz_class. * New public mpn functions mpn_divexact_1, mpn_zero_p, and mpn_cnd_swap. * New public mpq_cmp_z function, to efficiently compare rationals with integers. * Support for more 32-bit arm processors. * Support for AVX-less modern x86 CPUs. (Such support might be missing either because the CPU vendor chose to disable AVX, or because the running kernel lacks AVX context switch support.) * Support for NetBSD under Xen; we switch off AVX unconditionally under NetBSD since a bug in NetBSD makes AVX fail under Xen. MISC * Tuned values for FFT multiplications are provided for larger number on many platforms. Changes between GMP version 5.1.* and 6.0.0 BUGS FIXED * The function mpz_invert now considers any number invertible in Z/1Z. * The mpn multiply code now handles operands of more than 2^31 limbs correctly. (Note however that the mpz code is limited to 2^32 bits on 32-bit hosts and 2^37 bits on 64-bit hosts.) SPEEDUPS * Plain division of large operands is faster and more monotonous in operand size. * Major speedup for ARM, in particular ARM Cortex-A15, thanks to improved assembly. * Speedup for Intel Sandy Bridge, Ivy Bridge, Haswell, thanks to rewritten and vastly expanded assembly support. Speedup also for the older Core 2 and Nehalem. * Faster mixed arithmetic between mpq_class and double. FEATURES * Support for new Intel and AMD CPUs. * New public functions mpn_sec_mul and mpn_sec_sqr, implementing side-channel silent multiplication and squaring. * New public functions mpn_sec_div_qr and mpn_sec_div_r, implementing side-channel silent division. * New public functions mpn_cnd_add_n and mpn_cnd_sub_n. Side-channel silent conditional addition and subtraction. * New public function mpn_sec_powm, implementing side-channel silent modexp. * New public function mpn_sec_invert, implementing side-channel silent modular inversion. * Better support for applications which use the mpz_t type, but nevertheless need to call some of the lower-level mpn functions. See the documentation for mpz_limbs_read and related functions. @ text @d5 1 a5 1 d7 1 a7 1 d11 3 a13 13 dnl it under the terms of either: dnl dnl * the GNU Lesser General Public License as published by the Free dnl Software Foundation; either version 3 of the License, or (at your dnl option) any later version. dnl dnl or dnl dnl * the GNU General Public License as published by the Free Software dnl Foundation; either version 2 of the License, or (at your option) any dnl later version. dnl dnl or both in parallel, as here. d17 2 a18 2 dnl or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License dnl for more details. d20 2 a21 3 dnl You should have received copies of the GNU General Public License and the dnl GNU Lesser General Public License along with the GNU MP Library. If not, dnl see https://www.gnu.org/licenses/. @ 1.1.1.1.8.1 log @file mul_basecase.asm was added on branch tls-maxphys on 2014-08-19 23:59:54 +0000 @ text @d1 490 @ 1.1.1.1.8.2 log @Rebase to HEAD as of a few days ago. @ text @a0 490 dnl x86 mpn_mul_basecase -- Multiply two limb vectors and store the result in dnl a third limb vector. dnl Contributed to the GNU project by Torbjorn Granlund and Marco Bodrato. dnl dnl Copyright 2011 Free Software Foundation, Inc. dnl dnl This file is part of the GNU MP Library. dnl dnl The GNU MP Library is free software; you can redistribute it and/or modify dnl it under the terms of the GNU Lesser General Public License as published dnl by the Free Software Foundation; either version 3 of the License, or (at dnl your option) any later version. dnl dnl The GNU MP Library is distributed in the hope that it will be useful, but dnl WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY dnl or FITNESS FOR A PARTICULAR PURPOSE. See the GNU Lesser General Public dnl License for more details. dnl dnl You should have received a copy of the GNU Lesser General Public License dnl along with the GNU MP Library. If not, see http://www.gnu.org/licenses/. include(`../config.m4') C TODO C * Check if 'jmp N(%esp)' is well-predicted enough to allow us to combine the C 4 large loops into one; we could use it for the outer loop branch. C * Optimise code outside of inner loops. C * Write combined addmul_1 feed-in a wind-down code, and use when iterating C outer each loop. ("Overlapping software pipelining") C * Postpone push of ebx until we know vn > 1. Perhaps use caller-saves regs C for inlined mul_1, allowing us to postpone all pushes. C * Perhaps write special code for vn <= un < M, for some small M. C void mpn_mul_basecase (mp_ptr wp, C mp_srcptr xp, mp_size_t xn, C mp_srcptr yp, mp_size_t yn); C define(`rp', `%edi') define(`up', `%esi') define(`un', `%ecx') define(`vp', `%ebp') define(`vn', `36(%esp)') TEXT ALIGN(16) PROLOGUE(mpn_mul_basecase) push %edi push %esi push %ebx push %ebp mov 20(%esp), rp mov 24(%esp), up mov 28(%esp), un mov 32(%esp), vp movd (up), %mm0 movd (vp), %mm7 pmuludq %mm7, %mm0 pxor %mm6, %mm6 mov un, %eax and $3, %eax jz L(of0) cmp $2, %eax jc L(of1) jz L(of2) C ================================================================ jmp L(m3) ALIGN(16) L(lm3): movd -4(up), %mm0 pmuludq %mm7, %mm0 psrlq $32, %mm6 lea 16(rp), rp paddq %mm0, %mm6 movd (up), %mm0 pmuludq %mm7, %mm0 movd %mm6, -4(rp) psrlq $32, %mm6 L(m3): paddq %mm0, %mm6 movd 4(up), %mm0 pmuludq %mm7, %mm0 movd %mm6, (rp) psrlq $32, %mm6 paddq %mm0, %mm6 movd 8(up), %mm0 pmuludq %mm7, %mm0 movd %mm6, 4(rp) psrlq $32, %mm6 paddq %mm0, %mm6 sub $4, un movd %mm6, 8(rp) lea 16(up), up ja L(lm3) psrlq $32, %mm6 movd %mm6, 12(rp) decl vn jz L(done) lea -8(rp), rp L(ol3): mov 28(%esp), un neg un lea 4(vp), vp movd (vp), %mm7 C read next V limb mov 24(%esp), up lea 16(rp,un,4), rp movd (up), %mm0 pmuludq %mm7, %mm0 sar $2, un movd 4(up), %mm1 movd %mm0, %ebx pmuludq %mm7, %mm1 lea -8(up), up xor %edx, %edx C zero edx and CF jmp L(a3) L(la3): movd 4(up), %mm1 adc $0, %edx add %eax, 12(rp) movd %mm0, %ebx pmuludq %mm7, %mm1 lea 16(rp), rp psrlq $32, %mm0 adc %edx, %ebx movd %mm0, %edx movd %mm1, %eax movd 8(up), %mm0 pmuludq %mm7, %mm0 adc $0, %edx add %ebx, (rp) psrlq $32, %mm1 adc %edx, %eax movd %mm1, %edx movd %mm0, %ebx movd 12(up), %mm1 pmuludq %mm7, %mm1 adc $0, %edx add %eax, 4(rp) L(a3): psrlq $32, %mm0 adc %edx, %ebx movd %mm0, %edx movd %mm1, %eax lea 16(up), up movd (up), %mm0 adc $0, %edx add %ebx, 8(rp) psrlq $32, %mm1 adc %edx, %eax movd %mm1, %edx pmuludq %mm7, %mm0 inc un jnz L(la3) adc un, %edx C un is zero here add %eax, 12(rp) movd %mm0, %ebx psrlq $32, %mm0 adc %edx, %ebx movd %mm0, %eax adc un, %eax add %ebx, 16(rp) adc un, %eax mov %eax, 20(rp) decl vn jnz L(ol3) jmp L(done) C ================================================================ ALIGN(16) L(lm0): movd (up), %mm0 pmuludq %mm7, %mm0 psrlq $32, %mm6 lea 16(rp), rp L(of0): paddq %mm0, %mm6 movd 4(up), %mm0 pmuludq %mm7, %mm0 movd %mm6, (rp) psrlq $32, %mm6 paddq %mm0, %mm6 movd 8(up), %mm0 pmuludq %mm7, %mm0 movd %mm6, 4(rp) psrlq $32, %mm6 paddq %mm0, %mm6 movd 12(up), %mm0 pmuludq %mm7, %mm0 movd %mm6, 8(rp) psrlq $32, %mm6 paddq %mm0, %mm6 sub $4, un movd %mm6, 12(rp) lea 16(up), up ja L(lm0) psrlq $32, %mm6 movd %mm6, 16(rp) decl vn jz L(done) lea -4(rp), rp L(ol0): mov 28(%esp), un neg un lea 4(vp), vp movd (vp), %mm7 C read next V limb mov 24(%esp), up lea 20(rp,un,4), rp movd (up), %mm1 pmuludq %mm7, %mm1 sar $2, un movd 4(up), %mm0 lea -4(up), up movd %mm1, %eax pmuludq %mm7, %mm0 xor %edx, %edx C zero edx and CF jmp L(a0) L(la0): movd 4(up), %mm1 adc $0, %edx add %eax, 12(rp) movd %mm0, %ebx pmuludq %mm7, %mm1 lea 16(rp), rp psrlq $32, %mm0 adc %edx, %ebx movd %mm0, %edx movd %mm1, %eax movd 8(up), %mm0 pmuludq %mm7, %mm0 adc $0, %edx add %ebx, (rp) L(a0): psrlq $32, %mm1 adc %edx, %eax movd %mm1, %edx movd %mm0, %ebx movd 12(up), %mm1 pmuludq %mm7, %mm1 adc $0, %edx add %eax, 4(rp) psrlq $32, %mm0 adc %edx, %ebx movd %mm0, %edx movd %mm1, %eax lea 16(up), up movd (up), %mm0 adc $0, %edx add %ebx, 8(rp) psrlq $32, %mm1 adc %edx, %eax movd %mm1, %edx pmuludq %mm7, %mm0 inc un jnz L(la0) adc un, %edx C un is zero here add %eax, 12(rp) movd %mm0, %ebx psrlq $32, %mm0 adc %edx, %ebx movd %mm0, %eax adc un, %eax add %ebx, 16(rp) adc un, %eax mov %eax, 20(rp) decl vn jnz L(ol0) jmp L(done) C ================================================================ ALIGN(16) L(lm1): movd -12(up), %mm0 pmuludq %mm7, %mm0 psrlq $32, %mm6 lea 16(rp), rp paddq %mm0, %mm6 movd -8(up), %mm0 pmuludq %mm7, %mm0 movd %mm6, -12(rp) psrlq $32, %mm6 paddq %mm0, %mm6 movd -4(up), %mm0 pmuludq %mm7, %mm0 movd %mm6, -8(rp) psrlq $32, %mm6 paddq %mm0, %mm6 movd (up), %mm0 pmuludq %mm7, %mm0 movd %mm6, -4(rp) psrlq $32, %mm6 L(of1): paddq %mm0, %mm6 sub $4, un movd %mm6, (rp) lea 16(up), up ja L(lm1) psrlq $32, %mm6 movd %mm6, 4(rp) decl vn jz L(done) lea -16(rp), rp L(ol1): mov 28(%esp), un neg un lea 4(vp), vp movd (vp), %mm7 C read next V limb mov 24(%esp), up lea 24(rp,un,4), rp movd (up), %mm0 pmuludq %mm7, %mm0 sar $2, un movd %mm0, %ebx movd 4(up), %mm1 pmuludq %mm7, %mm1 xor %edx, %edx C zero edx and CF inc un jmp L(a1) L(la1): movd 4(up), %mm1 adc $0, %edx add %eax, 12(rp) movd %mm0, %ebx pmuludq %mm7, %mm1 lea 16(rp), rp L(a1): psrlq $32, %mm0 adc %edx, %ebx movd %mm0, %edx movd %mm1, %eax movd 8(up), %mm0 pmuludq %mm7, %mm0 adc $0, %edx add %ebx, (rp) psrlq $32, %mm1 adc %edx, %eax movd %mm1, %edx movd %mm0, %ebx movd 12(up), %mm1 pmuludq %mm7, %mm1 adc $0, %edx add %eax, 4(rp) psrlq $32, %mm0 adc %edx, %ebx movd %mm0, %edx movd %mm1, %eax lea 16(up), up movd (up), %mm0 adc $0, %edx add %ebx, 8(rp) psrlq $32, %mm1 adc %edx, %eax movd %mm1, %edx pmuludq %mm7, %mm0 inc un jnz L(la1) adc un, %edx C un is zero here add %eax, 12(rp) movd %mm0, %ebx psrlq $32, %mm0 adc %edx, %ebx movd %mm0, %eax adc un, %eax add %ebx, 16(rp) adc un, %eax mov %eax, 20(rp) decl vn jnz L(ol1) jmp L(done) C ================================================================ ALIGN(16) L(lm2): movd -8(up), %mm0 pmuludq %mm7, %mm0 psrlq $32, %mm6 lea 16(rp), rp paddq %mm0, %mm6 movd -4(up), %mm0 pmuludq %mm7, %mm0 movd %mm6, -8(rp) psrlq $32, %mm6 paddq %mm0, %mm6 movd (up), %mm0 pmuludq %mm7, %mm0 movd %mm6, -4(rp) psrlq $32, %mm6 L(of2): paddq %mm0, %mm6 movd 4(up), %mm0 pmuludq %mm7, %mm0 movd %mm6, (rp) psrlq $32, %mm6 paddq %mm0, %mm6 sub $4, un movd %mm6, 4(rp) lea 16(up), up ja L(lm2) psrlq $32, %mm6 movd %mm6, 8(rp) decl vn jz L(done) lea -12(rp), rp L(ol2): mov 28(%esp), un neg un lea 4(vp), vp movd (vp), %mm7 C read next V limb mov 24(%esp), up lea 12(rp,un,4), rp movd (up), %mm1 pmuludq %mm7, %mm1 sar $2, un movd 4(up), %mm0 lea 4(up), up movd %mm1, %eax xor %edx, %edx C zero edx and CF jmp L(lo2) L(la2): movd 4(up), %mm1 adc $0, %edx add %eax, 12(rp) movd %mm0, %ebx pmuludq %mm7, %mm1 lea 16(rp), rp psrlq $32, %mm0 adc %edx, %ebx movd %mm0, %edx movd %mm1, %eax movd 8(up), %mm0 pmuludq %mm7, %mm0 adc $0, %edx add %ebx, (rp) psrlq $32, %mm1 adc %edx, %eax movd %mm1, %edx movd %mm0, %ebx movd 12(up), %mm1 pmuludq %mm7, %mm1 adc $0, %edx add %eax, 4(rp) psrlq $32, %mm0 adc %edx, %ebx movd %mm0, %edx movd %mm1, %eax lea 16(up), up movd (up), %mm0 adc $0, %edx add %ebx, 8(rp) L(lo2): psrlq $32, %mm1 adc %edx, %eax movd %mm1, %edx pmuludq %mm7, %mm0 inc un jnz L(la2) adc un, %edx C un is zero here add %eax, 12(rp) movd %mm0, %ebx psrlq $32, %mm0 adc %edx, %ebx movd %mm0, %eax adc un, %eax add %ebx, 16(rp) adc un, %eax mov %eax, 20(rp) decl vn jnz L(ol2) C jmp L(done) C ================================================================ L(done): emms pop %ebp pop %ebx pop %esi pop %edi ret EPILOGUE() @ 1.1.1.1.4.1 log @file mul_basecase.asm was added on branch yamt-pagecache on 2014-05-22 14:09:05 +0000 @ text @d1 490 @ 1.1.1.1.4.2 log @sync with head. for a reference, the tree before this commit was tagged as yamt-pagecache-tag8. this commit was splitted into small chunks to avoid a limitation of cvs. ("Protocol error: too many arguments") @ text @a0 490 dnl x86 mpn_mul_basecase -- Multiply two limb vectors and store the result in dnl a third limb vector. dnl Contributed to the GNU project by Torbjorn Granlund and Marco Bodrato. dnl dnl Copyright 2011 Free Software Foundation, Inc. dnl dnl This file is part of the GNU MP Library. dnl dnl The GNU MP Library is free software; you can redistribute it and/or modify dnl it under the terms of the GNU Lesser General Public License as published dnl by the Free Software Foundation; either version 3 of the License, or (at dnl your option) any later version. dnl dnl The GNU MP Library is distributed in the hope that it will be useful, but dnl WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY dnl or FITNESS FOR A PARTICULAR PURPOSE. See the GNU Lesser General Public dnl License for more details. dnl dnl You should have received a copy of the GNU Lesser General Public License dnl along with the GNU MP Library. If not, see http://www.gnu.org/licenses/. include(`../config.m4') C TODO C * Check if 'jmp N(%esp)' is well-predicted enough to allow us to combine the C 4 large loops into one; we could use it for the outer loop branch. C * Optimise code outside of inner loops. C * Write combined addmul_1 feed-in a wind-down code, and use when iterating C outer each loop. ("Overlapping software pipelining") C * Postpone push of ebx until we know vn > 1. Perhaps use caller-saves regs C for inlined mul_1, allowing us to postpone all pushes. C * Perhaps write special code for vn <= un < M, for some small M. C void mpn_mul_basecase (mp_ptr wp, C mp_srcptr xp, mp_size_t xn, C mp_srcptr yp, mp_size_t yn); C define(`rp', `%edi') define(`up', `%esi') define(`un', `%ecx') define(`vp', `%ebp') define(`vn', `36(%esp)') TEXT ALIGN(16) PROLOGUE(mpn_mul_basecase) push %edi push %esi push %ebx push %ebp mov 20(%esp), rp mov 24(%esp), up mov 28(%esp), un mov 32(%esp), vp movd (up), %mm0 movd (vp), %mm7 pmuludq %mm7, %mm0 pxor %mm6, %mm6 mov un, %eax and $3, %eax jz L(of0) cmp $2, %eax jc L(of1) jz L(of2) C ================================================================ jmp L(m3) ALIGN(16) L(lm3): movd -4(up), %mm0 pmuludq %mm7, %mm0 psrlq $32, %mm6 lea 16(rp), rp paddq %mm0, %mm6 movd (up), %mm0 pmuludq %mm7, %mm0 movd %mm6, -4(rp) psrlq $32, %mm6 L(m3): paddq %mm0, %mm6 movd 4(up), %mm0 pmuludq %mm7, %mm0 movd %mm6, (rp) psrlq $32, %mm6 paddq %mm0, %mm6 movd 8(up), %mm0 pmuludq %mm7, %mm0 movd %mm6, 4(rp) psrlq $32, %mm6 paddq %mm0, %mm6 sub $4, un movd %mm6, 8(rp) lea 16(up), up ja L(lm3) psrlq $32, %mm6 movd %mm6, 12(rp) decl vn jz L(done) lea -8(rp), rp L(ol3): mov 28(%esp), un neg un lea 4(vp), vp movd (vp), %mm7 C read next V limb mov 24(%esp), up lea 16(rp,un,4), rp movd (up), %mm0 pmuludq %mm7, %mm0 sar $2, un movd 4(up), %mm1 movd %mm0, %ebx pmuludq %mm7, %mm1 lea -8(up), up xor %edx, %edx C zero edx and CF jmp L(a3) L(la3): movd 4(up), %mm1 adc $0, %edx add %eax, 12(rp) movd %mm0, %ebx pmuludq %mm7, %mm1 lea 16(rp), rp psrlq $32, %mm0 adc %edx, %ebx movd %mm0, %edx movd %mm1, %eax movd 8(up), %mm0 pmuludq %mm7, %mm0 adc $0, %edx add %ebx, (rp) psrlq $32, %mm1 adc %edx, %eax movd %mm1, %edx movd %mm0, %ebx movd 12(up), %mm1 pmuludq %mm7, %mm1 adc $0, %edx add %eax, 4(rp) L(a3): psrlq $32, %mm0 adc %edx, %ebx movd %mm0, %edx movd %mm1, %eax lea 16(up), up movd (up), %mm0 adc $0, %edx add %ebx, 8(rp) psrlq $32, %mm1 adc %edx, %eax movd %mm1, %edx pmuludq %mm7, %mm0 inc un jnz L(la3) adc un, %edx C un is zero here add %eax, 12(rp) movd %mm0, %ebx psrlq $32, %mm0 adc %edx, %ebx movd %mm0, %eax adc un, %eax add %ebx, 16(rp) adc un, %eax mov %eax, 20(rp) decl vn jnz L(ol3) jmp L(done) C ================================================================ ALIGN(16) L(lm0): movd (up), %mm0 pmuludq %mm7, %mm0 psrlq $32, %mm6 lea 16(rp), rp L(of0): paddq %mm0, %mm6 movd 4(up), %mm0 pmuludq %mm7, %mm0 movd %mm6, (rp) psrlq $32, %mm6 paddq %mm0, %mm6 movd 8(up), %mm0 pmuludq %mm7, %mm0 movd %mm6, 4(rp) psrlq $32, %mm6 paddq %mm0, %mm6 movd 12(up), %mm0 pmuludq %mm7, %mm0 movd %mm6, 8(rp) psrlq $32, %mm6 paddq %mm0, %mm6 sub $4, un movd %mm6, 12(rp) lea 16(up), up ja L(lm0) psrlq $32, %mm6 movd %mm6, 16(rp) decl vn jz L(done) lea -4(rp), rp L(ol0): mov 28(%esp), un neg un lea 4(vp), vp movd (vp), %mm7 C read next V limb mov 24(%esp), up lea 20(rp,un,4), rp movd (up), %mm1 pmuludq %mm7, %mm1 sar $2, un movd 4(up), %mm0 lea -4(up), up movd %mm1, %eax pmuludq %mm7, %mm0 xor %edx, %edx C zero edx and CF jmp L(a0) L(la0): movd 4(up), %mm1 adc $0, %edx add %eax, 12(rp) movd %mm0, %ebx pmuludq %mm7, %mm1 lea 16(rp), rp psrlq $32, %mm0 adc %edx, %ebx movd %mm0, %edx movd %mm1, %eax movd 8(up), %mm0 pmuludq %mm7, %mm0 adc $0, %edx add %ebx, (rp) L(a0): psrlq $32, %mm1 adc %edx, %eax movd %mm1, %edx movd %mm0, %ebx movd 12(up), %mm1 pmuludq %mm7, %mm1 adc $0, %edx add %eax, 4(rp) psrlq $32, %mm0 adc %edx, %ebx movd %mm0, %edx movd %mm1, %eax lea 16(up), up movd (up), %mm0 adc $0, %edx add %ebx, 8(rp) psrlq $32, %mm1 adc %edx, %eax movd %mm1, %edx pmuludq %mm7, %mm0 inc un jnz L(la0) adc un, %edx C un is zero here add %eax, 12(rp) movd %mm0, %ebx psrlq $32, %mm0 adc %edx, %ebx movd %mm0, %eax adc un, %eax add %ebx, 16(rp) adc un, %eax mov %eax, 20(rp) decl vn jnz L(ol0) jmp L(done) C ================================================================ ALIGN(16) L(lm1): movd -12(up), %mm0 pmuludq %mm7, %mm0 psrlq $32, %mm6 lea 16(rp), rp paddq %mm0, %mm6 movd -8(up), %mm0 pmuludq %mm7, %mm0 movd %mm6, -12(rp) psrlq $32, %mm6 paddq %mm0, %mm6 movd -4(up), %mm0 pmuludq %mm7, %mm0 movd %mm6, -8(rp) psrlq $32, %mm6 paddq %mm0, %mm6 movd (up), %mm0 pmuludq %mm7, %mm0 movd %mm6, -4(rp) psrlq $32, %mm6 L(of1): paddq %mm0, %mm6 sub $4, un movd %mm6, (rp) lea 16(up), up ja L(lm1) psrlq $32, %mm6 movd %mm6, 4(rp) decl vn jz L(done) lea -16(rp), rp L(ol1): mov 28(%esp), un neg un lea 4(vp), vp movd (vp), %mm7 C read next V limb mov 24(%esp), up lea 24(rp,un,4), rp movd (up), %mm0 pmuludq %mm7, %mm0 sar $2, un movd %mm0, %ebx movd 4(up), %mm1 pmuludq %mm7, %mm1 xor %edx, %edx C zero edx and CF inc un jmp L(a1) L(la1): movd 4(up), %mm1 adc $0, %edx add %eax, 12(rp) movd %mm0, %ebx pmuludq %mm7, %mm1 lea 16(rp), rp L(a1): psrlq $32, %mm0 adc %edx, %ebx movd %mm0, %edx movd %mm1, %eax movd 8(up), %mm0 pmuludq %mm7, %mm0 adc $0, %edx add %ebx, (rp) psrlq $32, %mm1 adc %edx, %eax movd %mm1, %edx movd %mm0, %ebx movd 12(up), %mm1 pmuludq %mm7, %mm1 adc $0, %edx add %eax, 4(rp) psrlq $32, %mm0 adc %edx, %ebx movd %mm0, %edx movd %mm1, %eax lea 16(up), up movd (up), %mm0 adc $0, %edx add %ebx, 8(rp) psrlq $32, %mm1 adc %edx, %eax movd %mm1, %edx pmuludq %mm7, %mm0 inc un jnz L(la1) adc un, %edx C un is zero here add %eax, 12(rp) movd %mm0, %ebx psrlq $32, %mm0 adc %edx, %ebx movd %mm0, %eax adc un, %eax add %ebx, 16(rp) adc un, %eax mov %eax, 20(rp) decl vn jnz L(ol1) jmp L(done) C ================================================================ ALIGN(16) L(lm2): movd -8(up), %mm0 pmuludq %mm7, %mm0 psrlq $32, %mm6 lea 16(rp), rp paddq %mm0, %mm6 movd -4(up), %mm0 pmuludq %mm7, %mm0 movd %mm6, -8(rp) psrlq $32, %mm6 paddq %mm0, %mm6 movd (up), %mm0 pmuludq %mm7, %mm0 movd %mm6, -4(rp) psrlq $32, %mm6 L(of2): paddq %mm0, %mm6 movd 4(up), %mm0 pmuludq %mm7, %mm0 movd %mm6, (rp) psrlq $32, %mm6 paddq %mm0, %mm6 sub $4, un movd %mm6, 4(rp) lea 16(up), up ja L(lm2) psrlq $32, %mm6 movd %mm6, 8(rp) decl vn jz L(done) lea -12(rp), rp L(ol2): mov 28(%esp), un neg un lea 4(vp), vp movd (vp), %mm7 C read next V limb mov 24(%esp), up lea 12(rp,un,4), rp movd (up), %mm1 pmuludq %mm7, %mm1 sar $2, un movd 4(up), %mm0 lea 4(up), up movd %mm1, %eax xor %edx, %edx C zero edx and CF jmp L(lo2) L(la2): movd 4(up), %mm1 adc $0, %edx add %eax, 12(rp) movd %mm0, %ebx pmuludq %mm7, %mm1 lea 16(rp), rp psrlq $32, %mm0 adc %edx, %ebx movd %mm0, %edx movd %mm1, %eax movd 8(up), %mm0 pmuludq %mm7, %mm0 adc $0, %edx add %ebx, (rp) psrlq $32, %mm1 adc %edx, %eax movd %mm1, %edx movd %mm0, %ebx movd 12(up), %mm1 pmuludq %mm7, %mm1 adc $0, %edx add %eax, 4(rp) psrlq $32, %mm0 adc %edx, %ebx movd %mm0, %edx movd %mm1, %eax lea 16(up), up movd (up), %mm0 adc $0, %edx add %ebx, 8(rp) L(lo2): psrlq $32, %mm1 adc %edx, %eax movd %mm1, %edx pmuludq %mm7, %mm0 inc un jnz L(la2) adc un, %edx C un is zero here add %eax, 12(rp) movd %mm0, %ebx psrlq $32, %mm0 adc %edx, %ebx movd %mm0, %eax adc un, %eax add %ebx, 16(rp) adc un, %eax mov %eax, 20(rp) decl vn jnz L(ol2) C jmp L(done) C ================================================================ L(done): emms pop %ebp pop %ebx pop %esi pop %edi ret EPILOGUE() @