head 1.2; access; symbols perseant-exfatfs-base-20250801:1.2 perseant-exfatfs-base-20240630:1.2 perseant-exfatfs:1.2.0.2 perseant-exfatfs-base:1.2 netbsd-8-3-RELEASE:1.1.1.1 netbsd-9-4-RELEASE:1.1.1.2 netbsd-9-3-RELEASE:1.1.1.2 cjep_sun2x-base1:1.1.1.2 cjep_sun2x:1.1.1.2.0.12 cjep_sun2x-base:1.1.1.2 cjep_staticlib_x-base1:1.1.1.2 netbsd-9-2-RELEASE:1.1.1.2 cjep_staticlib_x:1.1.1.2.0.10 cjep_staticlib_x-base:1.1.1.2 netbsd-9-1-RELEASE:1.1.1.2 gmp-6-2-0:1.1.1.2 phil-wifi-20200421:1.1.1.2 phil-wifi-20200411:1.1.1.2 is-mlppp:1.1.1.2.0.8 is-mlppp-base:1.1.1.2 phil-wifi-20200406:1.1.1.2 netbsd-8-2-RELEASE:1.1.1.1 netbsd-9-0-RELEASE:1.1.1.2 netbsd-9-0-RC2:1.1.1.2 netbsd-9-0-RC1:1.1.1.2 phil-wifi-20191119:1.1.1.2 netbsd-9:1.1.1.2.0.6 netbsd-9-base:1.1.1.2 phil-wifi-20190609:1.1.1.2 netbsd-8-1-RELEASE:1.1.1.1 netbsd-8-1-RC1:1.1.1.1 pgoyette-compat-merge-20190127:1.1.1.2 pgoyette-compat-20190127:1.1.1.2 pgoyette-compat-20190118:1.1.1.2 pgoyette-compat-1226:1.1.1.2 pgoyette-compat-1126:1.1.1.2 pgoyette-compat-1020:1.1.1.2 pgoyette-compat-0930:1.1.1.2 pgoyette-compat-0906:1.1.1.2 netbsd-7-2-RELEASE:1.1.1.1 pgoyette-compat-0728:1.1.1.2 netbsd-8-0-RELEASE:1.1.1.1 phil-wifi:1.1.1.2.0.4 phil-wifi-base:1.1.1.2 pgoyette-compat-0625:1.1.1.2 netbsd-8-0-RC2:1.1.1.1 pgoyette-compat-0521:1.1.1.2 pgoyette-compat-0502:1.1.1.2 pgoyette-compat-0422:1.1.1.2 netbsd-8-0-RC1:1.1.1.1 pgoyette-compat-0415:1.1.1.2 pgoyette-compat-0407:1.1.1.2 pgoyette-compat-0330:1.1.1.2 pgoyette-compat-0322:1.1.1.2 pgoyette-compat-0315:1.1.1.2 netbsd-7-1-2-RELEASE:1.1.1.1 pgoyette-compat:1.1.1.2.0.2 pgoyette-compat-base:1.1.1.2 netbsd-7-1-1-RELEASE:1.1.1.1 matt-nb8-mediatek:1.1.1.1.0.26 matt-nb8-mediatek-base:1.1.1.1 gmp-6-1-2:1.1.1.2 perseant-stdc-iso10646:1.1.1.1.0.24 perseant-stdc-iso10646-base:1.1.1.1 netbsd-8:1.1.1.1.0.22 netbsd-8-base:1.1.1.1 prg-localcount2-base3:1.1.1.1 prg-localcount2-base2:1.1.1.1 prg-localcount2-base1:1.1.1.1 prg-localcount2:1.1.1.1.0.20 prg-localcount2-base:1.1.1.1 pgoyette-localcount-20170426:1.1.1.1 bouyer-socketcan-base1:1.1.1.1 pgoyette-localcount-20170320:1.1.1.1 netbsd-7-1:1.1.1.1.0.18 netbsd-7-1-RELEASE:1.1.1.1 netbsd-7-1-RC2:1.1.1.1 netbsd-7-nhusb-base-20170116:1.1.1.1 bouyer-socketcan:1.1.1.1.0.16 bouyer-socketcan-base:1.1.1.1 pgoyette-localcount-20170107:1.1.1.1 netbsd-7-1-RC1:1.1.1.1 pgoyette-localcount-20161104:1.1.1.1 netbsd-7-0-2-RELEASE:1.1.1.1 localcount-20160914:1.1.1.1 netbsd-7-nhusb:1.1.1.1.0.14 netbsd-7-nhusb-base:1.1.1.1 pgoyette-localcount-20160806:1.1.1.1 pgoyette-localcount-20160726:1.1.1.1 pgoyette-localcount:1.1.1.1.0.12 pgoyette-localcount-base:1.1.1.1 netbsd-7-0-1-RELEASE:1.1.1.1 netbsd-7-0:1.1.1.1.0.10 netbsd-7-0-RELEASE:1.1.1.1 netbsd-7-0-RC3:1.1.1.1 netbsd-7-0-RC2:1.1.1.1 netbsd-7-0-RC1:1.1.1.1 tls-maxphys-base:1.1.1.1 tls-maxphys:1.1.1.1.0.8 netbsd-7:1.1.1.1.0.6 netbsd-7-base:1.1.1.1 yamt-pagecache:1.1.1.1.0.4 yamt-pagecache-base9:1.1.1.1 tls-earlyentropy:1.1.1.1.0.2 tls-earlyentropy-base:1.1.1.1 riastradh-xf86-video-intel-2-7-1-pre-2-21-15:1.1.1.1 riastradh-drm2-base3:1.1.1.1 gmp-5-1-3:1.1.1.1 gmp:1.1.1; locks; strict; comment @;; @; 1.2 date 2021.07.11.21.15.45; author mrg; state dead; branches; next 1.1; commitid UkDd4YZ64jVf9C0D; 1.1 date 2013.11.29.07.49.48; author mrg; state Exp; branches 1.1.1.1; next ; commitid L2Av4PuGmdoL39fx; 1.1.1.1 date 2013.11.29.07.49.48; author mrg; state Exp; branches 1.1.1.1.4.1 1.1.1.1.8.1; next 1.1.1.2; commitid L2Av4PuGmdoL39fx; 1.1.1.2 date 2017.08.22.09.40.48; author mrg; state Exp; branches; next ; commitid W5kmAIk8hwVpSb4A; 1.1.1.1.4.1 date 2013.11.29.07.49.48; author yamt; state dead; branches; next 1.1.1.1.4.2; commitid nx2BSsHy0NPeAxBx; 1.1.1.1.4.2 date 2014.05.22.14.09.00; author yamt; state Exp; branches; next ; commitid nx2BSsHy0NPeAxBx; 1.1.1.1.8.1 date 2013.11.29.07.49.48; author tls; state dead; branches; next 1.1.1.1.8.2; commitid jTnpym9Qu0o4R1Nx; 1.1.1.1.8.2 date 2014.08.19.23.59.49; author tls; state Exp; branches; next ; commitid jTnpym9Qu0o4R1Nx; desc @@ 1.2 log @merge GMP 6.2.1. @ text @dnl ARM v5 mpn_gcd_1. dnl Based on the K7 gcd_1.asm, by Kevin Ryde. Rehacked for ARM by Torbjorn dnl Granlund. dnl Copyright 2000, 2001, 2002, 2005, 2009, 2011, 2012 Free Software dnl Foundation, Inc. dnl This file is part of the GNU MP Library. dnl The GNU MP Library is free software; you can redistribute it and/or modify dnl it under the terms of the GNU Lesser General Public License as published dnl by the Free Software Foundation; either version 3 of the License, or (at dnl your option) any later version. dnl The GNU MP Library is distributed in the hope that it will be useful, but dnl WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY dnl or FITNESS FOR A PARTICULAR PURPOSE. See the GNU Lesser General Public dnl License for more details. dnl You should have received a copy of the GNU Lesser General Public License dnl along with the GNU MP Library. If not, see http://www.gnu.org/licenses/. include(`../config.m4') C cycles/bit (approx) C StrongARM ? C XScale ? C Cortex-A8 ? C Cortex-A9 5.9 C Cortex-A15 ? C Numbers measured with: speed -CD -s8-32 -t24 mpn_gcd_1 C TODO C * Optimise inner-loop better. C Threshold of when to call bmod when U is one limb. Should be about C (time_in_cycles(bmod_1,1) + call_overhead) / (cycles/bit). define(`BMOD_THRES_LOG2', 6) C INPUT PARAMETERS define(`up', `r0') define(`n', `r1') define(`v0', `r2') ifdef(`BMOD_1_TO_MOD_1_THRESHOLD',, `define(`BMOD_1_TO_MOD_1_THRESHOLD',0xffffffff)') ASM_START() TEXT ALIGN(16) PROLOGUE(mpn_gcd_1) push {r4, r7, lr} ldr r3, [up] C U low limb orr r3, r3, v0 rsb r4, r3, #0 and r4, r4, r3 clz r4, r4 C min(ctz(u0),ctz(v0)) rsb r4, r4, #31 rsb r12, v0, #0 and r12, r12, v0 clz r12, r12 rsb r12, r12, #31 lsr v0, v0, r12 mov r7, v0 cmp n, #1 bne L(nby1) C Both U and V are single limbs, reduce with bmod if u0 >> v0. ldr r3, [up] cmp v0, r3, lsr #BMOD_THRES_LOG2 bhi L(red1) L(bmod):mov r3, #0 C carry argument bl mpn_modexact_1c_odd b L(red0) L(nby1):cmp n, #BMOD_1_TO_MOD_1_THRESHOLD blo L(bmod) bl mpn_mod_1 L(red0):mov r3, r0 L(red1):rsbs r12, r3, #0 and r12, r12, r3 clz r12, r12 rsb r12, r12, #31 bne L(mid) b L(end) ALIGN(8) L(top): rsb r12, r12, #31 movcc r3, r1 C if x-y < 0 movcc r7, r0 C use x,y-x L(mid): lsr r3, r3, r12 C mov r0, r3 C sub r1, r7, r3 C rsbs r3, r7, r3 C and r12, r1, r3 C clz r12, r12 C bne L(top) C L(end): lsl r0, r7, r4 pop {r4, r7, pc} EPILOGUE() @ 1.1 log @Initial revision @ text @@ 1.1.1.1 log @initial import GMP 5.1.3 sources. changes include: fixes for: - mpn_sbpi1_div_qr_sec and mpn_sbpi1_div_r_sec - mpz_powm_ui - AMD family 11h - mpz_powm_sec and mpn_powm_sec - ASSERT() fixes - gcd, gcdext, and invert function fixes - some PPC division operations @ text @@ 1.1.1.2 log @initial import of GMP 6.1.2. main changes from 5.1.3 below. notes: - support for thumb-less ARM chips was in our port of 5.1.3, but a similar method has been provided upstream now - someone should look at the AVX failure reports, and fix them Changes between GMP version 6.1.0 and 6.1.1 FEATURES * Work around faulty cpuid on some recent Intel chips (this allows GMP to run on Skylake Pentiums). * Support thumb-less ARM chips. Changes between GMP version 6.0.* and 6.1.0 BUGS FIXED * The public function mpn_com is now correctly declared in gmp.h. * Healed possible failures of mpn_sec_sqr for non-cryptographic sizes for some obsolete CPUs. * Various problems related to precision for mpf have been fixed. * Fixed ABI incompatible stack alignment in calls from assembly code. * Fixed PIC bug in popcount affecting Intel processors using the 32-bit ABI. SPEEDUPS * Speedup for Intel Broadwell and Skylake through assembly code making use of new ADX instructions. * Square root is now faster when the remainder is not needed. Also the speed to compute the k-th root improved, for small sizes. FEATURES * New C++ functions gcd and lcm for mpz_class. * New public mpn functions mpn_divexact_1, mpn_zero_p, and mpn_cnd_swap. * New public mpq_cmp_z function, to efficiently compare rationals with integers. * Support for more 32-bit arm processors. * Support for AVX-less modern x86 CPUs. (Such support might be missing either because the CPU vendor chose to disable AVX, or because the running kernel lacks AVX context switch support.) * Support for NetBSD under Xen; we switch off AVX unconditionally under NetBSD since a bug in NetBSD makes AVX fail under Xen. MISC * Tuned values for FFT multiplications are provided for larger number on many platforms. Changes between GMP version 5.1.* and 6.0.0 BUGS FIXED * The function mpz_invert now considers any number invertible in Z/1Z. * The mpn multiply code now handles operands of more than 2^31 limbs correctly. (Note however that the mpz code is limited to 2^32 bits on 32-bit hosts and 2^37 bits on 64-bit hosts.) SPEEDUPS * Plain division of large operands is faster and more monotonous in operand size. * Major speedup for ARM, in particular ARM Cortex-A15, thanks to improved assembly. * Speedup for Intel Sandy Bridge, Ivy Bridge, Haswell, thanks to rewritten and vastly expanded assembly support. Speedup also for the older Core 2 and Nehalem. * Faster mixed arithmetic between mpq_class and double. FEATURES * Support for new Intel and AMD CPUs. * New public functions mpn_sec_mul and mpn_sec_sqr, implementing side-channel silent multiplication and squaring. * New public functions mpn_sec_div_qr and mpn_sec_div_r, implementing side-channel silent division. * New public functions mpn_cnd_add_n and mpn_cnd_sub_n. Side-channel silent conditional addition and subtraction. * New public function mpn_sec_powm, implementing side-channel silent modexp. * New public function mpn_sec_invert, implementing side-channel silent modular inversion. * Better support for applications which use the mpz_t type, but nevertheless need to call some of the lower-level mpn functions. See the documentation for mpz_limbs_read and related functions. @ text @d3 1 a3 1 dnl Based on the K7 gcd_1.asm, by Kevin Ryde. Rehacked for ARM by Torbjörn d6 2 a7 1 dnl Copyright 2000-2002, 2005, 2009, 2011, 2012 Free Software Foundation, Inc. d10 1 a10 1 dnl d12 4 a15 14 dnl it under the terms of either: dnl dnl * the GNU Lesser General Public License as published by the Free dnl Software Foundation; either version 3 of the License, or (at your dnl option) any later version. dnl dnl or dnl dnl * the GNU General Public License as published by the Free Software dnl Foundation; either version 2 of the License, or (at your option) any dnl later version. dnl dnl or both in parallel, as here. dnl d18 5 a22 6 dnl or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License dnl for more details. dnl dnl You should have received copies of the GNU General Public License and the dnl GNU Lesser General Public License along with the GNU MP Library. If not, dnl see https://www.gnu.org/licenses/. d27 1 a27 1 C StrongARM - a28 1 C Cortex-A7 ? d66 1 a66 1 mov v0, v0, lsr r12 d99 1 a99 1 L(mid): mov r3, r3, lsr r12 C d107 1 a107 1 L(end): mov r0, r7, lsl r4 @ 1.1.1.1.8.1 log @file gcd_1.asm was added on branch tls-maxphys on 2014-08-19 23:59:49 +0000 @ text @d1 109 @ 1.1.1.1.8.2 log @Rebase to HEAD as of a few days ago. @ text @a0 109 dnl ARM v5 mpn_gcd_1. dnl Based on the K7 gcd_1.asm, by Kevin Ryde. Rehacked for ARM by Torbjorn dnl Granlund. dnl Copyright 2000, 2001, 2002, 2005, 2009, 2011, 2012 Free Software dnl Foundation, Inc. dnl This file is part of the GNU MP Library. dnl The GNU MP Library is free software; you can redistribute it and/or modify dnl it under the terms of the GNU Lesser General Public License as published dnl by the Free Software Foundation; either version 3 of the License, or (at dnl your option) any later version. dnl The GNU MP Library is distributed in the hope that it will be useful, but dnl WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY dnl or FITNESS FOR A PARTICULAR PURPOSE. See the GNU Lesser General Public dnl License for more details. dnl You should have received a copy of the GNU Lesser General Public License dnl along with the GNU MP Library. If not, see http://www.gnu.org/licenses/. include(`../config.m4') C cycles/bit (approx) C StrongARM ? C XScale ? C Cortex-A8 ? C Cortex-A9 5.9 C Cortex-A15 ? C Numbers measured with: speed -CD -s8-32 -t24 mpn_gcd_1 C TODO C * Optimise inner-loop better. C Threshold of when to call bmod when U is one limb. Should be about C (time_in_cycles(bmod_1,1) + call_overhead) / (cycles/bit). define(`BMOD_THRES_LOG2', 6) C INPUT PARAMETERS define(`up', `r0') define(`n', `r1') define(`v0', `r2') ifdef(`BMOD_1_TO_MOD_1_THRESHOLD',, `define(`BMOD_1_TO_MOD_1_THRESHOLD',0xffffffff)') ASM_START() TEXT ALIGN(16) PROLOGUE(mpn_gcd_1) push {r4, r7, lr} ldr r3, [up] C U low limb orr r3, r3, v0 rsb r4, r3, #0 and r4, r4, r3 clz r4, r4 C min(ctz(u0),ctz(v0)) rsb r4, r4, #31 rsb r12, v0, #0 and r12, r12, v0 clz r12, r12 rsb r12, r12, #31 lsr v0, v0, r12 mov r7, v0 cmp n, #1 bne L(nby1) C Both U and V are single limbs, reduce with bmod if u0 >> v0. ldr r3, [up] cmp v0, r3, lsr #BMOD_THRES_LOG2 bhi L(red1) L(bmod):mov r3, #0 C carry argument bl mpn_modexact_1c_odd b L(red0) L(nby1):cmp n, #BMOD_1_TO_MOD_1_THRESHOLD blo L(bmod) bl mpn_mod_1 L(red0):mov r3, r0 L(red1):rsbs r12, r3, #0 and r12, r12, r3 clz r12, r12 rsb r12, r12, #31 bne L(mid) b L(end) ALIGN(8) L(top): rsb r12, r12, #31 movcc r3, r1 C if x-y < 0 movcc r7, r0 C use x,y-x L(mid): lsr r3, r3, r12 C mov r0, r3 C sub r1, r7, r3 C rsbs r3, r7, r3 C and r12, r1, r3 C clz r12, r12 C bne L(top) C L(end): lsl r0, r7, r4 pop {r4, r7, pc} EPILOGUE() @ 1.1.1.1.4.1 log @file gcd_1.asm was added on branch yamt-pagecache on 2014-05-22 14:09:00 +0000 @ text @d1 109 @ 1.1.1.1.4.2 log @sync with head. for a reference, the tree before this commit was tagged as yamt-pagecache-tag8. this commit was splitted into small chunks to avoid a limitation of cvs. ("Protocol error: too many arguments") @ text @a0 109 dnl ARM v5 mpn_gcd_1. dnl Based on the K7 gcd_1.asm, by Kevin Ryde. Rehacked for ARM by Torbjorn dnl Granlund. dnl Copyright 2000, 2001, 2002, 2005, 2009, 2011, 2012 Free Software dnl Foundation, Inc. dnl This file is part of the GNU MP Library. dnl The GNU MP Library is free software; you can redistribute it and/or modify dnl it under the terms of the GNU Lesser General Public License as published dnl by the Free Software Foundation; either version 3 of the License, or (at dnl your option) any later version. dnl The GNU MP Library is distributed in the hope that it will be useful, but dnl WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY dnl or FITNESS FOR A PARTICULAR PURPOSE. See the GNU Lesser General Public dnl License for more details. dnl You should have received a copy of the GNU Lesser General Public License dnl along with the GNU MP Library. If not, see http://www.gnu.org/licenses/. include(`../config.m4') C cycles/bit (approx) C StrongARM ? C XScale ? C Cortex-A8 ? C Cortex-A9 5.9 C Cortex-A15 ? C Numbers measured with: speed -CD -s8-32 -t24 mpn_gcd_1 C TODO C * Optimise inner-loop better. C Threshold of when to call bmod when U is one limb. Should be about C (time_in_cycles(bmod_1,1) + call_overhead) / (cycles/bit). define(`BMOD_THRES_LOG2', 6) C INPUT PARAMETERS define(`up', `r0') define(`n', `r1') define(`v0', `r2') ifdef(`BMOD_1_TO_MOD_1_THRESHOLD',, `define(`BMOD_1_TO_MOD_1_THRESHOLD',0xffffffff)') ASM_START() TEXT ALIGN(16) PROLOGUE(mpn_gcd_1) push {r4, r7, lr} ldr r3, [up] C U low limb orr r3, r3, v0 rsb r4, r3, #0 and r4, r4, r3 clz r4, r4 C min(ctz(u0),ctz(v0)) rsb r4, r4, #31 rsb r12, v0, #0 and r12, r12, v0 clz r12, r12 rsb r12, r12, #31 lsr v0, v0, r12 mov r7, v0 cmp n, #1 bne L(nby1) C Both U and V are single limbs, reduce with bmod if u0 >> v0. ldr r3, [up] cmp v0, r3, lsr #BMOD_THRES_LOG2 bhi L(red1) L(bmod):mov r3, #0 C carry argument bl mpn_modexact_1c_odd b L(red0) L(nby1):cmp n, #BMOD_1_TO_MOD_1_THRESHOLD blo L(bmod) bl mpn_mod_1 L(red0):mov r3, r0 L(red1):rsbs r12, r3, #0 and r12, r12, r3 clz r12, r12 rsb r12, r12, #31 bne L(mid) b L(end) ALIGN(8) L(top): rsb r12, r12, #31 movcc r3, r1 C if x-y < 0 movcc r7, r0 C use x,y-x L(mid): lsr r3, r3, r12 C mov r0, r3 C sub r1, r7, r3 C rsbs r3, r7, r3 C and r12, r1, r3 C clz r12, r12 C bne L(top) C L(end): lsl r0, r7, r4 pop {r4, r7, pc} EPILOGUE() @