head	1.4;
access;
symbols
	pkgsrc-2013Q2:1.4.0.2
	pkgsrc-2013Q2-base:1.4
	pkgsrc-2012Q4:1.3.0.22
	pkgsrc-2012Q4-base:1.3
	pkgsrc-2012Q3:1.3.0.20
	pkgsrc-2012Q3-base:1.3
	pkgsrc-2012Q2:1.3.0.18
	pkgsrc-2012Q2-base:1.3
	pkgsrc-2012Q1:1.3.0.16
	pkgsrc-2012Q1-base:1.3
	pkgsrc-2011Q4:1.3.0.14
	pkgsrc-2011Q4-base:1.3
	pkgsrc-2011Q3:1.3.0.12
	pkgsrc-2011Q3-base:1.3
	pkgsrc-2011Q2:1.3.0.10
	pkgsrc-2011Q2-base:1.3
	pkgsrc-2011Q1:1.3.0.8
	pkgsrc-2011Q1-base:1.3
	pkgsrc-2010Q4:1.3.0.6
	pkgsrc-2010Q4-base:1.3
	pkgsrc-2010Q3:1.3.0.4
	pkgsrc-2010Q3-base:1.3
	pkgsrc-2010Q2:1.3.0.2
	pkgsrc-2010Q2-base:1.3;
locks; strict;
comment	@# @;


1.4
date	2013.01.31.20.30.26;	author adam;	state dead;
branches;
next	1.3;

1.3
date	2010.05.28.13.50.26;	author martin;	state Exp;
branches;
next	1.2;

1.2
date	2010.05.18.18.33.48;	author martin;	state Exp;
branches;
next	1.1;

1.1
date	2010.05.18.05.02.34;	author martin;	state Exp;
branches;
next	;


desc
@@


1.4
log
@Changes 5.1.0:

BUGS FIXED
* When reading a C++ number (like mpz_class) in an istream reaches the end
  of the stream, the eofbit is now set.

* The result sign of mpz_rootrem's remainder is now always correct.
* The mpz_remove function now handles negative divisors.
* Contains all fixes from release 5.0.5.

SPEEDUPS
* The n-factorial and n-over-k functions have been reimplemented for great
  speedups for small and large operands.
* New subquadratic algorithm for the Kronecker/Jacobi/Legendre symbol.
* Major speedup for ARM, in particular ARM Cortex-A9 and A15, thanks to broad
  assembly support.
* Significant speedup or POWER6 and POWER7 thanks to improved assembly.
* The performance under M$ Windows' 64-bit ABI has been greatly improved
  thanks to complete assembly support.
* Minor speed improvements of many functions and for many platforms.

FEATURES
* Many new CPUs recognised.
* New functions for multi-factorials, and primorial: mpz_2fac_ui,
  mpz_mfac_uiui and mpz_primorial_ui.
* The mpz_powm_sec function now uses side-channel silent division for
  converting into Montgomery residues.
* The fat binary mechanism is now more robust in its CPU recognition.

MISC
* Inclusion of assembly code is now controlled by the configure options
  --enable-assembly and --disable-assembly.  The "none" CPU targets is gone.
* In C++, the conversions mpq_class->mpz_class, mpf_class->mpz_class and
  mpf_class->mpq_class are now explicit.
* Includes "mini-gmp", a small, portable, but less efficient, implementation
  of a subset of GMP's mpn and mpz interfaces. Used in GMP bootstrap, but it
  can also be bundled with applications as a fallback when the real GMP
  library is unavailable.
* The ABIs under AIX are no longer called aix32 and aix64, but mode64 and 32.
  This is more consistent with other powerpc systems.
* The coverage of the testsuite has been improved, using the lcov tool.  See
  also http://gmplib.org/devel/lcov/.
* It is now possible to compile GMP using a C++ compiler.
* K&R C compilers are no longer supported.
* The BSD MP compatibility functions have been removed.
@
text
@$NetBSD: patch-aj,v 1.3 2010/05/28 13:50:26 martin Exp $

--- mpn/vax/submul_1.s.orig	2010-02-06 13:43:14.000000000 +0100
+++ mpn/vax/submul_1.s	2010-05-25 10:07:06.000000000 +0200
@@@@ -27,98 +27,98 @@@@
 
 .text
 	.align 1
-.globl ___gmpn_submul_1
-___gmpn_submul_1:
+.globl __gmpn_submul_1
+__gmpn_submul_1:
 	.word	0xfc0
-	movl	12(ap),r4
-	movl	8(ap),r8
-	movl	4(ap),r9
-	movl	16(ap),r6
-	jlss	s2_big
-
-	clrl	r3
-	incl	r4
-	ashl	$-1,r4,r7
-	jlbc	r4,L1
-	clrl	r11
+	movl	12(%ap),%r4
+	movl	8(%ap),%r8
+	movl	4(%ap),%r9
+	movl	16(%ap),%r6
+	jlss	.Ls2_big
+
+	clrl	%r3
+	incl	%r4
+	ashl	$-1,%r4,%r7
+	jlbc	%r4,.L1
+	clrl	%r11
 
 # Loop for S2_LIMB < 0x80000000
-Loop1:	movl	(r8)+,r1
-	jlss	L1n0
-	emul	r1,r6,$0,r2
-	addl2	r11,r2
-	adwc	$0,r3
-	subl2	r2,(r9)+
-	adwc	$0,r3
-L1:	movl	(r8)+,r1
-	jlss	L1n1
-L1p1:	emul	r1,r6,$0,r10
-	addl2	r3,r10
-	adwc	$0,r11
-	subl2	r10,(r9)+
-	adwc	$0,r11
+.Loop1:	movl	(%r8)+,%r1
+	jlss	.L1n0
+	emul	%r1,%r6,$0,%r2
+	addl2	%r11,%r2
+	adwc	$0,%r3
+	subl2	%r2,(%r9)+
+	adwc	$0,%r3
+.L1:	movl	(%r8)+,%r1
+	jlss	.L1n1
+.L1p1:	emul	%r1,%r6,$0,%r10
+	addl2	%r3,%r10
+	adwc	$0,%r11
+	subl2	%r10,(%r9)+
+	adwc	$0,%r11
 
-	sobgtr	r7,Loop1
-	movl	r11,r0
+	sobgtr	%r7,.Loop1
+	movl	%r11,%r0
 	ret
 
-L1n0:	emul	r1,r6,$0,r2
-	addl2	r11,r2
-	adwc	r6,r3
-	subl2	r2,(r9)+
-	adwc	$0,r3
-	movl	(r8)+,r1
-	jgeq	L1p1
-L1n1:	emul	r1,r6,$0,r10
-	addl2	r3,r10
-	adwc	r6,r11
-	subl2	r10,(r9)+
-	adwc	$0,r11
+.L1n0:	emul	%r1,%r6,$0,%r2
+	addl2	%r11,%r2
+	adwc	%r6,%r3
+	subl2	%r2,(%r9)+
+	adwc	$0,%r3
+	movl	(%r8)+,%r1
+	jgeq	.L1p1
+.L1n1:	emul	%r1,%r6,$0,%r10
+	addl2	%r3,%r10
+	adwc	%r6,%r11
+	subl2	%r10,(%r9)+
+	adwc	$0,%r11
 
-	sobgtr	r7,Loop1
-	movl	r11,r0
+	sobgtr	%r7,.Loop1
+	movl	%r11,%r0
 	ret
 
 
-s2_big:	clrl	r3
-	incl	r4
-	ashl	$-1,r4,r7
-	jlbc	r4,L2
-	clrl	r11
+.Ls2_big: clrl	%r3
+	incl	%r4
+	ashl	$-1,%r4,%r7
+	jlbc	%r4,.L2
+	clrl	%r11
 
 # Loop for S2_LIMB >= 0x80000000
-Loop2:	movl	(r8)+,r1
-	jlss	L2n0
-	emul	r1,r6,$0,r2
-	addl2	r11,r2
-	adwc	r1,r3
-	subl2	r2,(r9)+
-	adwc	$0,r3
-L2:	movl	(r8)+,r1
-	jlss	L2n1
-L2p1:	emul	r1,r6,$0,r10
-	addl2	r3,r10
-	adwc	r1,r11
-	subl2	r10,(r9)+
-	adwc	$0,r11
+.Loop2:	movl	(%r8)+,%r1
+	jlss	.L2n0
+	emul	%r1,%r6,$0,%r2
+	addl2	%r11,%r2
+	adwc	%r1,%r3
+	subl2	%r2,(%r9)+
+	adwc	$0,%r3
+.L2:	movl	(%r8)+,%r1
+	jlss	.L2n1
+.L2p1:	emul	%r1,%r6,$0,%r10
+	addl2	%r3,%r10
+	adwc	%r1,%r11
+	subl2	%r10,(%r9)+
+	adwc	$0,%r11
 
-	sobgtr	r7,Loop2
-	movl	r11,r0
+	sobgtr	%r7,.Loop2
+	movl	%r11,%r0
 	ret
 
-L2n0:	emul	r1,r6,$0,r2
-	addl2	r11,r2
-	adwc	r6,r3
-	subl2	r2,(r9)+
-	adwc	r1,r3
-	movl	(r8)+,r1
-	jgeq	L2p1
-L2n1:	emul	r1,r6,$0,r10
-	addl2	r3,r10
-	adwc	r6,r11
-	subl2	r10,(r9)+
-	adwc	r1,r11
+.L2n0:	emul	%r1,%r6,$0,%r2
+	addl2	%r11,%r2
+	adwc	%r6,%r3
+	subl2	%r2,(%r9)+
+	adwc	%r1,%r3
+	movl	(%r8)+,%r1
+	jgeq	.L2p1
+.L2n1:	emul	%r1,%r6,$0,%r10
+	addl2	%r3,%r10
+	adwc	%r6,%r11
+	subl2	%r10,(%r9)+
+	adwc	%r1,%r11
 
-	sobgtr	r7,Loop2
-	movl	r11,r0
+	sobgtr	%r7,.Loop2
+	movl	%r11,%r0
 	ret
@


1.3
log
@In the VAX asm code: hide all local labels and make calculated jumps PIC,
so the shared library now works as well. Thanks to Matt Thomas for vax
asm help.
@
text
@d1 1
a1 1
$NetBSD$
@


1.2
log
@Adapt global symbold names to ELF worldorder
@
text
@d4 1
a4 1
+++ mpn/vax/submul_1.s	2010-05-18 10:16:29.000000000 +0200
d18 2
a19 6
+	movl	12(%ap),%r4
+	movl	8(%ap),%r8
+	movl	4(%ap),%r9
+	movl	16(%ap),%r6
 	jlss	s2_big
 
d25 6
d34 1
a34 1
+	jlbc	%r4,L1
d39 1
a39 2
+Loop1:	movl	(%r8)+,%r1
 	jlss	L1n0
d46 8
d59 3
a61 8
+L1:	movl	(%r8)+,%r1
 	jlss	L1n1
-L1p1:	emul	r1,r6,$0,r10
-	addl2	r3,r10
-	adwc	$0,r11
-	subl2	r10,(r9)+
-	adwc	$0,r11
+L1p1:	emul	%r1,%r6,$0,%r10
d69 1
a69 1
+	sobgtr	%r7,Loop1
d79 7
a85 1
+L1n0:	emul	%r1,%r6,$0,%r2
d91 2
a92 7
 	jgeq	L1p1
-L1n1:	emul	r1,r6,$0,r10
-	addl2	r3,r10
-	adwc	r6,r11
-	subl2	r10,(r9)+
-	adwc	$0,r11
+L1n1:	emul	%r1,%r6,$0,%r10
d100 1
a100 1
+	sobgtr	%r7,Loop1
d110 1
a110 1
+s2_big:	clrl	%r3
d113 1
a113 1
+	jlbc	%r4,L2
d118 1
a118 2
+Loop2:	movl	(%r8)+,%r1
 	jlss	L2n0
d125 8
d138 3
a140 8
+L2:	movl	(%r8)+,%r1
 	jlss	L2n1
-L2p1:	emul	r1,r6,$0,r10
-	addl2	r3,r10
-	adwc	r1,r11
-	subl2	r10,(r9)+
-	adwc	$0,r11
+L2p1:	emul	%r1,%r6,$0,%r10
d148 1
a148 1
+	sobgtr	%r7,Loop2
d158 7
a164 1
+L2n0:	emul	%r1,%r6,$0,%r2
d170 2
a171 7
 	jgeq	L2p1
-L2n1:	emul	r1,r6,$0,r10
-	addl2	r3,r10
-	adwc	r6,r11
-	subl2	r10,(r9)+
-	adwc	r1,r11
+L2n1:	emul	%r1,%r6,$0,%r10
d179 1
a179 1
+	sobgtr	%r7,Loop2
@


1.1
log
@Adopt VAX asm code to modern gas requirements (prefix all registers with %)
@
text
@d1 2
d4 9
a12 4
+++ mpn/vax/submul_1.s	2010-05-17 23:19:59.000000000 +0200
@@@@ -30,95 +30,95 @@@@
 .globl ___gmpn_submul_1
 ___gmpn_submul_1:
@

