head 1.4; access; symbols pkgsrc-2013Q2:1.4.0.2 pkgsrc-2013Q2-base:1.4 pkgsrc-2012Q4:1.3.0.22 pkgsrc-2012Q4-base:1.3 pkgsrc-2012Q3:1.3.0.20 pkgsrc-2012Q3-base:1.3 pkgsrc-2012Q2:1.3.0.18 pkgsrc-2012Q2-base:1.3 pkgsrc-2012Q1:1.3.0.16 pkgsrc-2012Q1-base:1.3 pkgsrc-2011Q4:1.3.0.14 pkgsrc-2011Q4-base:1.3 pkgsrc-2011Q3:1.3.0.12 pkgsrc-2011Q3-base:1.3 pkgsrc-2011Q2:1.3.0.10 pkgsrc-2011Q2-base:1.3 pkgsrc-2011Q1:1.3.0.8 pkgsrc-2011Q1-base:1.3 pkgsrc-2010Q4:1.3.0.6 pkgsrc-2010Q4-base:1.3 pkgsrc-2010Q3:1.3.0.4 pkgsrc-2010Q3-base:1.3 pkgsrc-2010Q2:1.3.0.2 pkgsrc-2010Q2-base:1.3; locks; strict; comment @# @; 1.4 date 2013.01.31.20.30.26; author adam; state dead; branches; next 1.3; 1.3 date 2010.05.28.13.50.26; author martin; state Exp; branches; next 1.2; 1.2 date 2010.05.18.18.33.48; author martin; state Exp; branches; next 1.1; 1.1 date 2010.05.18.05.02.34; author martin; state Exp; branches; next ; desc @@ 1.4 log @Changes 5.1.0: BUGS FIXED * When reading a C++ number (like mpz_class) in an istream reaches the end of the stream, the eofbit is now set. * The result sign of mpz_rootrem's remainder is now always correct. * The mpz_remove function now handles negative divisors. * Contains all fixes from release 5.0.5. SPEEDUPS * The n-factorial and n-over-k functions have been reimplemented for great speedups for small and large operands. * New subquadratic algorithm for the Kronecker/Jacobi/Legendre symbol. * Major speedup for ARM, in particular ARM Cortex-A9 and A15, thanks to broad assembly support. * Significant speedup or POWER6 and POWER7 thanks to improved assembly. * The performance under M$ Windows' 64-bit ABI has been greatly improved thanks to complete assembly support. * Minor speed improvements of many functions and for many platforms. FEATURES * Many new CPUs recognised. * New functions for multi-factorials, and primorial: mpz_2fac_ui, mpz_mfac_uiui and mpz_primorial_ui. * The mpz_powm_sec function now uses side-channel silent division for converting into Montgomery residues. * The fat binary mechanism is now more robust in its CPU recognition. MISC * Inclusion of assembly code is now controlled by the configure options --enable-assembly and --disable-assembly. The "none" CPU targets is gone. * In C++, the conversions mpq_class->mpz_class, mpf_class->mpz_class and mpf_class->mpq_class are now explicit. * Includes "mini-gmp", a small, portable, but less efficient, implementation of a subset of GMP's mpn and mpz interfaces. Used in GMP bootstrap, but it can also be bundled with applications as a fallback when the real GMP library is unavailable. * The ABIs under AIX are no longer called aix32 and aix64, but mode64 and 32. This is more consistent with other powerpc systems. * The coverage of the testsuite has been improved, using the lcov tool. See also http://gmplib.org/devel/lcov/. * It is now possible to compile GMP using a C++ compiler. * K&R C compilers are no longer supported. * The BSD MP compatibility functions have been removed. @ text @$NetBSD: patch-ag,v 1.3 2010/05/28 13:50:26 martin Exp $ --- mpn/vax/mul_1.s.orig 2010-02-06 13:43:14.000000000 +0100 +++ mpn/vax/mul_1.s 2010-05-25 00:27:32.000000000 +0200 @@@@ -27,95 +27,95 @@@@ .text .align 1 -.globl ___gmpn_mul_1 -___gmpn_mul_1: +.globl __gmpn_mul_1 +__gmpn_mul_1: .word 0xfc0 - movl 12(ap),r4 - movl 8(ap),r8 - movl 4(ap),r9 - movl 16(ap),r6 - jlss s2_big + movl 12(%ap),%r4 + movl 8(%ap),%r8 + movl 4(%ap),%r9 + movl 16(%ap),%r6 + jlss .Ls2_big # One might want to combine the addl2 and the store below, but that # is actually just slower according to my timing tests. (VAX 3600) - clrl r3 - incl r4 - ashl $-1,r4,r7 - jlbc r4,L1 - clrl r11 + clrl %r3 + incl %r4 + ashl $-1,%r4,%r7 + jlbc %r4,.L1 + clrl %r11 # Loop for S2_LIMB < 0x80000000 -Loop1: movl (r8)+,r1 - jlss L1n0 - emul r1,r6,$0,r2 - addl2 r11,r2 - adwc $0,r3 - movl r2,(r9)+ -L1: movl (r8)+,r1 - jlss L1n1 -L1p1: emul r1,r6,$0,r10 - addl2 r3,r10 - adwc $0,r11 - movl r10,(r9)+ +.Loop1: movl (%r8)+,%r1 + jlss .L1n0 + emul %r1,%r6,$0,%r2 + addl2 %r11,%r2 + adwc $0,%r3 + movl %r2,(%r9)+ +.L1: movl (%r8)+,%r1 + jlss .L1n1 +.L1p1: emul %r1,%r6,$0,%r10 + addl2 %r3,%r10 + adwc $0,%r11 + movl %r10,(%r9)+ - sobgtr r7,Loop1 - movl r11,r0 + sobgtr %r7,.Loop1 + movl %r11,%r0 ret -L1n0: emul r1,r6,$0,r2 - addl2 r11,r2 - adwc r6,r3 - movl r2,(r9)+ - movl (r8)+,r1 - jgeq L1p1 -L1n1: emul r1,r6,$0,r10 - addl2 r3,r10 - adwc r6,r11 - movl r10,(r9)+ +.L1n0: emul %r1,%r6,$0,%r2 + addl2 %r11,%r2 + adwc %r6,%r3 + movl %r2,(%r9)+ + movl (%r8)+,%r1 + jgeq .L1p1 +.L1n1: emul %r1,%r6,$0,%r10 + addl2 %r3,%r10 + adwc %r6,%r11 + movl %r10,(%r9)+ - sobgtr r7,Loop1 - movl r11,r0 + sobgtr %r7,.Loop1 + movl %r11,%r0 ret -s2_big: clrl r3 - incl r4 - ashl $-1,r4,r7 - jlbc r4,L2 - clrl r11 +.Ls2_big: clrl %r3 + incl %r4 + ashl $-1,%r4,%r7 + jlbc %r4,.L2 + clrl %r11 # Loop for S2_LIMB >= 0x80000000 -Loop2: movl (r8)+,r1 - jlss L2n0 - emul r1,r6,$0,r2 - addl2 r11,r2 - adwc r1,r3 - movl r2,(r9)+ -L2: movl (r8)+,r1 - jlss L2n1 -L2p1: emul r1,r6,$0,r10 - addl2 r3,r10 - adwc r1,r11 - movl r10,(r9)+ +.Loop2: movl (%r8)+,%r1 + jlss .L2n0 + emul %r1,%r6,$0,%r2 + addl2 %r11,%r2 + adwc %r1,%r3 + movl %r2,(%r9)+ +.L2: movl (%r8)+,%r1 + jlss .L2n1 +.L2p1: emul %r1,%r6,$0,%r10 + addl2 %r3,%r10 + adwc %r1,%r11 + movl %r10,(%r9)+ - sobgtr r7,Loop2 - movl r11,r0 + sobgtr %r7,.Loop2 + movl %r11,%r0 ret -L2n0: emul r1,r6,$0,r2 - addl2 r1,r3 - addl2 r11,r2 - adwc r6,r3 - movl r2,(r9)+ - movl (r8)+,r1 - jgeq L2p1 -L2n1: emul r1,r6,$0,r10 - addl2 r1,r11 - addl2 r3,r10 - adwc r6,r11 - movl r10,(r9)+ +.L2n0: emul %r1,%r6,$0,%r2 + addl2 %r1,%r3 + addl2 %r11,%r2 + adwc %r6,%r3 + movl %r2,(%r9)+ + movl (%r8)+,%r1 + jgeq .L2p1 +.L2n1: emul %r1,%r6,$0,%r10 + addl2 %r1,%r11 + addl2 %r3,%r10 + adwc %r6,%r11 + movl %r10,(%r9)+ - sobgtr r7,Loop2 - movl r11,r0 + sobgtr %r7,.Loop2 + movl %r11,%r0 ret @ 1.3 log @In the VAX asm code: hide all local labels and make calculated jumps PIC, so the shared library now works as well. Thanks to Matt Thomas for vax asm help. @ text @d1 1 a1 1 $NetBSD$ @ 1.2 log @Adapt global symbold names to ELF worldorder @ text @d4 1 a4 1 +++ mpn/vax/mul_1.s 2010-05-18 10:16:29.000000000 +0200 d18 1 d23 1 a23 1 jlss s2_big d36 1 a36 1 + jlbc %r4,L1 d41 1 a41 2 +Loop1: movl (%r8)+,%r1 jlss L1n0 d47 7 d58 3 a60 7 +L1: movl (%r8)+,%r1 jlss L1n1 -L1p1: emul r1,r6,$0,r10 - addl2 r3,r10 - adwc $0,r11 - movl r10,(r9)+ +L1p1: emul %r1,%r6,$0,%r10 d67 1 a67 1 + sobgtr %r7,Loop1 d76 6 a81 1 +L1n0: emul %r1,%r6,$0,%r2 d86 2 a87 6 jgeq L1p1 -L1n1: emul r1,r6,$0,r10 - addl2 r3,r10 - adwc r6,r11 - movl r10,(r9)+ +L1n1: emul %r1,%r6,$0,%r10 d94 1 a94 1 + sobgtr %r7,Loop1 d104 1 a104 1 +s2_big: clrl %r3 d107 1 a107 1 + jlbc %r4,L2 d112 1 a112 2 +Loop2: movl (%r8)+,%r1 jlss L2n0 d118 7 d129 3 a131 7 +L2: movl (%r8)+,%r1 jlss L2n1 -L2p1: emul r1,r6,$0,r10 - addl2 r3,r10 - adwc r1,r11 - movl r10,(r9)+ +L2p1: emul %r1,%r6,$0,%r10 d138 1 a138 1 + sobgtr %r7,Loop2 d148 7 a154 1 +L2n0: emul %r1,%r6,$0,%r2 d160 2 a161 7 jgeq L2p1 -L2n1: emul r1,r6,$0,r10 - addl2 r1,r11 - addl2 r3,r10 - adwc r6,r11 - movl r10,(r9)+ +L2n1: emul %r1,%r6,$0,%r10 d169 1 a169 1 + sobgtr %r7,Loop2 @ 1.1 log @Adopt VAX asm code to modern gas requirements (prefix all registers with %) @ text @d1 2 d4 9 a12 4 +++ mpn/vax/mul_1.s 2010-05-17 23:13:37.000000000 +0200 @@@@ -30,92 +30,92 @@@@ .globl ___gmpn_mul_1 ___gmpn_mul_1: d163 1 a163 1 + movl %r11,r0 @