head 1.1; access; symbols pkgsrc-2023Q4:1.1.0.82 pkgsrc-2023Q4-base:1.1 pkgsrc-2023Q3:1.1.0.80 pkgsrc-2023Q3-base:1.1 pkgsrc-2023Q2:1.1.0.78 pkgsrc-2023Q2-base:1.1 pkgsrc-2023Q1:1.1.0.76 pkgsrc-2023Q1-base:1.1 pkgsrc-2022Q4:1.1.0.74 pkgsrc-2022Q4-base:1.1 pkgsrc-2022Q3:1.1.0.72 pkgsrc-2022Q3-base:1.1 pkgsrc-2022Q2:1.1.0.70 pkgsrc-2022Q2-base:1.1 pkgsrc-2022Q1:1.1.0.68 pkgsrc-2022Q1-base:1.1 pkgsrc-2021Q4:1.1.0.66 pkgsrc-2021Q4-base:1.1 pkgsrc-2021Q3:1.1.0.64 pkgsrc-2021Q3-base:1.1 pkgsrc-2021Q2:1.1.0.62 pkgsrc-2021Q2-base:1.1 pkgsrc-2021Q1:1.1.0.60 pkgsrc-2021Q1-base:1.1 pkgsrc-2020Q4:1.1.0.58 pkgsrc-2020Q4-base:1.1 pkgsrc-2020Q3:1.1.0.56 pkgsrc-2020Q3-base:1.1 pkgsrc-2020Q2:1.1.0.52 pkgsrc-2020Q2-base:1.1 pkgsrc-2020Q1:1.1.0.32 pkgsrc-2020Q1-base:1.1 pkgsrc-2019Q4:1.1.0.54 pkgsrc-2019Q4-base:1.1 pkgsrc-2019Q3:1.1.0.50 pkgsrc-2019Q3-base:1.1 pkgsrc-2019Q2:1.1.0.48 pkgsrc-2019Q2-base:1.1 pkgsrc-2019Q1:1.1.0.46 pkgsrc-2019Q1-base:1.1 pkgsrc-2018Q4:1.1.0.44 pkgsrc-2018Q4-base:1.1 pkgsrc-2018Q3:1.1.0.42 pkgsrc-2018Q3-base:1.1 pkgsrc-2018Q2:1.1.0.40 pkgsrc-2018Q2-base:1.1 pkgsrc-2018Q1:1.1.0.38 pkgsrc-2018Q1-base:1.1 pkgsrc-2017Q4:1.1.0.36 pkgsrc-2017Q4-base:1.1 pkgsrc-2017Q3:1.1.0.34 pkgsrc-2017Q3-base:1.1 pkgsrc-2017Q2:1.1.0.30 pkgsrc-2017Q2-base:1.1 pkgsrc-2017Q1:1.1.0.28 pkgsrc-2017Q1-base:1.1 pkgsrc-2016Q4:1.1.0.26 pkgsrc-2016Q4-base:1.1 pkgsrc-2016Q3:1.1.0.24 pkgsrc-2016Q3-base:1.1 pkgsrc-2016Q2:1.1.0.22 pkgsrc-2016Q2-base:1.1 pkgsrc-2016Q1:1.1.0.20 pkgsrc-2016Q1-base:1.1 pkgsrc-2015Q4:1.1.0.18 pkgsrc-2015Q4-base:1.1 pkgsrc-2015Q3:1.1.0.16 pkgsrc-2015Q3-base:1.1 pkgsrc-2015Q2:1.1.0.14 pkgsrc-2015Q2-base:1.1 pkgsrc-2015Q1:1.1.0.12 pkgsrc-2015Q1-base:1.1 pkgsrc-2014Q4:1.1.0.10 pkgsrc-2014Q4-base:1.1 pkgsrc-2014Q3:1.1.0.8 pkgsrc-2014Q3-base:1.1 pkgsrc-2014Q2:1.1.0.6 pkgsrc-2014Q2-base:1.1 pkgsrc-2014Q1:1.1.0.4 pkgsrc-2014Q1-base:1.1 pkgsrc-2013Q4:1.1.0.2 pkgsrc-2013Q4-base:1.1; locks; strict; comment @# @; 1.1 date 2013.10.12.08.39.02; author ryoon; state Exp; branches; next ; commitid TpvTMP3fx9VATY8x; desc @@ 1.1 log @Import cgen-20131001 as devel/cgen. CGEN (pronounced seejen) is a framework for developing generators of CPU-related tools such as assemblers, disassemblers and simulators. It specifies a description language for describing the architecture and organization of a CPU without reference to any particular application. Additional applications can be written within the framework. CGEN is written in Scheme and can be run under the GNU Guile interpreter. It is placed under a free software license. @ text @=========================================================================== $NetBSD: MESSAGE,v 1.12 2013/09/28 13:29:51 ryoon Exp $ To generating opcode file and description files for M32R, for example. Please run the following commands. In detail, see info files and ${PREFIX}/share/cgen/cgen/Makefile.in . $ guile -l ${PREFIX}/share/cgen/cgen/guile.scm \ -s ${PREFIX}/share/cgen/cgen/cgen-opc.scm \ -s ${PREFIX}/share/cgen/cgen \ -v \ -a ${PREFIX}/share/cgen/cpu/m32r.cpu \ -i "all" \ -m "all" \ -H m32r-desc.h \ -C m32r-desc.c $ guile -l ${PREFIX}/share/cgen/cgen/guile.scm \ -s ${PREFIX}/share/cgen/cgen/cgen-doc.scm \ -s ${PREFIX}/share/cgen/cgen \ -v \ -a ${PREFIX}/share/cgen/cpu/m32r.cpu \ -H m32r.html \ -I m32r-insn.html =========================================================================== @