head 1.4; access; symbols pkgsrc-2026Q1:1.4.0.2 pkgsrc-2026Q1-base:1.4 pkgsrc-2025Q4:1.3.0.2 pkgsrc-2025Q4-base:1.3 pkgsrc-2025Q3:1.2.0.54 pkgsrc-2025Q3-base:1.2 pkgsrc-2025Q2:1.2.0.52 pkgsrc-2025Q2-base:1.2 pkgsrc-2025Q1:1.2.0.50 pkgsrc-2025Q1-base:1.2 pkgsrc-2024Q4:1.2.0.48 pkgsrc-2024Q4-base:1.2 pkgsrc-2024Q3:1.2.0.46 pkgsrc-2024Q3-base:1.2 pkgsrc-2024Q2:1.2.0.44 pkgsrc-2024Q2-base:1.2 pkgsrc-2024Q1:1.2.0.42 pkgsrc-2024Q1-base:1.2 pkgsrc-2023Q4:1.2.0.40 pkgsrc-2023Q4-base:1.2 pkgsrc-2023Q3:1.2.0.38 pkgsrc-2023Q3-base:1.2 pkgsrc-2023Q2:1.2.0.36 pkgsrc-2023Q2-base:1.2 pkgsrc-2023Q1:1.2.0.34 pkgsrc-2023Q1-base:1.2 pkgsrc-2022Q4:1.2.0.32 pkgsrc-2022Q4-base:1.2 pkgsrc-2022Q3:1.2.0.30 pkgsrc-2022Q3-base:1.2 pkgsrc-2022Q2:1.2.0.28 pkgsrc-2022Q2-base:1.2 pkgsrc-2022Q1:1.2.0.26 pkgsrc-2022Q1-base:1.2 pkgsrc-2021Q4:1.2.0.24 pkgsrc-2021Q4-base:1.2 pkgsrc-2021Q3:1.2.0.22 pkgsrc-2021Q3-base:1.2 pkgsrc-2021Q2:1.2.0.20 pkgsrc-2021Q2-base:1.2 pkgsrc-2021Q1:1.2.0.18 pkgsrc-2021Q1-base:1.2 pkgsrc-2020Q4:1.2.0.16 pkgsrc-2020Q4-base:1.2 pkgsrc-2020Q3:1.2.0.14 pkgsrc-2020Q3-base:1.2 pkgsrc-2020Q2:1.2.0.12 pkgsrc-2020Q2-base:1.2 pkgsrc-2020Q1:1.2.0.8 pkgsrc-2020Q1-base:1.2 pkgsrc-2019Q4:1.2.0.10 pkgsrc-2019Q4-base:1.2 pkgsrc-2019Q3:1.2.0.6 pkgsrc-2019Q3-base:1.2 pkgsrc-2019Q2:1.2.0.4 pkgsrc-2019Q2-base:1.2 pkgsrc-2019Q1:1.2.0.2 pkgsrc-2019Q1-base:1.2 pkgsrc-2018Q4:1.1.0.70 pkgsrc-2018Q4-base:1.1 pkgsrc-2018Q3:1.1.0.68 pkgsrc-2018Q3-base:1.1 pkgsrc-2018Q2:1.1.0.66 pkgsrc-2018Q2-base:1.1 pkgsrc-2018Q1:1.1.0.64 pkgsrc-2018Q1-base:1.1 pkgsrc-2017Q4:1.1.0.62 pkgsrc-2017Q4-base:1.1 pkgsrc-2017Q3:1.1.0.60 pkgsrc-2017Q3-base:1.1 pkgsrc-2017Q2:1.1.0.56 pkgsrc-2017Q2-base:1.1 pkgsrc-2017Q1:1.1.0.54 pkgsrc-2017Q1-base:1.1 pkgsrc-2016Q4:1.1.0.52 pkgsrc-2016Q4-base:1.1 pkgsrc-2016Q3:1.1.0.50 pkgsrc-2016Q3-base:1.1 pkgsrc-2016Q2:1.1.0.48 pkgsrc-2016Q2-base:1.1 pkgsrc-2016Q1:1.1.0.46 pkgsrc-2016Q1-base:1.1 pkgsrc-2015Q4:1.1.0.44 pkgsrc-2015Q4-base:1.1 pkgsrc-2015Q3:1.1.0.42 pkgsrc-2015Q3-base:1.1 pkgsrc-2015Q2:1.1.0.40 pkgsrc-2015Q2-base:1.1 pkgsrc-2015Q1:1.1.0.38 pkgsrc-2015Q1-base:1.1 pkgsrc-2014Q4:1.1.0.36 pkgsrc-2014Q4-base:1.1 pkgsrc-2014Q3:1.1.0.34 pkgsrc-2014Q3-base:1.1 pkgsrc-2014Q2:1.1.0.32 pkgsrc-2014Q2-base:1.1 pkgsrc-2014Q1:1.1.0.30 pkgsrc-2014Q1-base:1.1 pkgsrc-2013Q4:1.1.0.28 pkgsrc-2013Q4-base:1.1 pkgsrc-2013Q3:1.1.0.26 pkgsrc-2013Q3-base:1.1 pkgsrc-2013Q2:1.1.0.24 pkgsrc-2013Q2-base:1.1 pkgsrc-2013Q1:1.1.0.22 pkgsrc-2013Q1-base:1.1 pkgsrc-2012Q4:1.1.0.20 pkgsrc-2012Q4-base:1.1 pkgsrc-2012Q3:1.1.0.18 pkgsrc-2012Q3-base:1.1 pkgsrc-2012Q2:1.1.0.16 pkgsrc-2012Q2-base:1.1 pkgsrc-2012Q1:1.1.0.14 pkgsrc-2012Q1-base:1.1 pkgsrc-2011Q4:1.1.0.12 pkgsrc-2011Q4-base:1.1 pkgsrc-2011Q3:1.1.0.10 pkgsrc-2011Q3-base:1.1 pkgsrc-2011Q2:1.1.0.8 pkgsrc-2011Q2-base:1.1 pkgsrc-2011Q1:1.1.0.6 pkgsrc-2011Q1-base:1.1 pkgsrc-2010Q4:1.1.0.4 pkgsrc-2010Q4-base:1.1 pkgsrc-2010Q3:1.1.0.2 pkgsrc-2010Q3-base:1.1; locks; strict; comment @# @; 1.4 date 2026.01.18.20.59.43; author hauke; state Exp; branches; next 1.3; commitid xXmOpGeBO3OqVUqG; 1.3 date 2025.12.16.10.19.11; author hauke; state Exp; branches; next 1.2; commitid GK7VOSVRLvA5sCmG; 1.2 date 2019.02.14.14.36.06; author thorpej; state Exp; branches; next 1.1; commitid 9PLNFwtNpIXQ9KbB; 1.1 date 2010.09.28.11.08.29; author obache; state Exp; branches; next ; desc @@ 1.4 log @Restore the mutex support patches for aarm64 and mips. What likely happened: After a 'make patch', I manually applied the sparc mutex support patch on top. patch(1) overwrote the existing mutex_int.h.orig, and mkpatches(1) then updated the patch as diff between the new .orig and the file, which only had the sparc support. Instead, I should have preserved the .orig file from 'make patch', and restored it after the manual patch. YLYL. SHould fix PR pkg/59925. @ text @$NetBSD: patch-ae,v 1.3 2025/12/16 10:19:11 hauke Exp $ (1) adds support for mutexes on aarch64 (2) adds mutex support for sparc v[789] (3) fixes build failure on MIPS arch with -mips1. --- dbinc/mutex_int.h.orig 2010-04-12 20:25:22.000000000 +0000 +++ dbinc/mutex_int.h @@@@ -491,6 +491,43 @@@@ typedef unsigned char tsl_t; #endif /********************************************************************* + * AARCH64/gcc assembly. + *********************************************************************/ + +#ifdef HAVE_MUTEX_AARCH64_GCC_ASSEMBLY +typedef unsigned int tsl_t; + +#ifdef LOAD_ACTUAL_MUTEX_CODE +static inline int +MUTEX_SET(tsl_t *tsl) { + register tsl_t *__l = tsl; + register tsl_t __r; + __asm__ volatile( + "1: ldxr %w0,[%1]\n" + " cbnz %w0,2f\n" + " stxr %w0,%w2,[%1]\n" + " cbnz %w0,1b\n" + " dmb st\n" + "2:" + : "=&r"(__r) + : "r"(__l), "r"(1) + : "memory"); + + return !__r; +} + +static inline int +MUTEX_UNSET(tsl_t *tsl) { + __asm__ volatile( + " dsb sy\n" ::: "memory"); + return *tsl = 0; +} + +#define MUTEX_INIT(tsl) (MUTEX_UNSET(tsl), 0) +#endif +#endif + +/********************************************************************* * HPPA/gcc assembly. *********************************************************************/ #ifdef HAVE_MUTEX_HPPA_GCC_ASSEMBLY @@@@ -714,14 +751,24 @@@@ typedef unsigned char tsl_t; !__r; \ }) +#if defined (__sparc_v9__) #define MUTEX_UNSET(tsl) (*(tsl) = 0, MUTEX_MEMBAR(tsl)) -#define MUTEX_INIT(tsl) (MUTEX_UNSET(tsl), 0) #define MUTEX_MEMBAR(x) \ ({ __asm__ volatile ("membar #StoreStore|#StoreLoad|#LoadStore"); }) #define MEMBAR_ENTER() \ ({ __asm__ volatile ("membar #StoreStore|#StoreLoad"); }) #define MEMBAR_EXIT() \ ({ __asm__ volatile ("membar #StoreStore|#LoadStore"); }) +#else +#define MUTEX_UNSET(tsl) ({ \ + __asm__ volatile ("stbar"); \ + *(tsl) = 0; }) +#define MUTEX_MEMBAR(x) \ + ({ __asm__ volatile ("stbar"); }) +#define MEMBAR_ENTER() +#define MEMBAR_EXIT() +#endif +#define MUTEX_INIT(tsl) (MUTEX_UNSET(tsl), 0) #endif #endif @@@@ -778,10 +825,14 @@@@ MUTEX_SET(tsl_t *tsl) { static inline void MUTEX_UNSET(tsl_t *tsl) { __asm__ volatile( + " .set push \n" + " .set mips2 \n" " .set noreorder \n" + " .set nomacro \n" " sync \n" " sw $0, %0 \n" " .set reorder \n" + " .set pop \n" : "=m" (*tsl) : "m" (*tsl) : "memory"); @ 1.3 log @databases/db[45] -- Add mutex support for SPARC v[78] machines. Thanks go to John D. Baker for submitting an updated patch to the PR, and to Andrew Randrianasulu for bringing up the issue again and then testing the patches. Fixes PR pkg/43444. @ text @d1 1 a1 1 $NetBSD: patch-ae,v 1.2 2019/02/14 14:36:06 thorpej Exp $ d3 1 a3 3 * adds support for mutexes on aarch64 * fixes build failure on MIPS arch with -mips1. * adds mutex support for sparc v[789] d5 6 a10 1 --- dbinc/mutex_int.h.orig 2025-12-15 13:35:56.838500475 +0000 d12 45 a56 1 @@@@ -751,14 +751,24 @@@@ typedef unsigned char tsl_t; d82 15 @ 1.2 log @Add support for mutexes on aarch64 with GCC. Bump PKGREVISION to 1. @ text @d1 1 a1 1 $NetBSD: patch-ae,v 1.1 2010/09/28 11:08:29 obache Exp $ d5 1 d7 1 a7 1 --- dbinc/mutex_int.h.orig 2010-04-12 20:25:22.000000000 +0000 d9 24 a32 1 @@@@ -491,6 +491,43 @@@@ typedef unsigned char tsl_t; a34 56 /********************************************************************* + * AARCH64/gcc assembly. + *********************************************************************/ + +#ifdef HAVE_MUTEX_AARCH64_GCC_ASSEMBLY +typedef unsigned int tsl_t; + +#ifdef LOAD_ACTUAL_MUTEX_CODE +static inline int +MUTEX_SET(tsl_t *tsl) { + register tsl_t *__l = tsl; + register tsl_t __r; + __asm__ volatile( + "1: ldxr %w0,[%1]\n" + " cbnz %w0,2f\n" + " stxr %w0,%w2,[%1]\n" + " cbnz %w0,1b\n" + " dmb st\n" + "2:" + : "=&r"(__r) + : "r"(__l), "r"(1) + : "memory"); + + return !__r; +} + +static inline int +MUTEX_UNSET(tsl_t *tsl) { + __asm__ volatile( + " dsb sy\n" ::: "memory"); + return *tsl = 0; +} + +#define MUTEX_INIT(tsl) (MUTEX_UNSET(tsl), 0) +#endif +#endif + +/********************************************************************* * HPPA/gcc assembly. *********************************************************************/ #ifdef HAVE_MUTEX_HPPA_GCC_ASSEMBLY @@@@ -778,10 +815,14 @@@@ MUTEX_SET(tsl_t *tsl) { static inline void MUTEX_UNSET(tsl_t *tsl) { __asm__ volatile( + " .set push \n" + " .set mips2 \n" " .set noreorder \n" + " .set nomacro \n" " sync \n" " sw $0, %0 \n" " .set reorder \n" + " .set pop \n" : "=m" (*tsl) : "m" (*tsl) : "memory"); @ 1.1 log @Fixes build failure on MIPS arch, PR#43894. @ text @d1 1 a1 1 $NetBSD$ d3 1 d8 45 a52 1 @@@@ -778,10 +778,14 @@@@ MUTEX_SET(tsl_t *tsl) { @