head 1.12; access; symbols pkgsrc-2016Q3:1.11.0.22 pkgsrc-2016Q3-base:1.11 pkgsrc-2016Q2:1.11.0.20 pkgsrc-2016Q2-base:1.11 pkgsrc-2016Q1:1.11.0.18 pkgsrc-2016Q1-base:1.11 pkgsrc-2015Q4:1.11.0.16 pkgsrc-2015Q4-base:1.11 pkgsrc-2015Q3:1.11.0.14 pkgsrc-2015Q3-base:1.11 pkgsrc-2015Q2:1.11.0.12 pkgsrc-2015Q2-base:1.11 pkgsrc-2015Q1:1.11.0.10 pkgsrc-2015Q1-base:1.11 pkgsrc-2014Q4:1.11.0.8 pkgsrc-2014Q4-base:1.11 pkgsrc-2014Q3:1.11.0.6 pkgsrc-2014Q3-base:1.11 pkgsrc-2014Q2:1.11.0.4 pkgsrc-2014Q2-base:1.11 pkgsrc-2014Q1:1.11.0.2 pkgsrc-2014Q1-base:1.11 pkgsrc-2013Q4:1.10.0.22 pkgsrc-2013Q4-base:1.10 pkgsrc-2013Q3:1.10.0.20 pkgsrc-2013Q3-base:1.10 pkgsrc-2013Q2:1.10.0.18 pkgsrc-2013Q2-base:1.10 pkgsrc-2013Q1:1.10.0.16 pkgsrc-2013Q1-base:1.10 pkgsrc-2012Q4:1.10.0.14 pkgsrc-2012Q4-base:1.10 pkgsrc-2012Q3:1.10.0.12 pkgsrc-2012Q3-base:1.10 pkgsrc-2012Q2:1.10.0.10 pkgsrc-2012Q2-base:1.10 pkgsrc-2012Q1:1.10.0.8 pkgsrc-2012Q1-base:1.10 pkgsrc-2011Q4:1.10.0.6 pkgsrc-2011Q4-base:1.10 pkgsrc-2011Q3:1.10.0.4 pkgsrc-2011Q3-base:1.10 pkgsrc-2011Q2:1.10.0.2 pkgsrc-2011Q2-base:1.10 pkgsrc-2011Q1:1.9.0.10 pkgsrc-2011Q1-base:1.9 pkgsrc-2010Q4:1.9.0.8 pkgsrc-2010Q4-base:1.9 pkgsrc-2010Q3:1.9.0.6 pkgsrc-2010Q3-base:1.9 pkgsrc-2010Q2:1.9.0.4 pkgsrc-2010Q2-base:1.9 pkgsrc-2010Q1:1.9.0.2 pkgsrc-2010Q1-base:1.9 pkgsrc-2009Q4:1.8.0.30 pkgsrc-2009Q4-base:1.8 pkgsrc-2009Q3:1.8.0.28 pkgsrc-2009Q3-base:1.8 pkgsrc-2009Q2:1.8.0.26 pkgsrc-2009Q2-base:1.8 pkgsrc-2009Q1:1.8.0.24 pkgsrc-2009Q1-base:1.8 pkgsrc-2008Q4:1.8.0.22 pkgsrc-2008Q4-base:1.8 pkgsrc-2008Q3:1.8.0.20 pkgsrc-2008Q3-base:1.8 cube-native-xorg:1.8.0.18 cube-native-xorg-base:1.8 pkgsrc-2008Q2:1.8.0.16 pkgsrc-2008Q2-base:1.8 cwrapper:1.8.0.14 pkgsrc-2008Q1:1.8.0.12 pkgsrc-2008Q1-base:1.8 pkgsrc-2007Q4:1.8.0.10 pkgsrc-2007Q4-base:1.8 pkgsrc-2007Q3:1.8.0.8 pkgsrc-2007Q3-base:1.8 pkgsrc-2007Q2:1.8.0.6 pkgsrc-2007Q2-base:1.8 pkgsrc-2007Q1:1.8.0.4 pkgsrc-2007Q1-base:1.8 pkgsrc-2006Q4:1.8.0.2 pkgsrc-2006Q4-base:1.8 pkgsrc-2006Q3:1.7.0.16 pkgsrc-2006Q3-base:1.7 pkgsrc-2006Q2:1.7.0.14 pkgsrc-2006Q2-base:1.7 pkgsrc-2006Q1:1.7.0.12 pkgsrc-2006Q1-base:1.7 pkgsrc-2005Q4:1.7.0.10 pkgsrc-2005Q4-base:1.7 pkgsrc-2005Q3:1.7.0.8 pkgsrc-2005Q3-base:1.7 pkgsrc-2005Q2:1.7.0.6 pkgsrc-2005Q2-base:1.7 pkgsrc-2005Q1:1.7.0.4 pkgsrc-2005Q1-base:1.7 pkgsrc-2004Q4:1.7.0.2 pkgsrc-2004Q4-base:1.7 pkgsrc-2004Q3:1.6.0.16 pkgsrc-2004Q3-base:1.6 pkgsrc-2004Q2:1.6.0.14 pkgsrc-2004Q2-base:1.6 pkgsrc-2004Q1:1.6.0.12 pkgsrc-2004Q1-base:1.6 pkgsrc-2003Q4:1.6.0.10 pkgsrc-2003Q4-base:1.6 netbsd-1-6-1:1.6.0.6 netbsd-1-6-1-base:1.6 netbsd-1-6:1.6.0.8 netbsd-1-6-RELEASE-base:1.6 pkgviews:1.6.0.4 pkgviews-base:1.6 buildlink2:1.6.0.2 buildlink2-base:1.6 netbsd-1-5-PATCH003:1.6 netbsd-1-5-PATCH001:1.5 netbsd-1-5-RELEASE:1.4 netbsd-1-4-PATCH003:1.4 netbsd-1-4-PATCH002:1.2 pkgsrc-base:1.1.1.1 TNF:1.1.1; locks; strict; comment @# @; 1.12 date 2016.10.08.23.15.53; author kamil; state dead; branches; next 1.11; commitid 066LBJ1IAdOUDopz; 1.11 date 2014.01.07.09.43.54; author mef; state Exp; branches; next 1.10; commitid jsrZQ6tD1skdrakx; 1.10 date 2011.04.13.14.19.29; author drochner; state Exp; branches; next 1.9; 1.9 date 2010.02.01.02.19.35; author joerg; state Exp; branches; next 1.8; 1.8 date 2006.10.04.23.52.48; author dmcmahill; state Exp; branches; next 1.7; 1.7 date 2004.10.14.22.29.04; author dmcmahill; state Exp; branches; next 1.6; 1.6 date 2001.08.04.01.20.44; author dmcmahill; state Exp; branches; next 1.5; 1.5 date 2001.02.04.15.36.50; author dmcmahill; state Exp; branches; next 1.4; 1.4 date 2000.06.22.03.15.32; author dmcmahill; state Exp; branches; next 1.3; 1.3 date 2000.03.07.18.24.49; author dmcmahill; state Exp; branches; next 1.2; 1.2 date 2000.02.14.22.55.33; author dmcmahill; state Exp; branches; next 1.1; 1.1 date 2000.01.26.15.28.41; author dmcmahill; state Exp; branches 1.1.1.1; next ; 1.1.1.1 date 2000.01.26.15.28.41; author dmcmahill; state Exp; branches; next ; desc @@ 1.12 log @cad/verilog has been renamed to cad/iverilog Use saner and more specific name for this package. No objection for rename from @ text @$NetBSD: patch-ad,v 1.11 2014/01/07 09:43:54 mef Exp $ make sure no one sneaks a -O* in on us via one of these variables set in the environment --- Makefile.in.orig 2013-08-20 04:10:31.000000000 +0900 +++ Makefile.in 2013-12-20 11:35:09.000000000 +0900 @@@@ -222,6 +222,17 @@@@ lexor.o: lexor.cc parse.h +# make sure no one sneaks a -O* in on us via one of these variables +# set in the environment +CXX_NOOPT=$(CXX:-O%=) +CPPFLAGS_NOOPT=$(CPPFLAGS:-O%=) +CXXFLAGS_NOOPT=$(CXXFLAGS:-O%=) + +parse.o: parse.cc + @@[ -d dep ] || mkdir dep + $(CXX_NOOPT) $(CPPFLAGS_NOOPT) $(CXXFLAGS_NOOPT) -MD -c $< -o $*.o + mv $*.d dep/$*.d + parse.o: parse.cc # Build this in two steps to avoid parallel build issues (see pr3462585) @ 1.11 log @(Upstream) Icarus Verilog 0.9.7 is Available (August 26th, 2013) ----------------------------- The developers are pleased to announce the next stable release in the 0.9 series, version 0.9.7. Icarus Verilog is a mostly complete implementation of the hardware description language Verilog, as described in IEEE Std 1364-2005. It also includes a number of user requested extensions. It is freely available (open source), is supported on most operating systems, and will be available as a precompiled package for many of these systems. Icarus Verilog 0.9.7 is primarily a bug fix release. Therefore, we recommend people using the 0.9.6 or earlier releases upgrade to 0.9.7 as soon as possible. Version 0.9.7 is the recommended version for all new users. More details, including known limitations, deviation from IEEE Std 1364-2005, where to obtain the source code, and links to some of the precompiled packages can be found in the Release Notes located here: (pkgsrc) 0.9.4 to 0.9.7 update and two patches are added for DESTDIR and 'mkdir: dep: Not a directory' problem. @ text @d1 1 a1 1 $NetBSD: patch-ad,v 1.10 2011/04/13 14:19:29 drochner Exp $ @ 1.10 log @update to 0.9.4 changes: -Language Coverage: -Add support for using the &&, || and ! operators with real constant values -Add support for passing -0.0 from the compiler to the run time -Add support for parsing pull devices that have two strengths specified -Allow multiple attribute instances -bugfixes pkgsrc change: clean up DESTDIR support @ text @d1 1 a1 1 $NetBSD$ d3 6 a8 3 --- Makefile.in.orig 2010-09-27 17:42:32.000000000 +0000 +++ Makefile.in @@@@ -218,8 +218,19 @@@@ main.o: main.cc version_tag.h a11 3 -parse.o: parse.cc + +# work around buggy compilers when compiling the parser with optimization d17 1 a17 1 d22 4 a25 4 + parse.cc parse.h: $(srcdir)/parse.y $(YACC) --verbose -t -p VL -d -o parse.cc $(srcdir)/parse.y mv parse.cc.h parse.h 2>/dev/null || mv parse.hh parse.h @ 1.9 log @DESTDIR support @ text @d3 1 a3 1 --- Makefile.in.orig 2008-12-10 03:21:48.000000000 +0000 d5 1 a5 1 @@@@ -176,8 +176,19 @@@@ dep: a25 56 @@@@ -233,10 +244,10 @@@@ install: all installdirs $(libdir)/ivl$( do (cd $$dir ; $(MAKE) $@@); done $(bindir)/iverilog-vpi$(suffix): ./iverilog-vpi - $(INSTALL_SCRIPT) ./iverilog-vpi $(DESTDIR)$(bindir)/iverilog-vpi$(suffix) + $(INSTALL_SCRIPT) ./iverilog-vpi $(bindir)/iverilog-vpi$(suffix) $(libdir)/ivl$(suffix)/ivl@@EXEEXT@@: ./ivl@@EXEEXT@@ - $(INSTALL_PROGRAM) ./ivl@@EXEEXT@@ $(DESTDIR)$(libdir)/ivl$(suffix)/ivl@@EXEEXT@@ + $(INSTALL_PROGRAM) ./ivl@@EXEEXT@@ $(libdir)/ivl$(suffix)/ivl@@EXEEXT@@ $(libdir)/ivl$(suffix)/xnf-s.conf: $(srcdir)/xnf-s.conf $(INSTALL_DATA) $(srcdir)/xnf-s.conf $(libdir)/ivl$(suffix)/xnf-s.conf @@@@ -260,15 +271,15 @@@@ $(includedir)/veriuser.h: $(srcdir)/veri $(INSTALL_DATA) $(srcdir)/veriuser.h $(includedir)/veriuser.h $(mandir)/man1/iverilog-vpi$(suffix).1: $(srcdir)/iverilog-vpi.man - $(INSTALL_DATA) $(srcdir)/iverilog-vpi.man $(DESTDIR)$(mandir)/man1/iverilog-vpi$(suffix).1 + $(INSTALL_DATA) $(srcdir)/iverilog-vpi.man $(mandir)/man1/iverilog-vpi$(suffix).1 $(prefix)/iverilog-vpi$(suffix).pdf: iverilog-vpi.pdf - $(INSTALL_DATA) iverilog-vpi.pdf $(DESTDIR)$(prefix)/iverilog-vpi$(suffix).pdf + $(INSTALL_DATA) iverilog-vpi.pdf $(prefix)/iverilog-vpi$(suffix).pdf installdirs: mkinstalldirs - $(srcdir)/mkinstalldirs $(DESTDIR)$(bindir) $(DESTDIR)$(includedir) $(DESTDIR)$(libdir)/ivl$(suffix) \ - $(DESTDIR)$(libdir)/ivl$(suffix)/include $(DESTDIR)$(mandir) $(DESTDIR)$(mandir)/man1 + $(srcdir)/mkinstalldirs $(bindir) $(includedir) $(libdir)/ivl$(suffix) \ + $(libdir)/ivl$(suffix)/include $(mandir) $(mandir)/man1 uninstall: for dir in $(SUBDIRS); do (cd $$dir ; $(MAKE) $@@); done @@@@ -276,15 +287,15 @@@@ uninstall: for dir in vpi ivlpp driver; \ do (cd $$dir ; $(MAKE) $@@); done for f in xnf.conf xnf-s.conf ivl@@EXEEXT@@; \ - do rm -f $(DESTDIR)$(libdir)/ivl$(suffix)/$$f; done - -rmdir $(DESTDIR)$(libdir)/ivl$(suffix)/include - -rmdir $(DESTDIR)$(libdir)/ivl$(suffix) + do rm -f $(libdir)/ivl$(suffix)/$$f; done + -rmdir $(libdir)/ivl$(suffix)/include + -rmdir $(libdir)/ivl$(suffix) for f in verilog$(suffix) iverilog-vpi$(suffix); \ - do rm -f $(DESTDIR)$(bindir)/$$f; done + do rm -f $(bindir)/$$f; done for f in ivl_target.h vpi_user.h _pli_types.h acc_user.h veriuser.h; \ - do rm -f $(DESTDIR)$(includedir)/$$f; done - -test X$(suffix) = X || rmdir $(DESTDIR)/$(includedir) - rm -f $(DESTDIR)$(mandir)/man1/iverilog-vpi$(suffix).1 $(DESTDIR)$(prefix)/iverilog-vpi$(suffix).pdf + do rm -f $(includedir)/$$f; done + -test X$(suffix) = X || rmdir /$(includedir) + rm -f $(mandir)/man1/iverilog-vpi$(suffix).1 $(prefix)/iverilog-vpi$(suffix).pdf -include $(patsubst %.o, dep/%.d, $O) @ 1.8 log @update to verilog-0.8.3 ** Release Notes for Icarus Verilog 0.8.3 This is a new release of the stable 0.8 branch. The changes from 0.8.2 are intended to be evolutionary, rather then revolutionary, to enhance the stability of the branch. Various simulator bugs have been fixed, including (but not limited to): - Detect overrun of timescale vs. precision - Handle more operators in constant expressions - Various ivl crashes and panics fixed. - Some performance bottlenecks have been fixed. - Various tool compilation problems have been fixed. Also, the internal synthesizer (for synthesis targets) has been considerably improved. NOTE that the code generators have not been improved to take advantage of all the changes here, so there is work yet to be done. The mingw build process for compiling in Windows has been reworked. It is now possible (indeed preferable) to compile fully native Icarus Verilog binaries on Windows with no Cygwin tools at all. @ text @d3 4 a6 3 --- Makefile.in.orig 2006-10-04 17:08:59.000000000 +0000 +++ Makefile.in 2006-10-04 22:39:41.000000000 +0000 @@@@ -171,6 +171,17 @@@@ d25 57 @ 1.7 log @update to verilog-0.8. The current release is a considerable improvement over the previous stable release. It includes 20 months of fixes and language coverage improvements. For a complete history of changes, see the release notes for individual snapshots between the 0.7 and 0.8 releases found at ftp://ftp.icarus.com/pub/eda/verilog/snapshots/pre-0.8 A brief list of highlights: - Support for advanced standard data types such as real, - Lots more language support in general, - Kernel of an extensible, interactive debugger is new, - More complete support for user supplied system functions and tasks, including PLI system functions with various return value types, - Better standards compliance for core system tasks and functions in general, including some Verilog 2001 file I/O support, and - Performance improvements in general. @ text @d1 1 a1 1 $NetBSD: patch-ad,v 1.12 2003/07/14 09:51:49 drochner Exp $ d3 3 a5 4 --- Makefile.in.orig 2003-06-25 03:48:39.000000000 +0200 +++ Makefile.in 2003-07-12 19:11:41.000000000 +0200 @@@@ -170,7 +170,17 @@@@ d8 2 d16 2 a17 2 + parse.o: parse.cc d21 2 a22 2 parse.cc: $(srcdir)/parse.y @ 1.6 log @update to verilog-0.5 * The Big Change: VVP Past versions of Icarus Verilog performed simulation by compiling the Verilog design to intermediate C++ code, then in turn compiling that C++ (usually with G++) to a binary executable. This program was then executed to actually run the simulation. The 0.5 compiler, however, uses a custom internal language called "vvp." The vvp code generator writes a program in the vvp language that the vvp interpreter executes. This gets runtime performance similar to the older vvm method, but compile times are much faster. The result of this change is that there is a new program, ``vvp'', that is installed with the existing ``iverilog'' compiler. This program actually executes the simulation generated by the vvp code generator. There are manual pages for the iverilog command and the new vvp command, as well as a QUICK_START document to help you run your first simulation. * What Else Is New The compiler itself is now a lot more robust. While it still does not compile and understand the entire IEEE1364 standard, the compiler is less likely to crash on bad input, gives better error messages, and has generally been cleaned up. @ text @d1 1 a1 1 $NetBSD: patch-ad,v 1.9 2001/05/21 22:25:19 dmcmahill Exp $ d3 4 a6 6 work around a c++ -O2 bug which is present on at least sparc and pmax using egcs-1.1.1 --- Makefile.in.orig Sun Mar 25 00:59:46 2001 +++ Makefile.in Wed May 16 09:38:37 2001 @@@@ -143,5 +143,14 @@@@ d9 1 d21 2 a22 1 parse.h parse.cc: $(srcdir)/parse.y @ 1.5 log @update to verilog-0.4. from the authors announcement: So many things have changed since version 0.3 that there is no point in listing them. There have been tons and tons of bug fixes and the language coverage is better, and so on and so forth. It's just so very much better then version 0.3:-) speaking as a user, some of my personal favorites are: - support for signed variables - iverilog now gives correct return codes (which makes 'make' much happier) for a more complete list, the commit messages for pkgsrc/cad/verilog-current/Makefile contain the changes for each development snapshot between verilog-0.3 and verilog-0.4 @ text @d1 1 a1 1 $NetBSD: patch-ad,v 1.8 2000/12/19 18:53:52 dmcmahill Exp $ d6 4 a9 3 --- Makefile.in.orig Fri Dec 8 20:17:38 2000 +++ Makefile.in Sat Dec 16 19:07:25 2000 @@@@ -137,4 +137,7 @@@@ d11 6 d19 2 a20 2 + $(CXX) -MD -c -I. $(CPPFLAGS) $< + mv parse.d dep/parse.d @ 1.4 log @update to verilog-0.3 Changes, from the authors release statement, are: This release is a significant improvement over previous releases of Icarus Verilog, including better language coverage, improved synthesis, and increased performance. This release adds to the 0.2 release support for Verilog-2000 style parameters and parameter overrides, defparam, and localparam, including proper handling of scoping rules. Also, strength modeling is added, with support for strengths attached to gates and continuous assignments. Combinational user defined primitives have been added to complement synchronous primitives that were already supported. Support for primitives should now be fairly complete. Force/release/assign/deassign syntax now works properly, allowing for more sophisticated test bench design and debugging. Bug fixes have been numerous and varied. This release of Icarus Verilog is considerably more robust then previous versions, thanks to diligent testing and bug reporting by users all over the world. @ text @d1 1 a1 1 $NetBSD$ d3 2 a4 2 don't use -O2 on parse.cc because of compiler bugs on sparc and pmax (maybe others). d6 3 a8 3 --- Makefile.in.orig Fri Apr 28 12:50:53 2000 +++ Makefile.in Sat Apr 29 08:39:00 2000 @@@@ -115,4 +115,6 @@@@ d10 2 a11 1 parse.o dep/parse.d: parse.cc @ 1.3 log @fix a bug in one of the patches that caused parse.cc to be built twice. @ text @d6 3 a8 3 --- Makefile.in.orig Sat Feb 5 01:40:35 2000 +++ Makefile.in Tue Mar 7 12:38:25 2000 @@@@ -111,4 +111,6 @@@@ @ 1.2 log @update package to verilog-20000212. This release incorporates most of the NetBSD pkgsrc patches to the previous release. Thanks to Stephen Williams (the author) for his willingness to accept patches! @ text @d7 2 a8 2 +++ Makefile.in Sun Feb 13 11:13:10 2000 @@@@ -111,4 +111,5 @@@@ d11 2 a12 1 + $(CXX) -c -I. $(CPPFLAGS) $< @ 1.1 log @Initial revision @ text @d3 2 a4 4 *use INSTALL_SCRIPT for installing a shell script. *don't use -O2 on parse.cc because of compiler bugs on sparc and pmax (maybe others). *check for libdl, don't assume it is there. d6 3 a8 17 --- Makefile.in.orig Sun Jan 9 12:43:28 2000 +++ Makefile.in Mon Jan 24 13:02:12 2000 @@@@ -40,4 +40,5 @@@@ CXX = @@CXX@@ INSTALL = @@INSTALL@@ +INSTALL_SCRIPT = @@INSTALL_SCRIPT@@ INSTALL_PROGRAM = @@INSTALL_PROGRAM@@ INSTALL_DATA = @@INSTALL_DATA@@ @@@@ -92,5 +93,6 @@@@ -e 's;@@$(tmp2)@@;@@libdir@@;' \ -e 's;@@$(tmp3)@@;@@includedir@@;' \ - -e 's;@@$(tmp4)@@;@@CXX@@;' < $< > $@@ + -e 's;@@$(tmp4)@@;@@CXX@@;' \ + -e 's;@@dllib@@;@@DLLIB@@;' < $< > $@@ ivl: $O @@@@ -109,4 +111,5 @@@@ d11 1 a11 1 + $(CXX) -c -I. $(CPPFLAGS) $< a13 7 @@@@ -123,5 +126,5 @@@@ $(bindir)/verilog: ./verilog - $(INSTALL_PROGRAM) ./verilog $(bindir)/verilog + $(INSTALL_SCRIPT) ./verilog $(bindir)/verilog $(bindir)/gverilog: ./gverilog @ 1.1.1.1 log @Initial import of Icarus Verilog. Icarus Verilog is a Verilog simulation and synthesis tool. It operates as a compiler, compiling source code writen in Verilog (IEEE-1364) into some target format. For batch simulation, the compiler can generate C++ code that is compiled and linked with a run time library (called "vvm") then executed as a command to run the simulation. For synthesis, the compiler generates netlists in the desired format. The compiler proper is intended to parse and elaborate design descriptions written to the IEEE standard IEEE Std 1364-1995. This is a fairly large and complex standard, so it will take some time for it to get there, but that's the goal. I'll be tracking the upcoming IEEE Std 1364-1999 revision as well, and some -1999 features will creep in. @ text @@